| // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s |
| |
| // --------------------------------------------------------------------------// |
| // Invalid immediates (must be 0.5 or 2.0) |
| |
| fmul z0.h, p0/m, z0.h, #1.0 |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 2.0. |
| // CHECK-NEXT: fmul z0.h, p0/m, z0.h, #1.0 |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| fmul z0.h, p0/m, z0.h, #0.0 |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 2.0. |
| // CHECK-NEXT: fmul z0.h, p0/m, z0.h, #0.0 |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| fmul z0.h, p0/m, z0.h, #0.4999999999999999999999999 |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 2.0. |
| // CHECK-NEXT: fmul z0.h, p0/m, z0.h, #0.4999999999999999999999999 |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| fmul z0.h, p0/m, z0.h, #0.5000000000000000000000001 |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 2.0. |
| // CHECK-NEXT: fmul z0.h, p0/m, z0.h, #0.5000000000000000000000001 |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| fmul z0.h, p0/m, z0.h, #2.0000000000000000000000001 |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 2.0. |
| // CHECK-NEXT: fmul z0.h, p0/m, z0.h, #2.0000000000000000000000001 |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| fmul z0.h, p0/m, z0.h, #1.9999999999999999999999999 |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 2.0. |
| // CHECK-NEXT: fmul z0.h, p0/m, z0.h, #1.9999999999999999999999999 |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| |
| // --------------------------------------------------------------------------// |
| // Restricted ZPR range |
| |
| fmul z0.h, z0.h, z8.b[0] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.h..z7.h |
| // CHECK-NEXT: fmul z0.h, z0.h, z8.b[0] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| fmul z0.h, z0.h, z8.h[0] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.h..z7.h |
| // CHECK-NEXT: fmul z0.h, z0.h, z8.h[0] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| fmul z0.s, z0.s, z8.s[0] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.s..z7.s |
| // CHECK-NEXT: fmul z0.s, z0.s, z8.s[0] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| fmul z0.d, z0.d, z16.d[0] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.d..z15.d |
| // CHECK-NEXT: fmul z0.d, z0.d, z16.d[0] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| |
| // --------------------------------------------------------------------------// |
| // Index out of bounds |
| |
| fmul z0.h, z0.h, z0.h[-1] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7]. |
| // CHECK-NEXT: fmul z0.h, z0.h, z0.h[-1] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| fmul z0.h, z0.h, z0.h[8] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7]. |
| // CHECK-NEXT: fmul z0.h, z0.h, z0.h[8] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| fmul z0.s, z0.s, z0.s[-1] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3]. |
| // CHECK-NEXT: fmul z0.s, z0.s, z0.s[-1] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| fmul z0.s, z0.s, z0.s[4] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3]. |
| // CHECK-NEXT: fmul z0.s, z0.s, z0.s[4] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| fmul z0.d, z0.d, z0.d[-1] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1]. |
| // CHECK-NEXT: fmul z0.d, z0.d, z0.d[-1] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| fmul z0.d, z0.d, z0.d[2] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1]. |
| // CHECK-NEXT: fmul z0.d, z0.d, z0.d[2] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |