test/CodeGen/Mips/GlobalISel/legalizer/ceil_and_floor.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
--- |

  define void @ceil_f32() {entry: ret void}
  define void @ceil_f64() {entry: ret void}
  define void @floor_f32() {entry: ret void}
  define void @floor_f64() {entry: ret void}

...
---
name:            ceil_f32
alignment:       4
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $f12

    ; FP32-LABEL: name: ceil_f32
    ; FP32: liveins: $f12
    ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
    ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $f12 = COPY [[COPY]](s32)
    ; FP32: JAL &ceilf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $f0
    ; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $f0
    ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $f0 = COPY [[COPY1]](s32)
    ; FP32: RetRA implicit $f0
    ; FP64-LABEL: name: ceil_f32
    ; FP64: liveins: $f12
    ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
    ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $f12 = COPY [[COPY]](s32)
    ; FP64: JAL &ceilf, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $f0
    ; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $f0
    ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $f0 = COPY [[COPY1]](s32)
    ; FP64: RetRA implicit $f0
    %0:_(s32) = COPY $f12
    %1:_(s32) = G_FCEIL %0
    $f0 = COPY %1(s32)
    RetRA implicit $f0

...
---
name:            ceil_f64
alignment:       4
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $d6

    ; FP32-LABEL: name: ceil_f64
    ; FP32: liveins: $d6
    ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
    ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $d6 = COPY [[COPY]](s64)
    ; FP32: JAL &ceil, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit-def $d0
    ; FP32: [[COPY1:%[0-9]+]]:_(s64) = COPY $d0
    ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $d0 = COPY [[COPY1]](s64)
    ; FP32: RetRA implicit $d0
    ; FP64-LABEL: name: ceil_f64
    ; FP64: liveins: $d6
    ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
    ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $d12_64 = COPY [[COPY]](s64)
    ; FP64: JAL &ceil, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $d12_64, implicit-def $d0_64
    ; FP64: [[COPY1:%[0-9]+]]:_(s64) = COPY $d0_64
    ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $d0 = COPY [[COPY1]](s64)
    ; FP64: RetRA implicit $d0
    %0:_(s64) = COPY $d6
    %1:_(s64) = G_FCEIL %0
    $d0 = COPY %1(s64)
    RetRA implicit $d0

...
---
name:            floor_f32
alignment:       4
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $f12

    ; FP32-LABEL: name: floor_f32
    ; FP32: liveins: $f12
    ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
    ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $f12 = COPY [[COPY]](s32)
    ; FP32: JAL &floorf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $f0
    ; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $f0
    ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $f0 = COPY [[COPY1]](s32)
    ; FP32: RetRA implicit $f0
    ; FP64-LABEL: name: floor_f32
    ; FP64: liveins: $f12
    ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
    ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $f12 = COPY [[COPY]](s32)
    ; FP64: JAL &floorf, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $f0
    ; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $f0
    ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $f0 = COPY [[COPY1]](s32)
    ; FP64: RetRA implicit $f0
    %0:_(s32) = COPY $f12
    %1:_(s32) = G_FFLOOR %0
    $f0 = COPY %1(s32)
    RetRA implicit $f0

...
---
name:            floor_f64
alignment:       4
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $d6

    ; FP32-LABEL: name: floor_f64
    ; FP32: liveins: $d6
    ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
    ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $d6 = COPY [[COPY]](s64)
    ; FP32: JAL &floor, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit-def $d0
    ; FP32: [[COPY1:%[0-9]+]]:_(s64) = COPY $d0
    ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $d0 = COPY [[COPY1]](s64)
    ; FP32: RetRA implicit $d0
    ; FP64-LABEL: name: floor_f64
    ; FP64: liveins: $d6
    ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
    ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $d12_64 = COPY [[COPY]](s64)
    ; FP64: JAL &floor, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $d12_64, implicit-def $d0_64
    ; FP64: [[COPY1:%[0-9]+]]:_(s64) = COPY $d0_64
    ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $d0 = COPY [[COPY1]](s64)
    ; FP64: RetRA implicit $d0
    %0:_(s64) = COPY $d6
    %1:_(s64) = G_FFLOOR %0
    $d0 = COPY %1(s64)
    RetRA implicit $d0

...