[AArch64][GlobalISel] Fix an assertion during G_UNMERGE selection for s128 types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@369172 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/AArch64/AArch64InstructionSelector.cpp b/lib/Target/AArch64/AArch64InstructionSelector.cpp
index 0c808bc..bab15dd 100644
--- a/lib/Target/AArch64/AArch64InstructionSelector.cpp
+++ b/lib/Target/AArch64/AArch64InstructionSelector.cpp
@@ -2963,7 +2963,9 @@
const LLT NarrowTy = MRI.getType(I.getOperand(0).getReg());
const LLT WideTy = MRI.getType(SrcReg);
(void)WideTy;
- assert(WideTy.isVector() && "can only unmerge from vector types!");
+ assert(WideTy.isVector() ||
+ WideTy.getSizeInBits() == 128 &&
+ "can only unmerge from vector or s128 types!");
assert(WideTy.getSizeInBits() > NarrowTy.getSizeInBits() &&
"source register size too small!");
diff --git a/test/CodeGen/AArch64/GlobalISel/select-unmerge.mir b/test/CodeGen/AArch64/GlobalISel/select-unmerge.mir
index fdc5f12..5162fa2 100644
--- a/test/CodeGen/AArch64/GlobalISel/select-unmerge.mir
+++ b/test/CodeGen/AArch64/GlobalISel/select-unmerge.mir
@@ -27,6 +27,8 @@
ret <2 x half> undef
}
+ define void @test_s128(i128 %p) { ret void }
+
...
---
name: test_v2s64_unmerge
@@ -208,3 +210,18 @@
$s1 = COPY %2(<2 x s16>)
RET_ReallyLR implicit $s0
...
+---
+name: test_s128
+alignment: 2
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $q0
+ %0:fpr(s128) = COPY $q0
+ %1:fpr(s64), %2:fpr(s64) = G_UNMERGE_VALUES %0(s128)
+ $d0 = COPY %1(s64)
+ $d1 = COPY %2(s64)
+ RET_ReallyLR implicit $d0, implicit $d1
+...
