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llvm
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llvm
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e3d0d4094bea4050a1e5f4d20a0b2ab36ca35803
/
.
/
test
/
CodeGen
/
Hexagon
/
vect
/
vect-vaddh.ll
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; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK: vaddh
define
<
2
x
i16
>
@t_i2x16
(<
2
x
i16
>
%a
,
<
2
x
i16
>
%b
)
nounwind
{
entry
:
%0
=
add
<
2
x
i16
>
%a
,
%b
ret
<
2
x
i16
>
%0
}