blob: a14d2303a7d8bee6803947c776f263aec86d1ca1 [file] [log] [blame]
# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser reports an error when it encounters an
# unknown register class.
--- |
define i32 @test(i32 %a) {
entry:
ret i32 %a
}
...
---
name: test
isSSA: true
tracksRegLiveness: true
registers:
# CHECK: [[@LINE+1]]:20: use of undefined register class 'gr3200'
- {id: 0, class: 'gr3200'}
body:
- id: 0
name: entry
instructions:
- 'RETQ %eax'
...