| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s |
| # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s |
| |
| --- |
| name: readlane_ss |
| legalized: true |
| |
| body: | |
| bb.0: |
| liveins: $sgpr0, $sgpr1 |
| ; CHECK-LABEL: name: readlane_ss |
| ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1 |
| ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32) |
| ; CHECK: [[INT:%[0-9]+]]:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readlane), [[COPY2]](s32), [[COPY1]](s32) |
| %0:_(s32) = COPY $sgpr0 |
| %1:_(s32) = COPY $sgpr1 |
| %2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readlane), %0, %1 |
| ... |
| |
| --- |
| name: readlane_vs |
| legalized: true |
| |
| body: | |
| bb.0: |
| liveins: $vgpr0, $sgpr0 |
| ; CHECK-LABEL: name: readlane_vs |
| ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 |
| ; CHECK: [[INT:%[0-9]+]]:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readlane), [[COPY]](s32), [[COPY1]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $sgpr0 |
| %2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readlane), %0, %1 |
| ... |
| |
| --- |
| name: readlane_vv |
| legalized: true |
| |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| ; CHECK-LABEL: name: readlane_vv |
| ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 |
| ; CHECK: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[COPY1]](s32), implicit $exec |
| ; CHECK: [[INT:%[0-9]+]]:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readlane), [[COPY]](s32), [[V_READFIRSTLANE_B32_]] |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readlane), %0, %1 |
| ... |
| |
| --- |
| name: readlane_sv |
| legalized: true |
| |
| body: | |
| bb.0: |
| liveins: $vgpr0, $sgpr0 |
| ; CHECK-LABEL: name: readlane_sv |
| ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32) |
| ; CHECK: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[COPY1]](s32), implicit $exec |
| ; CHECK: [[INT:%[0-9]+]]:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readlane), [[COPY2]](s32), [[V_READFIRSTLANE_B32_]] |
| %0:_(s32) = COPY $sgpr0 |
| %1:_(s32) = COPY $vgpr0 |
| %2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readlane), %0, %1 |
| ... |