| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ |
| ; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ |
| ; RUN: FileCheck %s --check-prefix=CHECK-P8 |
| ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ |
| ; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ |
| ; RUN: FileCheck %s --check-prefix=CHECK-P9 |
| ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \ |
| ; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ |
| ; RUN: FileCheck %s --check-prefix=CHECK-BE |
| |
| define i64 @test2elt(i16 %a.coerce) local_unnamed_addr #0 { |
| ; CHECK-P8-LABEL: test2elt: |
| ; CHECK-P8: # %bb.0: # %entry |
| ; CHECK-P8-NEXT: mtvsrd f0, r3 |
| ; CHECK-P8-NEXT: mfvsrd r3, f0 |
| ; CHECK-P8-NEXT: clrldi r4, r3, 56 |
| ; CHECK-P8-NEXT: rldicl r3, r3, 56, 56 |
| ; CHECK-P8-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-P8-NEXT: rlwinm r3, r3, 0, 24, 31 |
| ; CHECK-P8-NEXT: mtvsrwz f0, r4 |
| ; CHECK-P8-NEXT: mtvsrwz f1, r3 |
| ; CHECK-P8-NEXT: xscvuxdsp f0, f0 |
| ; CHECK-P8-NEXT: xscvuxdsp f1, f1 |
| ; CHECK-P8-NEXT: xscvdpspn vs0, f0 |
| ; CHECK-P8-NEXT: xscvdpspn vs1, f1 |
| ; CHECK-P8-NEXT: xxsldwi v2, vs0, vs0, 1 |
| ; CHECK-P8-NEXT: xxsldwi v3, vs1, vs1, 1 |
| ; CHECK-P8-NEXT: vmrglw v2, v3, v2 |
| ; CHECK-P8-NEXT: xxswapd vs0, v2 |
| ; CHECK-P8-NEXT: mfvsrd r3, f0 |
| ; CHECK-P8-NEXT: blr |
| ; |
| ; CHECK-P9-LABEL: test2elt: |
| ; CHECK-P9: # %bb.0: # %entry |
| ; CHECK-P9-NEXT: mtvsrws v2, r3 |
| ; CHECK-P9-NEXT: li r3, 0 |
| ; CHECK-P9-NEXT: li r4, 1 |
| ; CHECK-P9-NEXT: vextubrx r3, r3, v2 |
| ; CHECK-P9-NEXT: vextubrx r4, r4, v2 |
| ; CHECK-P9-NEXT: rlwinm r3, r3, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-P9-NEXT: mtvsrwz f0, r3 |
| ; CHECK-P9-NEXT: mtvsrwz f1, r4 |
| ; CHECK-P9-NEXT: xscvuxdsp f0, f0 |
| ; CHECK-P9-NEXT: xscvuxdsp f1, f1 |
| ; CHECK-P9-NEXT: xscvdpspn vs0, f0 |
| ; CHECK-P9-NEXT: xscvdpspn vs1, f1 |
| ; CHECK-P9-NEXT: xxsldwi v2, vs0, vs0, 1 |
| ; CHECK-P9-NEXT: xxsldwi v3, vs1, vs1, 1 |
| ; CHECK-P9-NEXT: vmrglw v2, v3, v2 |
| ; CHECK-P9-NEXT: mfvsrld r3, v2 |
| ; CHECK-P9-NEXT: blr |
| ; |
| ; CHECK-BE-LABEL: test2elt: |
| ; CHECK-BE: # %bb.0: # %entry |
| ; CHECK-BE-NEXT: mtvsrws v2, r3 |
| ; CHECK-BE-NEXT: li r3, 1 |
| ; CHECK-BE-NEXT: li r4, 0 |
| ; CHECK-BE-NEXT: vextublx r3, r3, v2 |
| ; CHECK-BE-NEXT: vextublx r4, r4, v2 |
| ; CHECK-BE-NEXT: rlwinm r3, r3, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-BE-NEXT: mtvsrwz f0, r3 |
| ; CHECK-BE-NEXT: mtvsrwz f1, r4 |
| ; CHECK-BE-NEXT: xscvuxdsp f0, f0 |
| ; CHECK-BE-NEXT: xscvuxdsp f1, f1 |
| ; CHECK-BE-NEXT: xscvdpspn v2, f0 |
| ; CHECK-BE-NEXT: xscvdpspn v3, f1 |
| ; CHECK-BE-NEXT: vmrghw v2, v3, v2 |
| ; CHECK-BE-NEXT: mfvsrd r3, v2 |
| ; CHECK-BE-NEXT: blr |
| entry: |
| %0 = bitcast i16 %a.coerce to <2 x i8> |
| %1 = uitofp <2 x i8> %0 to <2 x float> |
| %2 = bitcast <2 x float> %1 to i64 |
| ret i64 %2 |
| } |
| |
| define <4 x float> @test4elt(i32 %a.coerce) local_unnamed_addr #1 { |
| ; CHECK-P8-LABEL: test4elt: |
| ; CHECK-P8: # %bb.0: # %entry |
| ; CHECK-P8-NEXT: mtvsrd f0, r3 |
| ; CHECK-P8-NEXT: mfvsrd r3, f0 |
| ; CHECK-P8-NEXT: clrldi r4, r3, 56 |
| ; CHECK-P8-NEXT: rldicl r5, r3, 48, 56 |
| ; CHECK-P8-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-P8-NEXT: rlwinm r5, r5, 0, 24, 31 |
| ; CHECK-P8-NEXT: mtvsrwz f0, r4 |
| ; CHECK-P8-NEXT: rldicl r4, r3, 56, 56 |
| ; CHECK-P8-NEXT: rldicl r3, r3, 40, 56 |
| ; CHECK-P8-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-P8-NEXT: rlwinm r3, r3, 0, 24, 31 |
| ; CHECK-P8-NEXT: mtvsrwz f1, r5 |
| ; CHECK-P8-NEXT: mtvsrwz f2, r4 |
| ; CHECK-P8-NEXT: mtvsrwz f3, r3 |
| ; CHECK-P8-NEXT: xscvuxdsp f0, f0 |
| ; CHECK-P8-NEXT: xscvuxdsp f1, f1 |
| ; CHECK-P8-NEXT: xscvuxdsp f2, f2 |
| ; CHECK-P8-NEXT: xscvuxdsp f3, f3 |
| ; CHECK-P8-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-P8-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-P8-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-P8-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-P8-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-P8-NEXT: blr |
| ; |
| ; CHECK-P9-LABEL: test4elt: |
| ; CHECK-P9: # %bb.0: # %entry |
| ; CHECK-P9-NEXT: mtvsrws v2, r3 |
| ; CHECK-P9-NEXT: li r3, 0 |
| ; CHECK-P9-NEXT: li r4, 2 |
| ; CHECK-P9-NEXT: li r5, 1 |
| ; CHECK-P9-NEXT: li r6, 3 |
| ; CHECK-P9-NEXT: vextubrx r3, r3, v2 |
| ; CHECK-P9-NEXT: vextubrx r4, r4, v2 |
| ; CHECK-P9-NEXT: vextubrx r5, r5, v2 |
| ; CHECK-P9-NEXT: vextubrx r6, r6, v2 |
| ; CHECK-P9-NEXT: rlwinm r3, r3, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r5, r5, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r6, r6, 0, 24, 31 |
| ; CHECK-P9-NEXT: mtvsrwz f0, r3 |
| ; CHECK-P9-NEXT: mtvsrwz f1, r4 |
| ; CHECK-P9-NEXT: mtvsrwz f2, r5 |
| ; CHECK-P9-NEXT: mtvsrwz f3, r6 |
| ; CHECK-P9-NEXT: xscvuxdsp f0, f0 |
| ; CHECK-P9-NEXT: xscvuxdsp f1, f1 |
| ; CHECK-P9-NEXT: xscvuxdsp f2, f2 |
| ; CHECK-P9-NEXT: xscvuxdsp f3, f3 |
| ; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-P9-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-P9-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-P9-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-P9-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-P9-NEXT: blr |
| ; |
| ; CHECK-BE-LABEL: test4elt: |
| ; CHECK-BE: # %bb.0: # %entry |
| ; CHECK-BE-NEXT: mtvsrws v2, r3 |
| ; CHECK-BE-NEXT: li r3, 3 |
| ; CHECK-BE-NEXT: li r4, 1 |
| ; CHECK-BE-NEXT: li r5, 2 |
| ; CHECK-BE-NEXT: li r6, 0 |
| ; CHECK-BE-NEXT: vextublx r3, r3, v2 |
| ; CHECK-BE-NEXT: vextublx r4, r4, v2 |
| ; CHECK-BE-NEXT: vextublx r5, r5, v2 |
| ; CHECK-BE-NEXT: vextublx r6, r6, v2 |
| ; CHECK-BE-NEXT: rlwinm r3, r3, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r5, r5, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r6, r6, 0, 24, 31 |
| ; CHECK-BE-NEXT: mtvsrwz f0, r3 |
| ; CHECK-BE-NEXT: mtvsrwz f1, r4 |
| ; CHECK-BE-NEXT: mtvsrwz f2, r5 |
| ; CHECK-BE-NEXT: mtvsrwz f3, r6 |
| ; CHECK-BE-NEXT: xscvuxdsp f0, f0 |
| ; CHECK-BE-NEXT: xscvuxdsp f1, f1 |
| ; CHECK-BE-NEXT: xscvuxdsp f2, f2 |
| ; CHECK-BE-NEXT: xscvuxdsp f3, f3 |
| ; CHECK-BE-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-BE-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-BE-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-BE-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-BE-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-BE-NEXT: blr |
| entry: |
| %0 = bitcast i32 %a.coerce to <4 x i8> |
| %1 = uitofp <4 x i8> %0 to <4 x float> |
| ret <4 x float> %1 |
| } |
| |
| define void @test8elt(<8 x float>* noalias nocapture sret %agg.result, i64 %a.coerce) local_unnamed_addr #2 { |
| ; CHECK-P8-LABEL: test8elt: |
| ; CHECK-P8: # %bb.0: # %entry |
| ; CHECK-P8-NEXT: mtvsrd f0, r4 |
| ; CHECK-P8-NEXT: li r5, 16 |
| ; CHECK-P8-NEXT: mfvsrd r4, f0 |
| ; CHECK-P8-NEXT: clrldi r6, r4, 56 |
| ; CHECK-P8-NEXT: rldicl r7, r4, 48, 56 |
| ; CHECK-P8-NEXT: rlwinm r6, r6, 0, 24, 31 |
| ; CHECK-P8-NEXT: rlwinm r7, r7, 0, 24, 31 |
| ; CHECK-P8-NEXT: mtvsrwz f0, r6 |
| ; CHECK-P8-NEXT: rldicl r6, r4, 56, 56 |
| ; CHECK-P8-NEXT: rlwinm r6, r6, 0, 24, 31 |
| ; CHECK-P8-NEXT: mtvsrwz f1, r7 |
| ; CHECK-P8-NEXT: rldicl r7, r4, 40, 56 |
| ; CHECK-P8-NEXT: mtvsrwz f2, r6 |
| ; CHECK-P8-NEXT: rldicl r6, r4, 32, 56 |
| ; CHECK-P8-NEXT: rlwinm r7, r7, 0, 24, 31 |
| ; CHECK-P8-NEXT: rlwinm r6, r6, 0, 24, 31 |
| ; CHECK-P8-NEXT: mtvsrwz f3, r7 |
| ; CHECK-P8-NEXT: rldicl r7, r4, 16, 56 |
| ; CHECK-P8-NEXT: mtvsrwz f4, r6 |
| ; CHECK-P8-NEXT: rldicl r6, r4, 24, 56 |
| ; CHECK-P8-NEXT: rldicl r4, r4, 8, 56 |
| ; CHECK-P8-NEXT: rlwinm r7, r7, 0, 24, 31 |
| ; CHECK-P8-NEXT: rlwinm r6, r6, 0, 24, 31 |
| ; CHECK-P8-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-P8-NEXT: mtvsrwz f5, r7 |
| ; CHECK-P8-NEXT: mtvsrwz f6, r6 |
| ; CHECK-P8-NEXT: mtvsrwz f7, r4 |
| ; CHECK-P8-NEXT: xscvuxdsp f0, f0 |
| ; CHECK-P8-NEXT: xscvuxdsp f1, f1 |
| ; CHECK-P8-NEXT: xscvuxdsp f2, f2 |
| ; CHECK-P8-NEXT: xscvuxdsp f3, f3 |
| ; CHECK-P8-NEXT: xscvuxdsp f4, f4 |
| ; CHECK-P8-NEXT: xscvuxdsp f5, f5 |
| ; CHECK-P8-NEXT: xscvuxdsp f6, f6 |
| ; CHECK-P8-NEXT: xscvuxdsp f7, f7 |
| ; CHECK-P8-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-P8-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-P8-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-P8-NEXT: xxmrghd vs2, vs5, vs4 |
| ; CHECK-P8-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-P8-NEXT: xxmrghd vs3, vs7, vs6 |
| ; CHECK-P8-NEXT: xvcvdpsp v4, vs2 |
| ; CHECK-P8-NEXT: xvcvdpsp v5, vs3 |
| ; CHECK-P8-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-P8-NEXT: vmrgew v3, v5, v4 |
| ; CHECK-P8-NEXT: stvx v2, 0, r3 |
| ; CHECK-P8-NEXT: stvx v3, r3, r5 |
| ; CHECK-P8-NEXT: blr |
| ; |
| ; CHECK-P9-LABEL: test8elt: |
| ; CHECK-P9: # %bb.0: # %entry |
| ; CHECK-P9-NEXT: mtvsrd f0, r4 |
| ; CHECK-P9-NEXT: li r4, 0 |
| ; CHECK-P9-NEXT: li r5, 2 |
| ; CHECK-P9-NEXT: li r6, 1 |
| ; CHECK-P9-NEXT: li r7, 3 |
| ; CHECK-P9-NEXT: li r8, 4 |
| ; CHECK-P9-NEXT: li r9, 6 |
| ; CHECK-P9-NEXT: li r10, 5 |
| ; CHECK-P9-NEXT: li r11, 7 |
| ; CHECK-P9-NEXT: xxswapd v2, vs0 |
| ; CHECK-P9-NEXT: vextubrx r4, r4, v2 |
| ; CHECK-P9-NEXT: vextubrx r5, r5, v2 |
| ; CHECK-P9-NEXT: vextubrx r6, r6, v2 |
| ; CHECK-P9-NEXT: vextubrx r7, r7, v2 |
| ; CHECK-P9-NEXT: vextubrx r8, r8, v2 |
| ; CHECK-P9-NEXT: vextubrx r9, r9, v2 |
| ; CHECK-P9-NEXT: vextubrx r10, r10, v2 |
| ; CHECK-P9-NEXT: vextubrx r11, r11, v2 |
| ; CHECK-P9-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r5, r5, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r6, r6, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r7, r7, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r8, r8, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r9, r9, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r10, r10, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r11, r11, 0, 24, 31 |
| ; CHECK-P9-NEXT: mtvsrwz f0, r4 |
| ; CHECK-P9-NEXT: mtvsrwz f1, r5 |
| ; CHECK-P9-NEXT: mtvsrwz f2, r6 |
| ; CHECK-P9-NEXT: mtvsrwz f3, r7 |
| ; CHECK-P9-NEXT: mtvsrwz f4, r8 |
| ; CHECK-P9-NEXT: mtvsrwz f5, r9 |
| ; CHECK-P9-NEXT: mtvsrwz f6, r10 |
| ; CHECK-P9-NEXT: mtvsrwz f7, r11 |
| ; CHECK-P9-NEXT: xscvuxdsp f0, f0 |
| ; CHECK-P9-NEXT: xscvuxdsp f1, f1 |
| ; CHECK-P9-NEXT: xscvuxdsp f2, f2 |
| ; CHECK-P9-NEXT: xscvuxdsp f3, f3 |
| ; CHECK-P9-NEXT: xscvuxdsp f4, f4 |
| ; CHECK-P9-NEXT: xscvuxdsp f5, f5 |
| ; CHECK-P9-NEXT: xscvuxdsp f6, f6 |
| ; CHECK-P9-NEXT: xscvuxdsp f7, f7 |
| ; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-P9-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-P9-NEXT: xxmrghd vs2, vs5, vs4 |
| ; CHECK-P9-NEXT: xxmrghd vs3, vs7, vs6 |
| ; CHECK-P9-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-P9-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-P9-NEXT: xvcvdpsp v4, vs2 |
| ; CHECK-P9-NEXT: xvcvdpsp v5, vs3 |
| ; CHECK-P9-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-P9-NEXT: vmrgew v3, v5, v4 |
| ; CHECK-P9-NEXT: stxv v3, 16(r3) |
| ; CHECK-P9-NEXT: stxv v2, 0(r3) |
| ; CHECK-P9-NEXT: blr |
| ; |
| ; CHECK-BE-LABEL: test8elt: |
| ; CHECK-BE: # %bb.0: # %entry |
| ; CHECK-BE-NEXT: li r5, 3 |
| ; CHECK-BE-NEXT: mtvsrd v2, r4 |
| ; CHECK-BE-NEXT: li r4, 1 |
| ; CHECK-BE-NEXT: li r6, 2 |
| ; CHECK-BE-NEXT: li r7, 0 |
| ; CHECK-BE-NEXT: li r8, 7 |
| ; CHECK-BE-NEXT: li r9, 5 |
| ; CHECK-BE-NEXT: li r10, 6 |
| ; CHECK-BE-NEXT: li r11, 4 |
| ; CHECK-BE-NEXT: vextublx r5, r5, v2 |
| ; CHECK-BE-NEXT: vextublx r4, r4, v2 |
| ; CHECK-BE-NEXT: vextublx r6, r6, v2 |
| ; CHECK-BE-NEXT: vextublx r7, r7, v2 |
| ; CHECK-BE-NEXT: vextublx r8, r8, v2 |
| ; CHECK-BE-NEXT: vextublx r9, r9, v2 |
| ; CHECK-BE-NEXT: vextublx r10, r10, v2 |
| ; CHECK-BE-NEXT: vextublx r11, r11, v2 |
| ; CHECK-BE-NEXT: rlwinm r5, r5, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r6, r6, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r7, r7, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r8, r8, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r9, r9, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r10, r10, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r11, r11, 0, 24, 31 |
| ; CHECK-BE-NEXT: mtvsrwz f0, r5 |
| ; CHECK-BE-NEXT: mtvsrwz f1, r4 |
| ; CHECK-BE-NEXT: mtvsrwz f2, r6 |
| ; CHECK-BE-NEXT: mtvsrwz f3, r7 |
| ; CHECK-BE-NEXT: mtvsrwz f4, r8 |
| ; CHECK-BE-NEXT: mtvsrwz f5, r9 |
| ; CHECK-BE-NEXT: mtvsrwz f6, r10 |
| ; CHECK-BE-NEXT: mtvsrwz f7, r11 |
| ; CHECK-BE-NEXT: xscvuxdsp f0, f0 |
| ; CHECK-BE-NEXT: xscvuxdsp f1, f1 |
| ; CHECK-BE-NEXT: xscvuxdsp f2, f2 |
| ; CHECK-BE-NEXT: xscvuxdsp f3, f3 |
| ; CHECK-BE-NEXT: xscvuxdsp f4, f4 |
| ; CHECK-BE-NEXT: xscvuxdsp f5, f5 |
| ; CHECK-BE-NEXT: xscvuxdsp f6, f6 |
| ; CHECK-BE-NEXT: xscvuxdsp f7, f7 |
| ; CHECK-BE-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-BE-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-BE-NEXT: xxmrghd vs2, vs5, vs4 |
| ; CHECK-BE-NEXT: xxmrghd vs3, vs7, vs6 |
| ; CHECK-BE-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-BE-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-BE-NEXT: xvcvdpsp v4, vs2 |
| ; CHECK-BE-NEXT: xvcvdpsp v5, vs3 |
| ; CHECK-BE-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-BE-NEXT: vmrgew v3, v5, v4 |
| ; CHECK-BE-NEXT: stxv v2, 0(r3) |
| ; CHECK-BE-NEXT: stxv v3, 16(r3) |
| ; CHECK-BE-NEXT: blr |
| entry: |
| %0 = bitcast i64 %a.coerce to <8 x i8> |
| %1 = uitofp <8 x i8> %0 to <8 x float> |
| store <8 x float> %1, <8 x float>* %agg.result, align 32 |
| ret void |
| } |
| |
| define void @test16elt(<16 x float>* noalias nocapture sret %agg.result, <16 x i8> %a) local_unnamed_addr #3 { |
| ; CHECK-P8-LABEL: test16elt: |
| ; CHECK-P8: # %bb.0: # %entry |
| ; CHECK-P8-NEXT: mfvsrd r4, v2 |
| ; CHECK-P8-NEXT: xxswapd vs2, v2 |
| ; CHECK-P8-NEXT: clrldi r5, r4, 56 |
| ; CHECK-P8-NEXT: rldicl r6, r4, 48, 56 |
| ; CHECK-P8-NEXT: rlwinm r5, r5, 0, 24, 31 |
| ; CHECK-P8-NEXT: rlwinm r6, r6, 0, 24, 31 |
| ; CHECK-P8-NEXT: mtvsrwz f0, r5 |
| ; CHECK-P8-NEXT: rldicl r5, r4, 40, 56 |
| ; CHECK-P8-NEXT: rldicl r7, r4, 56, 56 |
| ; CHECK-P8-NEXT: mtvsrwz f1, r6 |
| ; CHECK-P8-NEXT: rldicl r6, r4, 32, 56 |
| ; CHECK-P8-NEXT: rlwinm r5, r5, 0, 24, 31 |
| ; CHECK-P8-NEXT: rlwinm r7, r7, 0, 24, 31 |
| ; CHECK-P8-NEXT: rlwinm r6, r6, 0, 24, 31 |
| ; CHECK-P8-NEXT: mtvsrwz f4, r5 |
| ; CHECK-P8-NEXT: rldicl r5, r4, 16, 56 |
| ; CHECK-P8-NEXT: mtvsrwz f3, r7 |
| ; CHECK-P8-NEXT: rlwinm r5, r5, 0, 24, 31 |
| ; CHECK-P8-NEXT: mtvsrwz f5, r6 |
| ; CHECK-P8-NEXT: rldicl r6, r4, 24, 56 |
| ; CHECK-P8-NEXT: rldicl r4, r4, 8, 56 |
| ; CHECK-P8-NEXT: mfvsrd r7, f2 |
| ; CHECK-P8-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-P8-NEXT: mtvsrwz f2, r5 |
| ; CHECK-P8-NEXT: rlwinm r5, r6, 0, 24, 31 |
| ; CHECK-P8-NEXT: mtvsrwz f6, r5 |
| ; CHECK-P8-NEXT: clrldi r5, r7, 56 |
| ; CHECK-P8-NEXT: mtvsrwz f7, r4 |
| ; CHECK-P8-NEXT: rldicl r4, r7, 48, 56 |
| ; CHECK-P8-NEXT: rlwinm r5, r5, 0, 24, 31 |
| ; CHECK-P8-NEXT: mtvsrwz f8, r5 |
| ; CHECK-P8-NEXT: rldicl r5, r7, 56, 56 |
| ; CHECK-P8-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-P8-NEXT: mtvsrwz f9, r4 |
| ; CHECK-P8-NEXT: rlwinm r4, r5, 0, 24, 31 |
| ; CHECK-P8-NEXT: rldicl r5, r7, 8, 56 |
| ; CHECK-P8-NEXT: mtvsrwz f10, r4 |
| ; CHECK-P8-NEXT: rldicl r4, r7, 40, 56 |
| ; CHECK-P8-NEXT: rlwinm r5, r5, 0, 24, 31 |
| ; CHECK-P8-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-P8-NEXT: xscvuxdsp f0, f0 |
| ; CHECK-P8-NEXT: mtvsrwz f11, r4 |
| ; CHECK-P8-NEXT: rldicl r4, r7, 32, 56 |
| ; CHECK-P8-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-P8-NEXT: xscvuxdsp f1, f1 |
| ; CHECK-P8-NEXT: xscvuxdsp f3, f3 |
| ; CHECK-P8-NEXT: xscvuxdsp f4, f4 |
| ; CHECK-P8-NEXT: mtvsrwz f12, r4 |
| ; CHECK-P8-NEXT: rldicl r4, r7, 16, 56 |
| ; CHECK-P8-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-P8-NEXT: xscvuxdsp f5, f5 |
| ; CHECK-P8-NEXT: mtvsrwz f13, r4 |
| ; CHECK-P8-NEXT: rldicl r4, r7, 24, 56 |
| ; CHECK-P8-NEXT: xscvuxdsp f2, f2 |
| ; CHECK-P8-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-P8-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-P8-NEXT: mtvsrwz v2, r4 |
| ; CHECK-P8-NEXT: li r4, 48 |
| ; CHECK-P8-NEXT: mtvsrwz v3, r5 |
| ; CHECK-P8-NEXT: xxmrghd vs3, vs4, vs3 |
| ; CHECK-P8-NEXT: li r5, 32 |
| ; CHECK-P8-NEXT: xscvuxdsp f6, f6 |
| ; CHECK-P8-NEXT: xscvuxdsp f7, f7 |
| ; CHECK-P8-NEXT: xscvuxdsp f8, f8 |
| ; CHECK-P8-NEXT: xscvuxdsp f9, f9 |
| ; CHECK-P8-NEXT: xxmrghd vs2, vs2, vs5 |
| ; CHECK-P8-NEXT: xscvuxdsp f10, f10 |
| ; CHECK-P8-NEXT: xscvuxdsp f11, f11 |
| ; CHECK-P8-NEXT: xscvuxdsp f12, f12 |
| ; CHECK-P8-NEXT: xscvuxdsp f13, f13 |
| ; CHECK-P8-NEXT: xxmrghd vs5, vs7, vs6 |
| ; CHECK-P8-NEXT: xscvuxdsp f1, v2 |
| ; CHECK-P8-NEXT: xscvuxdsp f4, v3 |
| ; CHECK-P8-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-P8-NEXT: xxmrghd vs0, vs9, vs8 |
| ; CHECK-P8-NEXT: xvcvdpsp v3, vs3 |
| ; CHECK-P8-NEXT: xxmrghd vs3, vs11, vs10 |
| ; CHECK-P8-NEXT: xvcvdpsp v4, vs2 |
| ; CHECK-P8-NEXT: xxmrghd vs2, vs13, vs12 |
| ; CHECK-P8-NEXT: xvcvdpsp v5, vs5 |
| ; CHECK-P8-NEXT: xvcvdpsp v0, vs0 |
| ; CHECK-P8-NEXT: xxmrghd vs1, vs4, vs1 |
| ; CHECK-P8-NEXT: xvcvdpsp v1, vs3 |
| ; CHECK-P8-NEXT: xvcvdpsp v6, vs2 |
| ; CHECK-P8-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-P8-NEXT: xvcvdpsp v7, vs1 |
| ; CHECK-P8-NEXT: vmrgew v3, v5, v4 |
| ; CHECK-P8-NEXT: vmrgew v4, v1, v0 |
| ; CHECK-P8-NEXT: stvx v2, r3, r5 |
| ; CHECK-P8-NEXT: vmrgew v5, v7, v6 |
| ; CHECK-P8-NEXT: stvx v3, r3, r4 |
| ; CHECK-P8-NEXT: li r4, 16 |
| ; CHECK-P8-NEXT: stvx v4, 0, r3 |
| ; CHECK-P8-NEXT: stvx v5, r3, r4 |
| ; CHECK-P8-NEXT: blr |
| ; |
| ; CHECK-P9-LABEL: test16elt: |
| ; CHECK-P9: # %bb.0: # %entry |
| ; CHECK-P9-NEXT: std r25, -72(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: std r26, -64(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: std r27, -56(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: std r28, -48(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: std r29, -40(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: li r4, 0 |
| ; CHECK-P9-NEXT: std r30, -32(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: li r5, 2 |
| ; CHECK-P9-NEXT: li r6, 1 |
| ; CHECK-P9-NEXT: li r7, 3 |
| ; CHECK-P9-NEXT: li r8, 4 |
| ; CHECK-P9-NEXT: li r9, 6 |
| ; CHECK-P9-NEXT: li r10, 5 |
| ; CHECK-P9-NEXT: li r11, 7 |
| ; CHECK-P9-NEXT: li r12, 8 |
| ; CHECK-P9-NEXT: li r0, 10 |
| ; CHECK-P9-NEXT: li r30, 9 |
| ; CHECK-P9-NEXT: li r29, 11 |
| ; CHECK-P9-NEXT: li r28, 12 |
| ; CHECK-P9-NEXT: li r27, 14 |
| ; CHECK-P9-NEXT: li r26, 13 |
| ; CHECK-P9-NEXT: li r25, 15 |
| ; CHECK-P9-NEXT: stfd f30, -16(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: stfd f31, -8(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: vextubrx r4, r4, v2 |
| ; CHECK-P9-NEXT: vextubrx r5, r5, v2 |
| ; CHECK-P9-NEXT: vextubrx r6, r6, v2 |
| ; CHECK-P9-NEXT: vextubrx r7, r7, v2 |
| ; CHECK-P9-NEXT: vextubrx r8, r8, v2 |
| ; CHECK-P9-NEXT: vextubrx r9, r9, v2 |
| ; CHECK-P9-NEXT: vextubrx r10, r10, v2 |
| ; CHECK-P9-NEXT: vextubrx r11, r11, v2 |
| ; CHECK-P9-NEXT: vextubrx r12, r12, v2 |
| ; CHECK-P9-NEXT: vextubrx r0, r0, v2 |
| ; CHECK-P9-NEXT: vextubrx r30, r30, v2 |
| ; CHECK-P9-NEXT: vextubrx r29, r29, v2 |
| ; CHECK-P9-NEXT: vextubrx r28, r28, v2 |
| ; CHECK-P9-NEXT: vextubrx r27, r27, v2 |
| ; CHECK-P9-NEXT: vextubrx r26, r26, v2 |
| ; CHECK-P9-NEXT: vextubrx r25, r25, v2 |
| ; CHECK-P9-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r5, r5, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r6, r6, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r7, r7, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r8, r8, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r9, r9, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r10, r10, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r11, r11, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r12, r12, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r0, r0, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r30, r30, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r29, r29, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r28, r28, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r27, r27, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r26, r26, 0, 24, 31 |
| ; CHECK-P9-NEXT: rlwinm r25, r25, 0, 24, 31 |
| ; CHECK-P9-NEXT: mtvsrwz f0, r4 |
| ; CHECK-P9-NEXT: mtvsrwz f1, r5 |
| ; CHECK-P9-NEXT: mtvsrwz f2, r6 |
| ; CHECK-P9-NEXT: mtvsrwz f3, r7 |
| ; CHECK-P9-NEXT: mtvsrwz f4, r8 |
| ; CHECK-P9-NEXT: mtvsrwz f5, r9 |
| ; CHECK-P9-NEXT: mtvsrwz f6, r10 |
| ; CHECK-P9-NEXT: mtvsrwz f7, r11 |
| ; CHECK-P9-NEXT: mtvsrwz f8, r12 |
| ; CHECK-P9-NEXT: mtvsrwz f9, r0 |
| ; CHECK-P9-NEXT: mtvsrwz f10, r30 |
| ; CHECK-P9-NEXT: ld r30, -32(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: mtvsrwz f11, r29 |
| ; CHECK-P9-NEXT: ld r29, -40(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: mtvsrwz f12, r28 |
| ; CHECK-P9-NEXT: ld r28, -48(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: mtvsrwz f13, r27 |
| ; CHECK-P9-NEXT: ld r27, -56(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: mtvsrwz v2, r26 |
| ; CHECK-P9-NEXT: ld r26, -64(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: mtvsrwz v3, r25 |
| ; CHECK-P9-NEXT: ld r25, -72(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: xscvuxdsp f0, f0 |
| ; CHECK-P9-NEXT: xscvuxdsp f1, f1 |
| ; CHECK-P9-NEXT: xscvuxdsp f2, f2 |
| ; CHECK-P9-NEXT: xscvuxdsp f3, f3 |
| ; CHECK-P9-NEXT: xscvuxdsp f4, f4 |
| ; CHECK-P9-NEXT: xscvuxdsp f5, f5 |
| ; CHECK-P9-NEXT: xscvuxdsp f6, f6 |
| ; CHECK-P9-NEXT: xscvuxdsp f7, f7 |
| ; CHECK-P9-NEXT: xscvuxdsp f8, f8 |
| ; CHECK-P9-NEXT: xscvuxdsp f9, f9 |
| ; CHECK-P9-NEXT: xscvuxdsp f10, f10 |
| ; CHECK-P9-NEXT: xscvuxdsp f11, f11 |
| ; CHECK-P9-NEXT: xscvuxdsp f12, f12 |
| ; CHECK-P9-NEXT: xscvuxdsp f13, f13 |
| ; CHECK-P9-NEXT: xscvuxdsp f31, v2 |
| ; CHECK-P9-NEXT: xscvuxdsp f30, v3 |
| ; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-P9-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-P9-NEXT: xxmrghd vs2, vs5, vs4 |
| ; CHECK-P9-NEXT: xxmrghd vs3, vs7, vs6 |
| ; CHECK-P9-NEXT: xxmrghd vs4, vs9, vs8 |
| ; CHECK-P9-NEXT: xxmrghd vs5, vs11, vs10 |
| ; CHECK-P9-NEXT: xxmrghd vs6, vs13, vs12 |
| ; CHECK-P9-NEXT: xxmrghd vs7, vs30, vs31 |
| ; CHECK-P9-NEXT: lfd f31, -8(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: lfd f30, -16(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-P9-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-P9-NEXT: xvcvdpsp v4, vs2 |
| ; CHECK-P9-NEXT: xvcvdpsp v5, vs3 |
| ; CHECK-P9-NEXT: xvcvdpsp v0, vs4 |
| ; CHECK-P9-NEXT: xvcvdpsp v1, vs5 |
| ; CHECK-P9-NEXT: xvcvdpsp v6, vs6 |
| ; CHECK-P9-NEXT: xvcvdpsp v7, vs7 |
| ; CHECK-P9-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-P9-NEXT: vmrgew v3, v5, v4 |
| ; CHECK-P9-NEXT: vmrgew v4, v1, v0 |
| ; CHECK-P9-NEXT: vmrgew v5, v7, v6 |
| ; CHECK-P9-NEXT: stxv v3, 16(r3) |
| ; CHECK-P9-NEXT: stxv v2, 0(r3) |
| ; CHECK-P9-NEXT: stxv v5, 48(r3) |
| ; CHECK-P9-NEXT: stxv v4, 32(r3) |
| ; CHECK-P9-NEXT: blr |
| ; |
| ; CHECK-BE-LABEL: test16elt: |
| ; CHECK-BE: # %bb.0: # %entry |
| ; CHECK-BE-NEXT: std r25, -72(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: std r26, -64(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: std r27, -56(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: std r28, -48(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: std r29, -40(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: li r4, 3 |
| ; CHECK-BE-NEXT: std r30, -32(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: li r5, 1 |
| ; CHECK-BE-NEXT: li r6, 2 |
| ; CHECK-BE-NEXT: li r7, 0 |
| ; CHECK-BE-NEXT: li r8, 7 |
| ; CHECK-BE-NEXT: li r9, 5 |
| ; CHECK-BE-NEXT: li r10, 6 |
| ; CHECK-BE-NEXT: li r11, 4 |
| ; CHECK-BE-NEXT: li r12, 11 |
| ; CHECK-BE-NEXT: li r0, 9 |
| ; CHECK-BE-NEXT: li r30, 10 |
| ; CHECK-BE-NEXT: li r29, 8 |
| ; CHECK-BE-NEXT: li r28, 15 |
| ; CHECK-BE-NEXT: li r27, 13 |
| ; CHECK-BE-NEXT: li r26, 14 |
| ; CHECK-BE-NEXT: li r25, 12 |
| ; CHECK-BE-NEXT: stfd f30, -16(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: stfd f31, -8(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: vextublx r4, r4, v2 |
| ; CHECK-BE-NEXT: vextublx r5, r5, v2 |
| ; CHECK-BE-NEXT: vextublx r6, r6, v2 |
| ; CHECK-BE-NEXT: vextublx r7, r7, v2 |
| ; CHECK-BE-NEXT: vextublx r8, r8, v2 |
| ; CHECK-BE-NEXT: vextublx r9, r9, v2 |
| ; CHECK-BE-NEXT: vextublx r10, r10, v2 |
| ; CHECK-BE-NEXT: vextublx r11, r11, v2 |
| ; CHECK-BE-NEXT: vextublx r12, r12, v2 |
| ; CHECK-BE-NEXT: vextublx r0, r0, v2 |
| ; CHECK-BE-NEXT: vextublx r30, r30, v2 |
| ; CHECK-BE-NEXT: vextublx r29, r29, v2 |
| ; CHECK-BE-NEXT: vextublx r28, r28, v2 |
| ; CHECK-BE-NEXT: vextublx r27, r27, v2 |
| ; CHECK-BE-NEXT: vextublx r26, r26, v2 |
| ; CHECK-BE-NEXT: vextublx r25, r25, v2 |
| ; CHECK-BE-NEXT: rlwinm r4, r4, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r5, r5, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r6, r6, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r7, r7, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r8, r8, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r9, r9, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r10, r10, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r11, r11, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r12, r12, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r0, r0, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r30, r30, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r29, r29, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r28, r28, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r27, r27, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r26, r26, 0, 24, 31 |
| ; CHECK-BE-NEXT: rlwinm r25, r25, 0, 24, 31 |
| ; CHECK-BE-NEXT: mtvsrwz f0, r4 |
| ; CHECK-BE-NEXT: mtvsrwz f1, r5 |
| ; CHECK-BE-NEXT: mtvsrwz f2, r6 |
| ; CHECK-BE-NEXT: mtvsrwz f3, r7 |
| ; CHECK-BE-NEXT: mtvsrwz f4, r8 |
| ; CHECK-BE-NEXT: mtvsrwz f5, r9 |
| ; CHECK-BE-NEXT: mtvsrwz f6, r10 |
| ; CHECK-BE-NEXT: mtvsrwz f7, r11 |
| ; CHECK-BE-NEXT: mtvsrwz f8, r12 |
| ; CHECK-BE-NEXT: mtvsrwz f9, r0 |
| ; CHECK-BE-NEXT: mtvsrwz f10, r30 |
| ; CHECK-BE-NEXT: ld r30, -32(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: mtvsrwz f11, r29 |
| ; CHECK-BE-NEXT: ld r29, -40(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: mtvsrwz f12, r28 |
| ; CHECK-BE-NEXT: ld r28, -48(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: mtvsrwz f13, r27 |
| ; CHECK-BE-NEXT: ld r27, -56(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: mtvsrwz v2, r26 |
| ; CHECK-BE-NEXT: ld r26, -64(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: mtvsrwz v3, r25 |
| ; CHECK-BE-NEXT: ld r25, -72(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: xscvuxdsp f0, f0 |
| ; CHECK-BE-NEXT: xscvuxdsp f1, f1 |
| ; CHECK-BE-NEXT: xscvuxdsp f2, f2 |
| ; CHECK-BE-NEXT: xscvuxdsp f3, f3 |
| ; CHECK-BE-NEXT: xscvuxdsp f4, f4 |
| ; CHECK-BE-NEXT: xscvuxdsp f5, f5 |
| ; CHECK-BE-NEXT: xscvuxdsp f6, f6 |
| ; CHECK-BE-NEXT: xscvuxdsp f7, f7 |
| ; CHECK-BE-NEXT: xscvuxdsp f8, f8 |
| ; CHECK-BE-NEXT: xscvuxdsp f9, f9 |
| ; CHECK-BE-NEXT: xscvuxdsp f10, f10 |
| ; CHECK-BE-NEXT: xscvuxdsp f11, f11 |
| ; CHECK-BE-NEXT: xscvuxdsp f12, f12 |
| ; CHECK-BE-NEXT: xscvuxdsp f13, f13 |
| ; CHECK-BE-NEXT: xscvuxdsp f31, v2 |
| ; CHECK-BE-NEXT: xscvuxdsp f30, v3 |
| ; CHECK-BE-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-BE-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-BE-NEXT: xxmrghd vs2, vs5, vs4 |
| ; CHECK-BE-NEXT: xxmrghd vs3, vs7, vs6 |
| ; CHECK-BE-NEXT: xxmrghd vs4, vs9, vs8 |
| ; CHECK-BE-NEXT: xxmrghd vs5, vs11, vs10 |
| ; CHECK-BE-NEXT: xxmrghd vs6, vs13, vs12 |
| ; CHECK-BE-NEXT: xxmrghd vs7, vs30, vs31 |
| ; CHECK-BE-NEXT: lfd f31, -8(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: lfd f30, -16(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-BE-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-BE-NEXT: xvcvdpsp v4, vs2 |
| ; CHECK-BE-NEXT: xvcvdpsp v5, vs3 |
| ; CHECK-BE-NEXT: xvcvdpsp v0, vs4 |
| ; CHECK-BE-NEXT: xvcvdpsp v1, vs5 |
| ; CHECK-BE-NEXT: xvcvdpsp v6, vs6 |
| ; CHECK-BE-NEXT: xvcvdpsp v7, vs7 |
| ; CHECK-BE-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-BE-NEXT: vmrgew v3, v5, v4 |
| ; CHECK-BE-NEXT: vmrgew v4, v1, v0 |
| ; CHECK-BE-NEXT: vmrgew v5, v7, v6 |
| ; CHECK-BE-NEXT: stxv v3, 16(r3) |
| ; CHECK-BE-NEXT: stxv v2, 0(r3) |
| ; CHECK-BE-NEXT: stxv v5, 48(r3) |
| ; CHECK-BE-NEXT: stxv v4, 32(r3) |
| ; CHECK-BE-NEXT: blr |
| entry: |
| %0 = uitofp <16 x i8> %a to <16 x float> |
| store <16 x float> %0, <16 x float>* %agg.result, align 64 |
| ret void |
| } |
| |
| define i64 @test2elt_signed(i16 %a.coerce) local_unnamed_addr #0 { |
| ; CHECK-P8-LABEL: test2elt_signed: |
| ; CHECK-P8: # %bb.0: # %entry |
| ; CHECK-P8-NEXT: mtvsrd f0, r3 |
| ; CHECK-P8-NEXT: mfvsrd r3, f0 |
| ; CHECK-P8-NEXT: clrldi r4, r3, 56 |
| ; CHECK-P8-NEXT: rldicl r3, r3, 56, 56 |
| ; CHECK-P8-NEXT: extsb r4, r4 |
| ; CHECK-P8-NEXT: extsb r3, r3 |
| ; CHECK-P8-NEXT: mtvsrwa f0, r4 |
| ; CHECK-P8-NEXT: mtvsrwa f1, r3 |
| ; CHECK-P8-NEXT: xscvsxdsp f0, f0 |
| ; CHECK-P8-NEXT: xscvsxdsp f1, f1 |
| ; CHECK-P8-NEXT: xscvdpspn vs0, f0 |
| ; CHECK-P8-NEXT: xscvdpspn vs1, f1 |
| ; CHECK-P8-NEXT: xxsldwi v2, vs0, vs0, 1 |
| ; CHECK-P8-NEXT: xxsldwi v3, vs1, vs1, 1 |
| ; CHECK-P8-NEXT: vmrglw v2, v3, v2 |
| ; CHECK-P8-NEXT: xxswapd vs0, v2 |
| ; CHECK-P8-NEXT: mfvsrd r3, f0 |
| ; CHECK-P8-NEXT: blr |
| ; |
| ; CHECK-P9-LABEL: test2elt_signed: |
| ; CHECK-P9: # %bb.0: # %entry |
| ; CHECK-P9-NEXT: mtvsrws v2, r3 |
| ; CHECK-P9-NEXT: li r3, 0 |
| ; CHECK-P9-NEXT: li r4, 1 |
| ; CHECK-P9-NEXT: vextubrx r3, r3, v2 |
| ; CHECK-P9-NEXT: vextubrx r4, r4, v2 |
| ; CHECK-P9-NEXT: extsb r3, r3 |
| ; CHECK-P9-NEXT: extsb r4, r4 |
| ; CHECK-P9-NEXT: mtvsrwa f0, r3 |
| ; CHECK-P9-NEXT: mtvsrwa f1, r4 |
| ; CHECK-P9-NEXT: xscvsxdsp f0, f0 |
| ; CHECK-P9-NEXT: xscvsxdsp f1, f1 |
| ; CHECK-P9-NEXT: xscvdpspn vs0, f0 |
| ; CHECK-P9-NEXT: xscvdpspn vs1, f1 |
| ; CHECK-P9-NEXT: xxsldwi v2, vs0, vs0, 1 |
| ; CHECK-P9-NEXT: xxsldwi v3, vs1, vs1, 1 |
| ; CHECK-P9-NEXT: vmrglw v2, v3, v2 |
| ; CHECK-P9-NEXT: mfvsrld r3, v2 |
| ; CHECK-P9-NEXT: blr |
| ; |
| ; CHECK-BE-LABEL: test2elt_signed: |
| ; CHECK-BE: # %bb.0: # %entry |
| ; CHECK-BE-NEXT: mtvsrws v2, r3 |
| ; CHECK-BE-NEXT: li r3, 1 |
| ; CHECK-BE-NEXT: li r4, 0 |
| ; CHECK-BE-NEXT: vextublx r3, r3, v2 |
| ; CHECK-BE-NEXT: vextublx r4, r4, v2 |
| ; CHECK-BE-NEXT: extsb r3, r3 |
| ; CHECK-BE-NEXT: extsb r4, r4 |
| ; CHECK-BE-NEXT: mtvsrwa f0, r3 |
| ; CHECK-BE-NEXT: mtvsrwa f1, r4 |
| ; CHECK-BE-NEXT: xscvsxdsp f0, f0 |
| ; CHECK-BE-NEXT: xscvsxdsp f1, f1 |
| ; CHECK-BE-NEXT: xscvdpspn v2, f0 |
| ; CHECK-BE-NEXT: xscvdpspn v3, f1 |
| ; CHECK-BE-NEXT: vmrghw v2, v3, v2 |
| ; CHECK-BE-NEXT: mfvsrd r3, v2 |
| ; CHECK-BE-NEXT: blr |
| entry: |
| %0 = bitcast i16 %a.coerce to <2 x i8> |
| %1 = sitofp <2 x i8> %0 to <2 x float> |
| %2 = bitcast <2 x float> %1 to i64 |
| ret i64 %2 |
| } |
| |
| define <4 x float> @test4elt_signed(i32 %a.coerce) local_unnamed_addr #1 { |
| ; CHECK-P8-LABEL: test4elt_signed: |
| ; CHECK-P8: # %bb.0: # %entry |
| ; CHECK-P8-NEXT: mtvsrd f0, r3 |
| ; CHECK-P8-NEXT: mfvsrd r3, f0 |
| ; CHECK-P8-NEXT: clrldi r4, r3, 56 |
| ; CHECK-P8-NEXT: rldicl r5, r3, 48, 56 |
| ; CHECK-P8-NEXT: extsb r4, r4 |
| ; CHECK-P8-NEXT: extsb r5, r5 |
| ; CHECK-P8-NEXT: mtvsrwa f0, r4 |
| ; CHECK-P8-NEXT: rldicl r4, r3, 56, 56 |
| ; CHECK-P8-NEXT: rldicl r3, r3, 40, 56 |
| ; CHECK-P8-NEXT: extsb r4, r4 |
| ; CHECK-P8-NEXT: extsb r3, r3 |
| ; CHECK-P8-NEXT: mtvsrwa f1, r5 |
| ; CHECK-P8-NEXT: mtvsrwa f2, r4 |
| ; CHECK-P8-NEXT: mtvsrwa f3, r3 |
| ; CHECK-P8-NEXT: xscvsxdsp f0, f0 |
| ; CHECK-P8-NEXT: xscvsxdsp f1, f1 |
| ; CHECK-P8-NEXT: xscvsxdsp f2, f2 |
| ; CHECK-P8-NEXT: xscvsxdsp f3, f3 |
| ; CHECK-P8-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-P8-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-P8-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-P8-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-P8-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-P8-NEXT: blr |
| ; |
| ; CHECK-P9-LABEL: test4elt_signed: |
| ; CHECK-P9: # %bb.0: # %entry |
| ; CHECK-P9-NEXT: mtvsrws v2, r3 |
| ; CHECK-P9-NEXT: li r3, 0 |
| ; CHECK-P9-NEXT: li r4, 2 |
| ; CHECK-P9-NEXT: li r5, 1 |
| ; CHECK-P9-NEXT: li r6, 3 |
| ; CHECK-P9-NEXT: vextubrx r3, r3, v2 |
| ; CHECK-P9-NEXT: vextubrx r4, r4, v2 |
| ; CHECK-P9-NEXT: vextubrx r5, r5, v2 |
| ; CHECK-P9-NEXT: vextubrx r6, r6, v2 |
| ; CHECK-P9-NEXT: extsb r3, r3 |
| ; CHECK-P9-NEXT: extsb r4, r4 |
| ; CHECK-P9-NEXT: extsb r5, r5 |
| ; CHECK-P9-NEXT: extsb r6, r6 |
| ; CHECK-P9-NEXT: mtvsrwa f0, r3 |
| ; CHECK-P9-NEXT: mtvsrwa f1, r4 |
| ; CHECK-P9-NEXT: mtvsrwa f2, r5 |
| ; CHECK-P9-NEXT: mtvsrwa f3, r6 |
| ; CHECK-P9-NEXT: xscvsxdsp f0, f0 |
| ; CHECK-P9-NEXT: xscvsxdsp f1, f1 |
| ; CHECK-P9-NEXT: xscvsxdsp f2, f2 |
| ; CHECK-P9-NEXT: xscvsxdsp f3, f3 |
| ; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-P9-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-P9-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-P9-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-P9-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-P9-NEXT: blr |
| ; |
| ; CHECK-BE-LABEL: test4elt_signed: |
| ; CHECK-BE: # %bb.0: # %entry |
| ; CHECK-BE-NEXT: mtvsrws v2, r3 |
| ; CHECK-BE-NEXT: li r3, 3 |
| ; CHECK-BE-NEXT: li r4, 1 |
| ; CHECK-BE-NEXT: li r5, 2 |
| ; CHECK-BE-NEXT: li r6, 0 |
| ; CHECK-BE-NEXT: vextublx r3, r3, v2 |
| ; CHECK-BE-NEXT: vextublx r4, r4, v2 |
| ; CHECK-BE-NEXT: vextublx r5, r5, v2 |
| ; CHECK-BE-NEXT: vextublx r6, r6, v2 |
| ; CHECK-BE-NEXT: extsb r3, r3 |
| ; CHECK-BE-NEXT: extsb r4, r4 |
| ; CHECK-BE-NEXT: extsb r5, r5 |
| ; CHECK-BE-NEXT: extsb r6, r6 |
| ; CHECK-BE-NEXT: mtvsrwa f0, r3 |
| ; CHECK-BE-NEXT: mtvsrwa f1, r4 |
| ; CHECK-BE-NEXT: mtvsrwa f2, r5 |
| ; CHECK-BE-NEXT: mtvsrwa f3, r6 |
| ; CHECK-BE-NEXT: xscvsxdsp f0, f0 |
| ; CHECK-BE-NEXT: xscvsxdsp f1, f1 |
| ; CHECK-BE-NEXT: xscvsxdsp f2, f2 |
| ; CHECK-BE-NEXT: xscvsxdsp f3, f3 |
| ; CHECK-BE-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-BE-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-BE-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-BE-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-BE-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-BE-NEXT: blr |
| entry: |
| %0 = bitcast i32 %a.coerce to <4 x i8> |
| %1 = sitofp <4 x i8> %0 to <4 x float> |
| ret <4 x float> %1 |
| } |
| |
| define void @test8elt_signed(<8 x float>* noalias nocapture sret %agg.result, i64 %a.coerce) local_unnamed_addr #2 { |
| ; CHECK-P8-LABEL: test8elt_signed: |
| ; CHECK-P8: # %bb.0: # %entry |
| ; CHECK-P8-NEXT: mtvsrd f0, r4 |
| ; CHECK-P8-NEXT: li r5, 16 |
| ; CHECK-P8-NEXT: mfvsrd r4, f0 |
| ; CHECK-P8-NEXT: clrldi r6, r4, 56 |
| ; CHECK-P8-NEXT: rldicl r7, r4, 48, 56 |
| ; CHECK-P8-NEXT: extsb r6, r6 |
| ; CHECK-P8-NEXT: extsb r7, r7 |
| ; CHECK-P8-NEXT: mtvsrwa f0, r6 |
| ; CHECK-P8-NEXT: rldicl r6, r4, 56, 56 |
| ; CHECK-P8-NEXT: extsb r6, r6 |
| ; CHECK-P8-NEXT: mtvsrwa f1, r7 |
| ; CHECK-P8-NEXT: rldicl r7, r4, 40, 56 |
| ; CHECK-P8-NEXT: mtvsrwa f2, r6 |
| ; CHECK-P8-NEXT: rldicl r6, r4, 32, 56 |
| ; CHECK-P8-NEXT: extsb r7, r7 |
| ; CHECK-P8-NEXT: extsb r6, r6 |
| ; CHECK-P8-NEXT: mtvsrwa f3, r7 |
| ; CHECK-P8-NEXT: rldicl r7, r4, 16, 56 |
| ; CHECK-P8-NEXT: mtvsrwa f4, r6 |
| ; CHECK-P8-NEXT: rldicl r6, r4, 24, 56 |
| ; CHECK-P8-NEXT: rldicl r4, r4, 8, 56 |
| ; CHECK-P8-NEXT: extsb r7, r7 |
| ; CHECK-P8-NEXT: extsb r6, r6 |
| ; CHECK-P8-NEXT: extsb r4, r4 |
| ; CHECK-P8-NEXT: mtvsrwa f5, r7 |
| ; CHECK-P8-NEXT: mtvsrwa f6, r6 |
| ; CHECK-P8-NEXT: mtvsrwa f7, r4 |
| ; CHECK-P8-NEXT: xscvsxdsp f0, f0 |
| ; CHECK-P8-NEXT: xscvsxdsp f1, f1 |
| ; CHECK-P8-NEXT: xscvsxdsp f2, f2 |
| ; CHECK-P8-NEXT: xscvsxdsp f3, f3 |
| ; CHECK-P8-NEXT: xscvsxdsp f4, f4 |
| ; CHECK-P8-NEXT: xscvsxdsp f5, f5 |
| ; CHECK-P8-NEXT: xscvsxdsp f6, f6 |
| ; CHECK-P8-NEXT: xscvsxdsp f7, f7 |
| ; CHECK-P8-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-P8-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-P8-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-P8-NEXT: xxmrghd vs2, vs5, vs4 |
| ; CHECK-P8-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-P8-NEXT: xxmrghd vs3, vs7, vs6 |
| ; CHECK-P8-NEXT: xvcvdpsp v4, vs2 |
| ; CHECK-P8-NEXT: xvcvdpsp v5, vs3 |
| ; CHECK-P8-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-P8-NEXT: vmrgew v3, v5, v4 |
| ; CHECK-P8-NEXT: stvx v2, 0, r3 |
| ; CHECK-P8-NEXT: stvx v3, r3, r5 |
| ; CHECK-P8-NEXT: blr |
| ; |
| ; CHECK-P9-LABEL: test8elt_signed: |
| ; CHECK-P9: # %bb.0: # %entry |
| ; CHECK-P9-NEXT: mtvsrd f0, r4 |
| ; CHECK-P9-NEXT: li r4, 0 |
| ; CHECK-P9-NEXT: li r5, 2 |
| ; CHECK-P9-NEXT: li r6, 1 |
| ; CHECK-P9-NEXT: li r7, 3 |
| ; CHECK-P9-NEXT: li r8, 4 |
| ; CHECK-P9-NEXT: li r9, 6 |
| ; CHECK-P9-NEXT: li r10, 5 |
| ; CHECK-P9-NEXT: li r11, 7 |
| ; CHECK-P9-NEXT: xxswapd v2, vs0 |
| ; CHECK-P9-NEXT: vextubrx r4, r4, v2 |
| ; CHECK-P9-NEXT: vextubrx r5, r5, v2 |
| ; CHECK-P9-NEXT: vextubrx r6, r6, v2 |
| ; CHECK-P9-NEXT: vextubrx r7, r7, v2 |
| ; CHECK-P9-NEXT: vextubrx r8, r8, v2 |
| ; CHECK-P9-NEXT: vextubrx r9, r9, v2 |
| ; CHECK-P9-NEXT: vextubrx r10, r10, v2 |
| ; CHECK-P9-NEXT: vextubrx r11, r11, v2 |
| ; CHECK-P9-NEXT: extsb r4, r4 |
| ; CHECK-P9-NEXT: extsb r5, r5 |
| ; CHECK-P9-NEXT: extsb r6, r6 |
| ; CHECK-P9-NEXT: extsb r7, r7 |
| ; CHECK-P9-NEXT: extsb r8, r8 |
| ; CHECK-P9-NEXT: extsb r9, r9 |
| ; CHECK-P9-NEXT: extsb r10, r10 |
| ; CHECK-P9-NEXT: extsb r11, r11 |
| ; CHECK-P9-NEXT: mtvsrwa f0, r4 |
| ; CHECK-P9-NEXT: mtvsrwa f1, r5 |
| ; CHECK-P9-NEXT: mtvsrwa f2, r6 |
| ; CHECK-P9-NEXT: mtvsrwa f3, r7 |
| ; CHECK-P9-NEXT: mtvsrwa f4, r8 |
| ; CHECK-P9-NEXT: mtvsrwa f5, r9 |
| ; CHECK-P9-NEXT: mtvsrwa f6, r10 |
| ; CHECK-P9-NEXT: mtvsrwa f7, r11 |
| ; CHECK-P9-NEXT: xscvsxdsp f0, f0 |
| ; CHECK-P9-NEXT: xscvsxdsp f1, f1 |
| ; CHECK-P9-NEXT: xscvsxdsp f2, f2 |
| ; CHECK-P9-NEXT: xscvsxdsp f3, f3 |
| ; CHECK-P9-NEXT: xscvsxdsp f4, f4 |
| ; CHECK-P9-NEXT: xscvsxdsp f5, f5 |
| ; CHECK-P9-NEXT: xscvsxdsp f6, f6 |
| ; CHECK-P9-NEXT: xscvsxdsp f7, f7 |
| ; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-P9-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-P9-NEXT: xxmrghd vs2, vs5, vs4 |
| ; CHECK-P9-NEXT: xxmrghd vs3, vs7, vs6 |
| ; CHECK-P9-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-P9-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-P9-NEXT: xvcvdpsp v4, vs2 |
| ; CHECK-P9-NEXT: xvcvdpsp v5, vs3 |
| ; CHECK-P9-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-P9-NEXT: vmrgew v3, v5, v4 |
| ; CHECK-P9-NEXT: stxv v3, 16(r3) |
| ; CHECK-P9-NEXT: stxv v2, 0(r3) |
| ; CHECK-P9-NEXT: blr |
| ; |
| ; CHECK-BE-LABEL: test8elt_signed: |
| ; CHECK-BE: # %bb.0: # %entry |
| ; CHECK-BE-NEXT: li r5, 3 |
| ; CHECK-BE-NEXT: mtvsrd v2, r4 |
| ; CHECK-BE-NEXT: li r4, 1 |
| ; CHECK-BE-NEXT: li r6, 2 |
| ; CHECK-BE-NEXT: li r7, 0 |
| ; CHECK-BE-NEXT: li r8, 7 |
| ; CHECK-BE-NEXT: li r9, 5 |
| ; CHECK-BE-NEXT: li r10, 6 |
| ; CHECK-BE-NEXT: li r11, 4 |
| ; CHECK-BE-NEXT: vextublx r5, r5, v2 |
| ; CHECK-BE-NEXT: vextublx r4, r4, v2 |
| ; CHECK-BE-NEXT: vextublx r6, r6, v2 |
| ; CHECK-BE-NEXT: vextublx r7, r7, v2 |
| ; CHECK-BE-NEXT: vextublx r8, r8, v2 |
| ; CHECK-BE-NEXT: vextublx r9, r9, v2 |
| ; CHECK-BE-NEXT: vextublx r10, r10, v2 |
| ; CHECK-BE-NEXT: vextublx r11, r11, v2 |
| ; CHECK-BE-NEXT: extsb r5, r5 |
| ; CHECK-BE-NEXT: extsb r4, r4 |
| ; CHECK-BE-NEXT: extsb r6, r6 |
| ; CHECK-BE-NEXT: extsb r7, r7 |
| ; CHECK-BE-NEXT: extsb r8, r8 |
| ; CHECK-BE-NEXT: extsb r9, r9 |
| ; CHECK-BE-NEXT: extsb r10, r10 |
| ; CHECK-BE-NEXT: extsb r11, r11 |
| ; CHECK-BE-NEXT: mtvsrwa f0, r5 |
| ; CHECK-BE-NEXT: mtvsrwa f1, r4 |
| ; CHECK-BE-NEXT: mtvsrwa f2, r6 |
| ; CHECK-BE-NEXT: mtvsrwa f3, r7 |
| ; CHECK-BE-NEXT: mtvsrwa f4, r8 |
| ; CHECK-BE-NEXT: mtvsrwa f5, r9 |
| ; CHECK-BE-NEXT: mtvsrwa f6, r10 |
| ; CHECK-BE-NEXT: mtvsrwa f7, r11 |
| ; CHECK-BE-NEXT: xscvsxdsp f0, f0 |
| ; CHECK-BE-NEXT: xscvsxdsp f1, f1 |
| ; CHECK-BE-NEXT: xscvsxdsp f2, f2 |
| ; CHECK-BE-NEXT: xscvsxdsp f3, f3 |
| ; CHECK-BE-NEXT: xscvsxdsp f4, f4 |
| ; CHECK-BE-NEXT: xscvsxdsp f5, f5 |
| ; CHECK-BE-NEXT: xscvsxdsp f6, f6 |
| ; CHECK-BE-NEXT: xscvsxdsp f7, f7 |
| ; CHECK-BE-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-BE-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-BE-NEXT: xxmrghd vs2, vs5, vs4 |
| ; CHECK-BE-NEXT: xxmrghd vs3, vs7, vs6 |
| ; CHECK-BE-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-BE-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-BE-NEXT: xvcvdpsp v4, vs2 |
| ; CHECK-BE-NEXT: xvcvdpsp v5, vs3 |
| ; CHECK-BE-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-BE-NEXT: vmrgew v3, v5, v4 |
| ; CHECK-BE-NEXT: stxv v2, 0(r3) |
| ; CHECK-BE-NEXT: stxv v3, 16(r3) |
| ; CHECK-BE-NEXT: blr |
| entry: |
| %0 = bitcast i64 %a.coerce to <8 x i8> |
| %1 = sitofp <8 x i8> %0 to <8 x float> |
| store <8 x float> %1, <8 x float>* %agg.result, align 32 |
| ret void |
| } |
| |
| define void @test16elt_signed(<16 x float>* noalias nocapture sret %agg.result, <16 x i8> %a) local_unnamed_addr #3 { |
| ; CHECK-P8-LABEL: test16elt_signed: |
| ; CHECK-P8: # %bb.0: # %entry |
| ; CHECK-P8-NEXT: mfvsrd r4, v2 |
| ; CHECK-P8-NEXT: xxswapd vs2, v2 |
| ; CHECK-P8-NEXT: clrldi r5, r4, 56 |
| ; CHECK-P8-NEXT: rldicl r6, r4, 48, 56 |
| ; CHECK-P8-NEXT: extsb r5, r5 |
| ; CHECK-P8-NEXT: extsb r6, r6 |
| ; CHECK-P8-NEXT: mtvsrwa f0, r5 |
| ; CHECK-P8-NEXT: rldicl r5, r4, 40, 56 |
| ; CHECK-P8-NEXT: rldicl r7, r4, 56, 56 |
| ; CHECK-P8-NEXT: mtvsrwa f1, r6 |
| ; CHECK-P8-NEXT: rldicl r6, r4, 32, 56 |
| ; CHECK-P8-NEXT: extsb r5, r5 |
| ; CHECK-P8-NEXT: extsb r7, r7 |
| ; CHECK-P8-NEXT: extsb r6, r6 |
| ; CHECK-P8-NEXT: mtvsrwa f4, r5 |
| ; CHECK-P8-NEXT: rldicl r5, r4, 16, 56 |
| ; CHECK-P8-NEXT: mtvsrwa f3, r7 |
| ; CHECK-P8-NEXT: extsb r5, r5 |
| ; CHECK-P8-NEXT: mtvsrwa f5, r6 |
| ; CHECK-P8-NEXT: rldicl r6, r4, 24, 56 |
| ; CHECK-P8-NEXT: rldicl r4, r4, 8, 56 |
| ; CHECK-P8-NEXT: mfvsrd r7, f2 |
| ; CHECK-P8-NEXT: extsb r4, r4 |
| ; CHECK-P8-NEXT: mtvsrwa f2, r5 |
| ; CHECK-P8-NEXT: extsb r5, r6 |
| ; CHECK-P8-NEXT: mtvsrwa f6, r5 |
| ; CHECK-P8-NEXT: clrldi r5, r7, 56 |
| ; CHECK-P8-NEXT: mtvsrwa f7, r4 |
| ; CHECK-P8-NEXT: rldicl r4, r7, 48, 56 |
| ; CHECK-P8-NEXT: extsb r5, r5 |
| ; CHECK-P8-NEXT: mtvsrwa f8, r5 |
| ; CHECK-P8-NEXT: rldicl r5, r7, 56, 56 |
| ; CHECK-P8-NEXT: extsb r4, r4 |
| ; CHECK-P8-NEXT: mtvsrwa f9, r4 |
| ; CHECK-P8-NEXT: extsb r4, r5 |
| ; CHECK-P8-NEXT: rldicl r5, r7, 8, 56 |
| ; CHECK-P8-NEXT: mtvsrwa f10, r4 |
| ; CHECK-P8-NEXT: rldicl r4, r7, 40, 56 |
| ; CHECK-P8-NEXT: extsb r5, r5 |
| ; CHECK-P8-NEXT: extsb r4, r4 |
| ; CHECK-P8-NEXT: xscvsxdsp f0, f0 |
| ; CHECK-P8-NEXT: mtvsrwa f11, r4 |
| ; CHECK-P8-NEXT: rldicl r4, r7, 32, 56 |
| ; CHECK-P8-NEXT: extsb r4, r4 |
| ; CHECK-P8-NEXT: xscvsxdsp f1, f1 |
| ; CHECK-P8-NEXT: xscvsxdsp f3, f3 |
| ; CHECK-P8-NEXT: xscvsxdsp f4, f4 |
| ; CHECK-P8-NEXT: mtvsrwa f12, r4 |
| ; CHECK-P8-NEXT: rldicl r4, r7, 16, 56 |
| ; CHECK-P8-NEXT: extsb r4, r4 |
| ; CHECK-P8-NEXT: xscvsxdsp f5, f5 |
| ; CHECK-P8-NEXT: mtvsrwa f13, r4 |
| ; CHECK-P8-NEXT: rldicl r4, r7, 24, 56 |
| ; CHECK-P8-NEXT: xscvsxdsp f2, f2 |
| ; CHECK-P8-NEXT: extsb r4, r4 |
| ; CHECK-P8-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-P8-NEXT: mtvsrwa v2, r4 |
| ; CHECK-P8-NEXT: li r4, 48 |
| ; CHECK-P8-NEXT: mtvsrwa v3, r5 |
| ; CHECK-P8-NEXT: xxmrghd vs3, vs4, vs3 |
| ; CHECK-P8-NEXT: li r5, 32 |
| ; CHECK-P8-NEXT: xscvsxdsp f6, f6 |
| ; CHECK-P8-NEXT: xscvsxdsp f7, f7 |
| ; CHECK-P8-NEXT: xscvsxdsp f8, f8 |
| ; CHECK-P8-NEXT: xscvsxdsp f9, f9 |
| ; CHECK-P8-NEXT: xxmrghd vs2, vs2, vs5 |
| ; CHECK-P8-NEXT: xscvsxdsp f10, f10 |
| ; CHECK-P8-NEXT: xscvsxdsp f11, f11 |
| ; CHECK-P8-NEXT: xscvsxdsp f12, f12 |
| ; CHECK-P8-NEXT: xscvsxdsp f13, f13 |
| ; CHECK-P8-NEXT: xxmrghd vs5, vs7, vs6 |
| ; CHECK-P8-NEXT: xscvsxdsp f1, v2 |
| ; CHECK-P8-NEXT: xscvsxdsp f4, v3 |
| ; CHECK-P8-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-P8-NEXT: xxmrghd vs0, vs9, vs8 |
| ; CHECK-P8-NEXT: xvcvdpsp v3, vs3 |
| ; CHECK-P8-NEXT: xxmrghd vs3, vs11, vs10 |
| ; CHECK-P8-NEXT: xvcvdpsp v4, vs2 |
| ; CHECK-P8-NEXT: xxmrghd vs2, vs13, vs12 |
| ; CHECK-P8-NEXT: xvcvdpsp v5, vs5 |
| ; CHECK-P8-NEXT: xvcvdpsp v0, vs0 |
| ; CHECK-P8-NEXT: xxmrghd vs1, vs4, vs1 |
| ; CHECK-P8-NEXT: xvcvdpsp v1, vs3 |
| ; CHECK-P8-NEXT: xvcvdpsp v6, vs2 |
| ; CHECK-P8-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-P8-NEXT: xvcvdpsp v7, vs1 |
| ; CHECK-P8-NEXT: vmrgew v3, v5, v4 |
| ; CHECK-P8-NEXT: vmrgew v4, v1, v0 |
| ; CHECK-P8-NEXT: stvx v2, r3, r5 |
| ; CHECK-P8-NEXT: vmrgew v5, v7, v6 |
| ; CHECK-P8-NEXT: stvx v3, r3, r4 |
| ; CHECK-P8-NEXT: li r4, 16 |
| ; CHECK-P8-NEXT: stvx v4, 0, r3 |
| ; CHECK-P8-NEXT: stvx v5, r3, r4 |
| ; CHECK-P8-NEXT: blr |
| ; |
| ; CHECK-P9-LABEL: test16elt_signed: |
| ; CHECK-P9: # %bb.0: # %entry |
| ; CHECK-P9-NEXT: std r25, -72(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: std r26, -64(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: std r27, -56(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: std r28, -48(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: std r29, -40(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: li r4, 0 |
| ; CHECK-P9-NEXT: std r30, -32(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: li r5, 2 |
| ; CHECK-P9-NEXT: li r6, 1 |
| ; CHECK-P9-NEXT: li r7, 3 |
| ; CHECK-P9-NEXT: li r8, 4 |
| ; CHECK-P9-NEXT: li r9, 6 |
| ; CHECK-P9-NEXT: li r10, 5 |
| ; CHECK-P9-NEXT: li r11, 7 |
| ; CHECK-P9-NEXT: li r12, 8 |
| ; CHECK-P9-NEXT: li r0, 10 |
| ; CHECK-P9-NEXT: li r30, 9 |
| ; CHECK-P9-NEXT: li r29, 11 |
| ; CHECK-P9-NEXT: li r28, 12 |
| ; CHECK-P9-NEXT: li r27, 14 |
| ; CHECK-P9-NEXT: li r26, 13 |
| ; CHECK-P9-NEXT: li r25, 15 |
| ; CHECK-P9-NEXT: stfd f30, -16(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: stfd f31, -8(r1) # 8-byte Folded Spill |
| ; CHECK-P9-NEXT: vextubrx r4, r4, v2 |
| ; CHECK-P9-NEXT: vextubrx r5, r5, v2 |
| ; CHECK-P9-NEXT: vextubrx r6, r6, v2 |
| ; CHECK-P9-NEXT: vextubrx r7, r7, v2 |
| ; CHECK-P9-NEXT: vextubrx r8, r8, v2 |
| ; CHECK-P9-NEXT: vextubrx r9, r9, v2 |
| ; CHECK-P9-NEXT: vextubrx r10, r10, v2 |
| ; CHECK-P9-NEXT: vextubrx r11, r11, v2 |
| ; CHECK-P9-NEXT: vextubrx r12, r12, v2 |
| ; CHECK-P9-NEXT: vextubrx r0, r0, v2 |
| ; CHECK-P9-NEXT: vextubrx r30, r30, v2 |
| ; CHECK-P9-NEXT: vextubrx r29, r29, v2 |
| ; CHECK-P9-NEXT: vextubrx r28, r28, v2 |
| ; CHECK-P9-NEXT: vextubrx r27, r27, v2 |
| ; CHECK-P9-NEXT: vextubrx r26, r26, v2 |
| ; CHECK-P9-NEXT: vextubrx r25, r25, v2 |
| ; CHECK-P9-NEXT: extsb r4, r4 |
| ; CHECK-P9-NEXT: extsb r5, r5 |
| ; CHECK-P9-NEXT: extsb r6, r6 |
| ; CHECK-P9-NEXT: extsb r7, r7 |
| ; CHECK-P9-NEXT: extsb r8, r8 |
| ; CHECK-P9-NEXT: extsb r9, r9 |
| ; CHECK-P9-NEXT: extsb r10, r10 |
| ; CHECK-P9-NEXT: extsb r11, r11 |
| ; CHECK-P9-NEXT: extsb r12, r12 |
| ; CHECK-P9-NEXT: extsb r0, r0 |
| ; CHECK-P9-NEXT: extsb r30, r30 |
| ; CHECK-P9-NEXT: extsb r29, r29 |
| ; CHECK-P9-NEXT: extsb r28, r28 |
| ; CHECK-P9-NEXT: extsb r27, r27 |
| ; CHECK-P9-NEXT: extsb r26, r26 |
| ; CHECK-P9-NEXT: extsb r25, r25 |
| ; CHECK-P9-NEXT: mtvsrwa f0, r4 |
| ; CHECK-P9-NEXT: mtvsrwa f1, r5 |
| ; CHECK-P9-NEXT: mtvsrwa f2, r6 |
| ; CHECK-P9-NEXT: mtvsrwa f3, r7 |
| ; CHECK-P9-NEXT: mtvsrwa f4, r8 |
| ; CHECK-P9-NEXT: mtvsrwa f5, r9 |
| ; CHECK-P9-NEXT: mtvsrwa f6, r10 |
| ; CHECK-P9-NEXT: mtvsrwa f7, r11 |
| ; CHECK-P9-NEXT: mtvsrwa f8, r12 |
| ; CHECK-P9-NEXT: mtvsrwa f9, r0 |
| ; CHECK-P9-NEXT: mtvsrwa f10, r30 |
| ; CHECK-P9-NEXT: ld r30, -32(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: mtvsrwa f11, r29 |
| ; CHECK-P9-NEXT: ld r29, -40(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: mtvsrwa f12, r28 |
| ; CHECK-P9-NEXT: ld r28, -48(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: mtvsrwa f13, r27 |
| ; CHECK-P9-NEXT: ld r27, -56(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: mtvsrwa v2, r26 |
| ; CHECK-P9-NEXT: ld r26, -64(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: mtvsrwa v3, r25 |
| ; CHECK-P9-NEXT: ld r25, -72(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: xscvsxdsp f0, f0 |
| ; CHECK-P9-NEXT: xscvsxdsp f1, f1 |
| ; CHECK-P9-NEXT: xscvsxdsp f2, f2 |
| ; CHECK-P9-NEXT: xscvsxdsp f3, f3 |
| ; CHECK-P9-NEXT: xscvsxdsp f4, f4 |
| ; CHECK-P9-NEXT: xscvsxdsp f5, f5 |
| ; CHECK-P9-NEXT: xscvsxdsp f6, f6 |
| ; CHECK-P9-NEXT: xscvsxdsp f7, f7 |
| ; CHECK-P9-NEXT: xscvsxdsp f8, f8 |
| ; CHECK-P9-NEXT: xscvsxdsp f9, f9 |
| ; CHECK-P9-NEXT: xscvsxdsp f10, f10 |
| ; CHECK-P9-NEXT: xscvsxdsp f11, f11 |
| ; CHECK-P9-NEXT: xscvsxdsp f12, f12 |
| ; CHECK-P9-NEXT: xscvsxdsp f13, f13 |
| ; CHECK-P9-NEXT: xscvsxdsp f31, v2 |
| ; CHECK-P9-NEXT: xscvsxdsp f30, v3 |
| ; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-P9-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-P9-NEXT: xxmrghd vs2, vs5, vs4 |
| ; CHECK-P9-NEXT: xxmrghd vs3, vs7, vs6 |
| ; CHECK-P9-NEXT: xxmrghd vs4, vs9, vs8 |
| ; CHECK-P9-NEXT: xxmrghd vs5, vs11, vs10 |
| ; CHECK-P9-NEXT: xxmrghd vs6, vs13, vs12 |
| ; CHECK-P9-NEXT: xxmrghd vs7, vs30, vs31 |
| ; CHECK-P9-NEXT: lfd f31, -8(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: lfd f30, -16(r1) # 8-byte Folded Reload |
| ; CHECK-P9-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-P9-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-P9-NEXT: xvcvdpsp v4, vs2 |
| ; CHECK-P9-NEXT: xvcvdpsp v5, vs3 |
| ; CHECK-P9-NEXT: xvcvdpsp v0, vs4 |
| ; CHECK-P9-NEXT: xvcvdpsp v1, vs5 |
| ; CHECK-P9-NEXT: xvcvdpsp v6, vs6 |
| ; CHECK-P9-NEXT: xvcvdpsp v7, vs7 |
| ; CHECK-P9-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-P9-NEXT: vmrgew v3, v5, v4 |
| ; CHECK-P9-NEXT: vmrgew v4, v1, v0 |
| ; CHECK-P9-NEXT: vmrgew v5, v7, v6 |
| ; CHECK-P9-NEXT: stxv v3, 16(r3) |
| ; CHECK-P9-NEXT: stxv v2, 0(r3) |
| ; CHECK-P9-NEXT: stxv v5, 48(r3) |
| ; CHECK-P9-NEXT: stxv v4, 32(r3) |
| ; CHECK-P9-NEXT: blr |
| ; |
| ; CHECK-BE-LABEL: test16elt_signed: |
| ; CHECK-BE: # %bb.0: # %entry |
| ; CHECK-BE-NEXT: std r25, -72(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: std r26, -64(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: std r27, -56(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: std r28, -48(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: std r29, -40(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: li r4, 3 |
| ; CHECK-BE-NEXT: std r30, -32(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: li r5, 1 |
| ; CHECK-BE-NEXT: li r6, 2 |
| ; CHECK-BE-NEXT: li r7, 0 |
| ; CHECK-BE-NEXT: li r8, 7 |
| ; CHECK-BE-NEXT: li r9, 5 |
| ; CHECK-BE-NEXT: li r10, 6 |
| ; CHECK-BE-NEXT: li r11, 4 |
| ; CHECK-BE-NEXT: li r12, 11 |
| ; CHECK-BE-NEXT: li r0, 9 |
| ; CHECK-BE-NEXT: li r30, 10 |
| ; CHECK-BE-NEXT: li r29, 8 |
| ; CHECK-BE-NEXT: li r28, 15 |
| ; CHECK-BE-NEXT: li r27, 13 |
| ; CHECK-BE-NEXT: li r26, 14 |
| ; CHECK-BE-NEXT: li r25, 12 |
| ; CHECK-BE-NEXT: stfd f30, -16(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: stfd f31, -8(r1) # 8-byte Folded Spill |
| ; CHECK-BE-NEXT: vextublx r4, r4, v2 |
| ; CHECK-BE-NEXT: vextublx r5, r5, v2 |
| ; CHECK-BE-NEXT: vextublx r6, r6, v2 |
| ; CHECK-BE-NEXT: vextublx r7, r7, v2 |
| ; CHECK-BE-NEXT: vextublx r8, r8, v2 |
| ; CHECK-BE-NEXT: vextublx r9, r9, v2 |
| ; CHECK-BE-NEXT: vextublx r10, r10, v2 |
| ; CHECK-BE-NEXT: vextublx r11, r11, v2 |
| ; CHECK-BE-NEXT: vextublx r12, r12, v2 |
| ; CHECK-BE-NEXT: vextublx r0, r0, v2 |
| ; CHECK-BE-NEXT: vextublx r30, r30, v2 |
| ; CHECK-BE-NEXT: vextublx r29, r29, v2 |
| ; CHECK-BE-NEXT: vextublx r28, r28, v2 |
| ; CHECK-BE-NEXT: vextublx r27, r27, v2 |
| ; CHECK-BE-NEXT: vextublx r26, r26, v2 |
| ; CHECK-BE-NEXT: vextublx r25, r25, v2 |
| ; CHECK-BE-NEXT: extsb r4, r4 |
| ; CHECK-BE-NEXT: extsb r5, r5 |
| ; CHECK-BE-NEXT: extsb r6, r6 |
| ; CHECK-BE-NEXT: extsb r7, r7 |
| ; CHECK-BE-NEXT: extsb r8, r8 |
| ; CHECK-BE-NEXT: extsb r9, r9 |
| ; CHECK-BE-NEXT: extsb r10, r10 |
| ; CHECK-BE-NEXT: extsb r11, r11 |
| ; CHECK-BE-NEXT: extsb r12, r12 |
| ; CHECK-BE-NEXT: extsb r0, r0 |
| ; CHECK-BE-NEXT: extsb r30, r30 |
| ; CHECK-BE-NEXT: extsb r29, r29 |
| ; CHECK-BE-NEXT: extsb r28, r28 |
| ; CHECK-BE-NEXT: extsb r27, r27 |
| ; CHECK-BE-NEXT: extsb r26, r26 |
| ; CHECK-BE-NEXT: extsb r25, r25 |
| ; CHECK-BE-NEXT: mtvsrwa f0, r4 |
| ; CHECK-BE-NEXT: mtvsrwa f1, r5 |
| ; CHECK-BE-NEXT: mtvsrwa f2, r6 |
| ; CHECK-BE-NEXT: mtvsrwa f3, r7 |
| ; CHECK-BE-NEXT: mtvsrwa f4, r8 |
| ; CHECK-BE-NEXT: mtvsrwa f5, r9 |
| ; CHECK-BE-NEXT: mtvsrwa f6, r10 |
| ; CHECK-BE-NEXT: mtvsrwa f7, r11 |
| ; CHECK-BE-NEXT: mtvsrwa f8, r12 |
| ; CHECK-BE-NEXT: mtvsrwa f9, r0 |
| ; CHECK-BE-NEXT: mtvsrwa f10, r30 |
| ; CHECK-BE-NEXT: ld r30, -32(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: mtvsrwa f11, r29 |
| ; CHECK-BE-NEXT: ld r29, -40(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: mtvsrwa f12, r28 |
| ; CHECK-BE-NEXT: ld r28, -48(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: mtvsrwa f13, r27 |
| ; CHECK-BE-NEXT: ld r27, -56(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: mtvsrwa v2, r26 |
| ; CHECK-BE-NEXT: ld r26, -64(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: mtvsrwa v3, r25 |
| ; CHECK-BE-NEXT: ld r25, -72(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: xscvsxdsp f0, f0 |
| ; CHECK-BE-NEXT: xscvsxdsp f1, f1 |
| ; CHECK-BE-NEXT: xscvsxdsp f2, f2 |
| ; CHECK-BE-NEXT: xscvsxdsp f3, f3 |
| ; CHECK-BE-NEXT: xscvsxdsp f4, f4 |
| ; CHECK-BE-NEXT: xscvsxdsp f5, f5 |
| ; CHECK-BE-NEXT: xscvsxdsp f6, f6 |
| ; CHECK-BE-NEXT: xscvsxdsp f7, f7 |
| ; CHECK-BE-NEXT: xscvsxdsp f8, f8 |
| ; CHECK-BE-NEXT: xscvsxdsp f9, f9 |
| ; CHECK-BE-NEXT: xscvsxdsp f10, f10 |
| ; CHECK-BE-NEXT: xscvsxdsp f11, f11 |
| ; CHECK-BE-NEXT: xscvsxdsp f12, f12 |
| ; CHECK-BE-NEXT: xscvsxdsp f13, f13 |
| ; CHECK-BE-NEXT: xscvsxdsp f31, v2 |
| ; CHECK-BE-NEXT: xscvsxdsp f30, v3 |
| ; CHECK-BE-NEXT: xxmrghd vs0, vs1, vs0 |
| ; CHECK-BE-NEXT: xxmrghd vs1, vs3, vs2 |
| ; CHECK-BE-NEXT: xxmrghd vs2, vs5, vs4 |
| ; CHECK-BE-NEXT: xxmrghd vs3, vs7, vs6 |
| ; CHECK-BE-NEXT: xxmrghd vs4, vs9, vs8 |
| ; CHECK-BE-NEXT: xxmrghd vs5, vs11, vs10 |
| ; CHECK-BE-NEXT: xxmrghd vs6, vs13, vs12 |
| ; CHECK-BE-NEXT: xxmrghd vs7, vs30, vs31 |
| ; CHECK-BE-NEXT: lfd f31, -8(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: lfd f30, -16(r1) # 8-byte Folded Reload |
| ; CHECK-BE-NEXT: xvcvdpsp v2, vs0 |
| ; CHECK-BE-NEXT: xvcvdpsp v3, vs1 |
| ; CHECK-BE-NEXT: xvcvdpsp v4, vs2 |
| ; CHECK-BE-NEXT: xvcvdpsp v5, vs3 |
| ; CHECK-BE-NEXT: xvcvdpsp v0, vs4 |
| ; CHECK-BE-NEXT: xvcvdpsp v1, vs5 |
| ; CHECK-BE-NEXT: xvcvdpsp v6, vs6 |
| ; CHECK-BE-NEXT: xvcvdpsp v7, vs7 |
| ; CHECK-BE-NEXT: vmrgew v2, v3, v2 |
| ; CHECK-BE-NEXT: vmrgew v3, v5, v4 |
| ; CHECK-BE-NEXT: vmrgew v4, v1, v0 |
| ; CHECK-BE-NEXT: vmrgew v5, v7, v6 |
| ; CHECK-BE-NEXT: stxv v3, 16(r3) |
| ; CHECK-BE-NEXT: stxv v2, 0(r3) |
| ; CHECK-BE-NEXT: stxv v5, 48(r3) |
| ; CHECK-BE-NEXT: stxv v4, 32(r3) |
| ; CHECK-BE-NEXT: blr |
| entry: |
| %0 = sitofp <16 x i8> %a to <16 x float> |
| store <16 x float> %0, <16 x float>* %agg.result, align 64 |
| ret void |
| } |
