blob: 708e844b549df704d556a0f3f8281080307e0543 [file] [log] [blame]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-P8
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-P9
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-BE
define i16 @test2elt(i64 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xscvspdpn f0, vs0
; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 3
; CHECK-P8-NEXT: xscvspdpn f1, vs1
; CHECK-P8-NEXT: xscvdpsxws f0, f0
; CHECK-P8-NEXT: xscvdpsxws f1, f1
; CHECK-P8-NEXT: mfvsrwz r4, f0
; CHECK-P8-NEXT: mfvsrwz r3, f1
; CHECK-P8-NEXT: mtvsrd f1, r4
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: vmrglb v2, v3, v2
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: clrldi r3, r3, 48
; CHECK-P8-NEXT: sth r3, -2(r1)
; CHECK-P8-NEXT: lhz r3, -2(r1)
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xscvspdpn f0, vs0
; CHECK-P9-NEXT: xxsldwi vs1, v2, v2, 3
; CHECK-P9-NEXT: xscvdpsxws f0, f0
; CHECK-P9-NEXT: xscvspdpn f1, vs1
; CHECK-P9-NEXT: xscvdpsxws f1, f1
; CHECK-P9-NEXT: mfvsrwz r4, f0
; CHECK-P9-NEXT: mfvsrwz r3, f1
; CHECK-P9-NEXT: mtvsrd f1, r4
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: xxswapd v3, vs1
; CHECK-P9-NEXT: addi r3, r1, -2
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: vmrglb v2, v3, v2
; CHECK-P9-NEXT: vsldoi v2, v2, v2, 8
; CHECK-P9-NEXT: stxsihx v2, 0, r3
; CHECK-P9-NEXT: lhz r3, -2(r1)
; CHECK-P9-NEXT: blr
;
; CHECK-BE-LABEL: test2elt:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: mtvsrd f0, r3
; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 1
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvspdpn f1, vs1
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: mfvsrwz r3, f0
; CHECK-BE-NEXT: sldi r3, r3, 56
; CHECK-BE-NEXT: mfvsrwz r4, f1
; CHECK-BE-NEXT: mtvsrd v2, r3
; CHECK-BE-NEXT: addi r3, r1, -2
; CHECK-BE-NEXT: sldi r4, r4, 56
; CHECK-BE-NEXT: mtvsrd v3, r4
; CHECK-BE-NEXT: vmrghb v2, v2, v3
; CHECK-BE-NEXT: vsldoi v2, v2, v2, 10
; CHECK-BE-NEXT: stxsihx v2, 0, r3
; CHECK-BE-NEXT: lhz r3, -2(r1)
; CHECK-BE-NEXT: blr
entry:
%0 = bitcast i64 %a.coerce to <2 x float>
%1 = fptoui <2 x float> %0 to <2 x i8>
%2 = bitcast <2 x i8> %1 to i16
ret i16 %2
}
define i32 @test4elt(<4 x float> %a) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
; CHECK-P8-NEXT: xscvspdpn f1, v2
; CHECK-P8-NEXT: xxswapd vs2, v2
; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1
; CHECK-P8-NEXT: xscvspdpn f0, vs0
; CHECK-P8-NEXT: xscvspdpn f2, vs2
; CHECK-P8-NEXT: xscvspdpn f3, vs3
; CHECK-P8-NEXT: xscvdpsxws f1, f1
; CHECK-P8-NEXT: xscvdpsxws f0, f0
; CHECK-P8-NEXT: xscvdpsxws f2, f2
; CHECK-P8-NEXT: xscvdpsxws f3, f3
; CHECK-P8-NEXT: mfvsrwz r3, f1
; CHECK-P8-NEXT: mtvsrd f1, r3
; CHECK-P8-NEXT: mfvsrwz r3, f0
; CHECK-P8-NEXT: mfvsrwz r4, f2
; CHECK-P8-NEXT: xxswapd v4, vs1
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mfvsrwz r3, f3
; CHECK-P8-NEXT: mtvsrd f2, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: mtvsrd f3, r3
; CHECK-P8-NEXT: xxswapd v3, vs2
; CHECK-P8-NEXT: xxswapd v5, vs3
; CHECK-P8-NEXT: vmrglb v2, v3, v2
; CHECK-P8-NEXT: vmrglb v3, v4, v5
; CHECK-P8-NEXT: vmrglh v2, v3, v2
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: mfvsrwz r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test4elt:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3
; CHECK-P9-NEXT: xxswapd vs1, v2
; CHECK-P9-NEXT: xxsldwi vs2, v2, v2, 1
; CHECK-P9-NEXT: xscvspdpn f3, v2
; CHECK-P9-NEXT: xscvspdpn f0, vs0
; CHECK-P9-NEXT: xscvspdpn f1, vs1
; CHECK-P9-NEXT: xscvspdpn f2, vs2
; CHECK-P9-NEXT: xscvdpsxws f3, f3
; CHECK-P9-NEXT: xscvdpsxws f0, f0
; CHECK-P9-NEXT: xscvdpsxws f1, f1
; CHECK-P9-NEXT: xscvdpsxws f2, f2
; CHECK-P9-NEXT: mfvsrwz r5, f3
; CHECK-P9-NEXT: mfvsrwz r3, f0
; CHECK-P9-NEXT: mfvsrwz r4, f1
; CHECK-P9-NEXT: mfvsrwz r6, f2
; CHECK-P9-NEXT: mtvsrd f2, r5
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtvsrd f1, r4
; CHECK-P9-NEXT: mtvsrd f3, r6
; CHECK-P9-NEXT: xxswapd v4, vs2
; CHECK-P9-NEXT: li r3, 0
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xxswapd v3, vs1
; CHECK-P9-NEXT: xxswapd v5, vs3
; CHECK-P9-NEXT: vmrglb v2, v3, v2
; CHECK-P9-NEXT: vmrglb v3, v4, v5
; CHECK-P9-NEXT: vmrglh v2, v3, v2
; CHECK-P9-NEXT: vextuwrx r3, r3, v2
; CHECK-P9-NEXT: blr
;
; CHECK-BE-LABEL: test4elt:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 3
; CHECK-BE-NEXT: xxswapd vs1, v2
; CHECK-BE-NEXT: xxsldwi vs2, v2, v2, 1
; CHECK-BE-NEXT: xscvspdpn f3, v2
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvspdpn f1, vs1
; CHECK-BE-NEXT: xscvspdpn f2, vs2
; CHECK-BE-NEXT: xscvdpsxws f3, f3
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: xscvdpsxws f2, f2
; CHECK-BE-NEXT: mfvsrwz r5, f3
; CHECK-BE-NEXT: sldi r5, r5, 56
; CHECK-BE-NEXT: mfvsrwz r3, f0
; CHECK-BE-NEXT: mfvsrwz r4, f1
; CHECK-BE-NEXT: mfvsrwz r6, f2
; CHECK-BE-NEXT: mtvsrd v4, r5
; CHECK-BE-NEXT: sldi r3, r3, 56
; CHECK-BE-NEXT: sldi r4, r4, 56
; CHECK-BE-NEXT: sldi r6, r6, 56
; CHECK-BE-NEXT: mtvsrd v2, r3
; CHECK-BE-NEXT: mtvsrd v3, r4
; CHECK-BE-NEXT: mtvsrd v5, r6
; CHECK-BE-NEXT: li r3, 0
; CHECK-BE-NEXT: vmrghb v2, v3, v2
; CHECK-BE-NEXT: vmrghb v3, v4, v5
; CHECK-BE-NEXT: vmrghh v2, v3, v2
; CHECK-BE-NEXT: vextuwlx r3, r3, v2
; CHECK-BE-NEXT: blr
entry:
%0 = fptoui <4 x float> %a to <4 x i8>
%1 = bitcast <4 x i8> %0 to i32
ret i32 %1
}
define i64 @test8elt(<8 x float>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: lvx v5, r3, r4
; CHECK-P8-NEXT: xxswapd vs1, v2
; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
; CHECK-P8-NEXT: xxsldwi vs2, v5, v5, 3
; CHECK-P8-NEXT: xscvspdpn f4, v5
; CHECK-P8-NEXT: xxswapd vs3, v5
; CHECK-P8-NEXT: xxsldwi vs5, v5, v5, 1
; CHECK-P8-NEXT: xscvspdpn f1, vs1
; CHECK-P8-NEXT: xscvspdpn f0, vs0
; CHECK-P8-NEXT: xscvspdpn f2, vs2
; CHECK-P8-NEXT: xscvspdpn f3, vs3
; CHECK-P8-NEXT: xscvspdpn f5, vs5
; CHECK-P8-NEXT: xscvdpsxws f4, f4
; CHECK-P8-NEXT: xscvdpsxws f1, f1
; CHECK-P8-NEXT: xscvdpsxws f0, f0
; CHECK-P8-NEXT: xscvdpsxws f2, f2
; CHECK-P8-NEXT: xscvdpsxws f3, f3
; CHECK-P8-NEXT: xscvdpsxws f5, f5
; CHECK-P8-NEXT: mfvsrwz r4, f4
; CHECK-P8-NEXT: mfvsrwz r6, f1
; CHECK-P8-NEXT: mfvsrwz r5, f0
; CHECK-P8-NEXT: mtvsrd f1, r6
; CHECK-P8-NEXT: mtvsrd f0, r5
; CHECK-P8-NEXT: xxswapd v4, vs1
; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 1
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: xscvspdpn f0, v2
; CHECK-P8-NEXT: mtvsrd f4, r4
; CHECK-P8-NEXT: xscvspdpn f1, vs1
; CHECK-P8-NEXT: mfvsrwz r4, f2
; CHECK-P8-NEXT: xxswapd v1, vs4
; CHECK-P8-NEXT: vmrglb v2, v4, v3
; CHECK-P8-NEXT: mtvsrd f2, r4
; CHECK-P8-NEXT: xscvdpsxws f0, f0
; CHECK-P8-NEXT: mfvsrwz r4, f5
; CHECK-P8-NEXT: xxswapd v5, vs2
; CHECK-P8-NEXT: xscvdpsxws f1, f1
; CHECK-P8-NEXT: mfvsrwz r3, f0
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mfvsrwz r3, f1
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: mtvsrd f1, r3
; CHECK-P8-NEXT: mfvsrwz r3, f3
; CHECK-P8-NEXT: mtvsrd f3, r4
; CHECK-P8-NEXT: xxswapd v4, vs1
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: xxswapd v6, vs3
; CHECK-P8-NEXT: xxswapd v0, vs0
; CHECK-P8-NEXT: vmrglb v3, v3, v4
; CHECK-P8-NEXT: vmrglb v4, v0, v5
; CHECK-P8-NEXT: vmrglb v5, v1, v6
; CHECK-P8-NEXT: vmrglh v2, v3, v2
; CHECK-P8-NEXT: vmrglh v3, v5, v4
; CHECK-P8-NEXT: vmrglw v2, v3, v2
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test8elt:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lxv vs0, 16(r3)
; CHECK-P9-NEXT: lxv vs1, 0(r3)
; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
; CHECK-P9-NEXT: xxswapd vs3, vs1
; CHECK-P9-NEXT: xxsldwi vs4, vs1, vs1, 1
; CHECK-P9-NEXT: xxsldwi vs5, vs0, vs0, 3
; CHECK-P9-NEXT: xxswapd vs6, vs0
; CHECK-P9-NEXT: xxsldwi vs7, vs0, vs0, 1
; CHECK-P9-NEXT: xscvspdpn f1, vs1
; CHECK-P9-NEXT: xscvspdpn f0, vs0
; CHECK-P9-NEXT: xscvspdpn f2, vs2
; CHECK-P9-NEXT: xscvspdpn f3, vs3
; CHECK-P9-NEXT: xscvspdpn f4, vs4
; CHECK-P9-NEXT: xscvspdpn f5, vs5
; CHECK-P9-NEXT: xscvspdpn f6, vs6
; CHECK-P9-NEXT: xscvspdpn f7, vs7
; CHECK-P9-NEXT: xscvdpsxws f1, f1
; CHECK-P9-NEXT: xscvdpsxws f0, f0
; CHECK-P9-NEXT: xscvdpsxws f2, f2
; CHECK-P9-NEXT: xscvdpsxws f3, f3
; CHECK-P9-NEXT: xscvdpsxws f4, f4
; CHECK-P9-NEXT: xscvdpsxws f5, f5
; CHECK-P9-NEXT: xscvdpsxws f6, f6
; CHECK-P9-NEXT: xscvdpsxws f7, f7
; CHECK-P9-NEXT: mfvsrwz r5, f1
; CHECK-P9-NEXT: mfvsrwz r9, f0
; CHECK-P9-NEXT: mfvsrwz r3, f2
; CHECK-P9-NEXT: mfvsrwz r4, f3
; CHECK-P9-NEXT: mfvsrwz r6, f4
; CHECK-P9-NEXT: mfvsrwz r7, f5
; CHECK-P9-NEXT: mfvsrwz r8, f6
; CHECK-P9-NEXT: mfvsrwz r10, f7
; CHECK-P9-NEXT: mtvsrd f2, r5
; CHECK-P9-NEXT: mtvsrd f6, r9
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtvsrd f1, r4
; CHECK-P9-NEXT: mtvsrd f3, r6
; CHECK-P9-NEXT: mtvsrd f4, r7
; CHECK-P9-NEXT: mtvsrd f5, r8
; CHECK-P9-NEXT: mtvsrd f7, r10
; CHECK-P9-NEXT: xxswapd v4, vs2
; CHECK-P9-NEXT: xxswapd v6, vs6
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xxswapd v3, vs1
; CHECK-P9-NEXT: xxswapd v5, vs3
; CHECK-P9-NEXT: xxswapd v0, vs4
; CHECK-P9-NEXT: xxswapd v1, vs5
; CHECK-P9-NEXT: xxswapd v7, vs7
; CHECK-P9-NEXT: vmrglb v2, v3, v2
; CHECK-P9-NEXT: vmrglb v3, v4, v5
; CHECK-P9-NEXT: vmrglb v4, v1, v0
; CHECK-P9-NEXT: vmrglb v5, v6, v7
; CHECK-P9-NEXT: vmrglh v2, v3, v2
; CHECK-P9-NEXT: vmrglh v3, v5, v4
; CHECK-P9-NEXT: vmrglw v2, v3, v2
; CHECK-P9-NEXT: mfvsrld r3, v2
; CHECK-P9-NEXT: blr
;
; CHECK-BE-LABEL: test8elt:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: lxv vs1, 16(r3)
; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
; CHECK-BE-NEXT: xxswapd vs3, vs1
; CHECK-BE-NEXT: xxsldwi vs4, vs1, vs1, 1
; CHECK-BE-NEXT: xxsldwi vs5, vs0, vs0, 3
; CHECK-BE-NEXT: xxswapd vs6, vs0
; CHECK-BE-NEXT: xxsldwi vs7, vs0, vs0, 1
; CHECK-BE-NEXT: xscvspdpn f1, vs1
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvspdpn f2, vs2
; CHECK-BE-NEXT: xscvspdpn f3, vs3
; CHECK-BE-NEXT: xscvspdpn f4, vs4
; CHECK-BE-NEXT: xscvspdpn f5, vs5
; CHECK-BE-NEXT: xscvspdpn f6, vs6
; CHECK-BE-NEXT: xscvspdpn f7, vs7
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: xscvdpsxws f2, f2
; CHECK-BE-NEXT: xscvdpsxws f3, f3
; CHECK-BE-NEXT: xscvdpsxws f4, f4
; CHECK-BE-NEXT: xscvdpsxws f5, f5
; CHECK-BE-NEXT: xscvdpsxws f6, f6
; CHECK-BE-NEXT: xscvdpsxws f7, f7
; CHECK-BE-NEXT: mfvsrwz r5, f1
; CHECK-BE-NEXT: mfvsrwz r9, f0
; CHECK-BE-NEXT: sldi r5, r5, 56
; CHECK-BE-NEXT: sldi r9, r9, 56
; CHECK-BE-NEXT: mfvsrwz r3, f2
; CHECK-BE-NEXT: mfvsrwz r4, f3
; CHECK-BE-NEXT: mfvsrwz r6, f4
; CHECK-BE-NEXT: mfvsrwz r7, f5
; CHECK-BE-NEXT: mfvsrwz r8, f6
; CHECK-BE-NEXT: mfvsrwz r10, f7
; CHECK-BE-NEXT: mtvsrd v4, r5
; CHECK-BE-NEXT: mtvsrd v6, r9
; CHECK-BE-NEXT: sldi r3, r3, 56
; CHECK-BE-NEXT: sldi r4, r4, 56
; CHECK-BE-NEXT: sldi r6, r6, 56
; CHECK-BE-NEXT: sldi r7, r7, 56
; CHECK-BE-NEXT: sldi r8, r8, 56
; CHECK-BE-NEXT: sldi r10, r10, 56
; CHECK-BE-NEXT: mtvsrd v2, r3
; CHECK-BE-NEXT: mtvsrd v3, r4
; CHECK-BE-NEXT: mtvsrd v5, r6
; CHECK-BE-NEXT: mtvsrd v0, r7
; CHECK-BE-NEXT: mtvsrd v1, r8
; CHECK-BE-NEXT: mtvsrd v7, r10
; CHECK-BE-NEXT: vmrghb v2, v3, v2
; CHECK-BE-NEXT: vmrghb v3, v4, v5
; CHECK-BE-NEXT: vmrghb v4, v1, v0
; CHECK-BE-NEXT: vmrghb v5, v6, v7
; CHECK-BE-NEXT: vmrghh v2, v3, v2
; CHECK-BE-NEXT: vmrghh v3, v5, v4
; CHECK-BE-NEXT: vmrghw v2, v3, v2
; CHECK-BE-NEXT: mfvsrd r3, v2
; CHECK-BE-NEXT: blr
entry:
%a = load <8 x float>, <8 x float>* %0, align 32
%1 = fptoui <8 x float> %a to <8 x i8>
%2 = bitcast <8 x i8> %1 to i64
ret i64 %2
}
define <16 x i8> @test16elt(<16 x float>* nocapture readonly) local_unnamed_addr #3 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: lvx v3, r3, r4
; CHECK-P8-NEXT: li r4, 32
; CHECK-P8-NEXT: xscvspdpn f2, v2
; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
; CHECK-P8-NEXT: xscvspdpn f4, v3
; CHECK-P8-NEXT: xxswapd vs1, v2
; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1
; CHECK-P8-NEXT: xxsldwi vs5, v3, v3, 3
; CHECK-P8-NEXT: lvx v2, r3, r4
; CHECK-P8-NEXT: xscvspdpn f0, vs0
; CHECK-P8-NEXT: xxswapd vs6, v3
; CHECK-P8-NEXT: xscvspdpn f1, vs1
; CHECK-P8-NEXT: xxsldwi vs7, v3, v3, 1
; CHECK-P8-NEXT: xscvspdpn f3, vs3
; CHECK-P8-NEXT: xxsldwi vs8, v2, v2, 3
; CHECK-P8-NEXT: xscvdpsxws f2, f2
; CHECK-P8-NEXT: xxswapd vs9, v2
; CHECK-P8-NEXT: xscvdpsxws f4, f4
; CHECK-P8-NEXT: xscvspdpn f5, vs5
; CHECK-P8-NEXT: xscvdpsxws f0, f0
; CHECK-P8-NEXT: xscvspdpn f6, vs6
; CHECK-P8-NEXT: xscvdpsxws f1, f1
; CHECK-P8-NEXT: mfvsrwz r4, f2
; CHECK-P8-NEXT: xscvspdpn f7, vs7
; CHECK-P8-NEXT: mtvsrd f2, r4
; CHECK-P8-NEXT: mfvsrwz r4, f4
; CHECK-P8-NEXT: xscvdpsxws f3, f3
; CHECK-P8-NEXT: xscvspdpn f8, vs8
; CHECK-P8-NEXT: mtvsrd f4, r4
; CHECK-P8-NEXT: mfvsrwz r4, f0
; CHECK-P8-NEXT: xscvdpsxws f0, f5
; CHECK-P8-NEXT: xxswapd v0, vs4
; CHECK-P8-NEXT: xscvspdpn f9, vs9
; CHECK-P8-NEXT: mtvsrd f5, r4
; CHECK-P8-NEXT: mfvsrwz r4, f1
; CHECK-P8-NEXT: xscvdpsxws f1, f6
; CHECK-P8-NEXT: xxswapd v3, vs5
; CHECK-P8-NEXT: mtvsrd f6, r4
; CHECK-P8-NEXT: mfvsrwz r4, f3
; CHECK-P8-NEXT: xscvdpsxws f3, f7
; CHECK-P8-NEXT: xxswapd v4, vs6
; CHECK-P8-NEXT: mtvsrd f7, r4
; CHECK-P8-NEXT: mfvsrwz r4, f0
; CHECK-P8-NEXT: xscvdpsxws f0, f8
; CHECK-P8-NEXT: xxswapd v5, vs7
; CHECK-P8-NEXT: mtvsrd f8, r4
; CHECK-P8-NEXT: mfvsrwz r4, f1
; CHECK-P8-NEXT: xscvdpsxws f1, f9
; CHECK-P8-NEXT: xxswapd v1, vs8
; CHECK-P8-NEXT: mtvsrd f9, r4
; CHECK-P8-NEXT: mfvsrwz r4, f3
; CHECK-P8-NEXT: vmrglb v3, v4, v3
; CHECK-P8-NEXT: xxswapd v4, vs2
; CHECK-P8-NEXT: mtvsrd f3, r4
; CHECK-P8-NEXT: xxswapd v6, vs9
; CHECK-P8-NEXT: mfvsrwz r4, f0
; CHECK-P8-NEXT: xscvspdpn f0, v2
; CHECK-P8-NEXT: xxswapd v7, vs3
; CHECK-P8-NEXT: mtvsrd f5, r4
; CHECK-P8-NEXT: mfvsrwz r4, f1
; CHECK-P8-NEXT: vmrglb v4, v4, v5
; CHECK-P8-NEXT: xxswapd v5, vs5
; CHECK-P8-NEXT: mtvsrd f1, r4
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: lvx v9, r3, r4
; CHECK-P8-NEXT: vmrglb v1, v6, v1
; CHECK-P8-NEXT: xxswapd v8, vs1
; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 1
; CHECK-P8-NEXT: xxsldwi vs2, v9, v9, 3
; CHECK-P8-NEXT: xscvspdpn f4, v9
; CHECK-P8-NEXT: xxswapd vs3, v9
; CHECK-P8-NEXT: xxsldwi vs5, v9, v9, 1
; CHECK-P8-NEXT: xscvspdpn f1, vs1
; CHECK-P8-NEXT: xscvspdpn f2, vs2
; CHECK-P8-NEXT: xscvspdpn f3, vs3
; CHECK-P8-NEXT: xscvspdpn f5, vs5
; CHECK-P8-NEXT: xscvdpsxws f0, f0
; CHECK-P8-NEXT: xscvdpsxws f4, f4
; CHECK-P8-NEXT: xscvdpsxws f1, f1
; CHECK-P8-NEXT: xscvdpsxws f2, f2
; CHECK-P8-NEXT: xscvdpsxws f3, f3
; CHECK-P8-NEXT: xscvdpsxws f5, f5
; CHECK-P8-NEXT: mfvsrwz r3, f0
; CHECK-P8-NEXT: mfvsrwz r4, f4
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtvsrd f4, r4
; CHECK-P8-NEXT: mfvsrwz r3, f1
; CHECK-P8-NEXT: mfvsrwz r4, f2
; CHECK-P8-NEXT: xxswapd v9, vs4
; CHECK-P8-NEXT: mtvsrd f1, r3
; CHECK-P8-NEXT: mfvsrwz r3, f3
; CHECK-P8-NEXT: mtvsrd f2, r4
; CHECK-P8-NEXT: xxswapd v6, vs1
; CHECK-P8-NEXT: mfvsrwz r4, f5
; CHECK-P8-NEXT: vmrglb v2, v0, v7
; CHECK-P8-NEXT: xxswapd v0, vs0
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: xxswapd v7, vs2
; CHECK-P8-NEXT: mtvsrd f3, r4
; CHECK-P8-NEXT: vmrglb v5, v8, v5
; CHECK-P8-NEXT: xxswapd v8, vs0
; CHECK-P8-NEXT: xxswapd v10, vs3
; CHECK-P8-NEXT: vmrglb v0, v0, v6
; CHECK-P8-NEXT: vmrglh v3, v4, v3
; CHECK-P8-NEXT: vmrglb v6, v8, v7
; CHECK-P8-NEXT: vmrglb v7, v9, v10
; CHECK-P8-NEXT: vmrglh v2, v2, v1
; CHECK-P8-NEXT: vmrglh v4, v0, v5
; CHECK-P8-NEXT: vmrglh v5, v7, v6
; CHECK-P8-NEXT: vmrglw v2, v2, v3
; CHECK-P8-NEXT: vmrglw v3, v5, v4
; CHECK-P8-NEXT: xxmrgld v2, v3, v2
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lxv vs2, 16(r3)
; CHECK-P9-NEXT: lxv vs3, 0(r3)
; CHECK-P9-NEXT: lxv vs0, 48(r3)
; CHECK-P9-NEXT: lxv vs1, 32(r3)
; CHECK-P9-NEXT: std r26, -48(r1) # 8-byte Folded Spill
; CHECK-P9-NEXT: std r27, -40(r1) # 8-byte Folded Spill
; CHECK-P9-NEXT: std r28, -32(r1) # 8-byte Folded Spill
; CHECK-P9-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P9-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P9-NEXT: xxsldwi vs4, vs3, vs3, 3
; CHECK-P9-NEXT: xxswapd vs5, vs3
; CHECK-P9-NEXT: xxsldwi vs6, vs3, vs3, 1
; CHECK-P9-NEXT: xxsldwi vs7, vs2, vs2, 3
; CHECK-P9-NEXT: xxswapd vs8, vs2
; CHECK-P9-NEXT: xxsldwi vs9, vs2, vs2, 1
; CHECK-P9-NEXT: xxsldwi vs10, vs1, vs1, 3
; CHECK-P9-NEXT: xxswapd vs11, vs1
; CHECK-P9-NEXT: xxsldwi vs12, vs1, vs1, 1
; CHECK-P9-NEXT: xxsldwi vs13, vs0, vs0, 3
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xxsldwi v3, vs0, vs0, 1
; CHECK-P9-NEXT: xscvspdpn f3, vs3
; CHECK-P9-NEXT: xscvspdpn f2, vs2
; CHECK-P9-NEXT: xscvspdpn f1, vs1
; CHECK-P9-NEXT: xscvspdpn f0, vs0
; CHECK-P9-NEXT: xscvspdpn f4, vs4
; CHECK-P9-NEXT: xscvspdpn f5, vs5
; CHECK-P9-NEXT: xscvspdpn f6, vs6
; CHECK-P9-NEXT: xscvspdpn f7, vs7
; CHECK-P9-NEXT: xscvspdpn f8, vs8
; CHECK-P9-NEXT: xscvspdpn f9, vs9
; CHECK-P9-NEXT: xscvspdpn f10, vs10
; CHECK-P9-NEXT: xscvspdpn f11, vs11
; CHECK-P9-NEXT: xscvspdpn f12, vs12
; CHECK-P9-NEXT: xscvspdpn f13, vs13
; CHECK-P9-NEXT: xscvspdpn v2, v2
; CHECK-P9-NEXT: xscvspdpn v3, v3
; CHECK-P9-NEXT: xscvdpsxws f3, f3
; CHECK-P9-NEXT: xscvdpsxws f2, f2
; CHECK-P9-NEXT: xscvdpsxws f1, f1
; CHECK-P9-NEXT: xscvdpsxws f0, f0
; CHECK-P9-NEXT: xscvdpsxws f4, f4
; CHECK-P9-NEXT: xscvdpsxws f5, f5
; CHECK-P9-NEXT: xscvdpsxws f6, f6
; CHECK-P9-NEXT: xscvdpsxws f7, f7
; CHECK-P9-NEXT: xscvdpsxws f8, f8
; CHECK-P9-NEXT: xscvdpsxws f9, f9
; CHECK-P9-NEXT: xscvdpsxws f10, f10
; CHECK-P9-NEXT: xscvdpsxws f11, f11
; CHECK-P9-NEXT: xscvdpsxws f12, f12
; CHECK-P9-NEXT: xscvdpsxws f13, f13
; CHECK-P9-NEXT: xscvdpsxws v2, v2
; CHECK-P9-NEXT: xscvdpsxws v3, v3
; CHECK-P9-NEXT: mfvsrwz r3, f3
; CHECK-P9-NEXT: mfvsrwz r4, f2
; CHECK-P9-NEXT: mfvsrwz r11, f1
; CHECK-P9-NEXT: mfvsrwz r12, f0
; CHECK-P9-NEXT: mfvsrwz r5, f4
; CHECK-P9-NEXT: mfvsrwz r6, f5
; CHECK-P9-NEXT: mfvsrwz r7, f6
; CHECK-P9-NEXT: mfvsrwz r8, f7
; CHECK-P9-NEXT: mfvsrwz r9, f8
; CHECK-P9-NEXT: mfvsrwz r10, f9
; CHECK-P9-NEXT: mfvsrwz r0, f10
; CHECK-P9-NEXT: mfvsrwz r30, f11
; CHECK-P9-NEXT: mfvsrwz r29, f12
; CHECK-P9-NEXT: mfvsrwz r28, f13
; CHECK-P9-NEXT: mfvsrwz r27, v2
; CHECK-P9-NEXT: mfvsrwz r26, v3
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtvsrd f1, r4
; CHECK-P9-NEXT: mtvsrd f8, r11
; CHECK-P9-NEXT: mtvsrd f9, r12
; CHECK-P9-NEXT: mtvsrd f2, r5
; CHECK-P9-NEXT: mtvsrd f3, r6
; CHECK-P9-NEXT: mtvsrd f4, r7
; CHECK-P9-NEXT: mtvsrd f5, r8
; CHECK-P9-NEXT: mtvsrd f6, r9
; CHECK-P9-NEXT: mtvsrd f7, r10
; CHECK-P9-NEXT: mtvsrd f10, r0
; CHECK-P9-NEXT: mtvsrd f11, r30
; CHECK-P9-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P9-NEXT: mtvsrd f12, r29
; CHECK-P9-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
; CHECK-P9-NEXT: mtvsrd f13, r28
; CHECK-P9-NEXT: ld r28, -32(r1) # 8-byte Folded Reload
; CHECK-P9-NEXT: mtvsrd v2, r27
; CHECK-P9-NEXT: ld r27, -40(r1) # 8-byte Folded Reload
; CHECK-P9-NEXT: mtvsrd v3, r26
; CHECK-P9-NEXT: ld r26, -48(r1) # 8-byte Folded Reload
; CHECK-P9-NEXT: xxswapd v4, vs0
; CHECK-P9-NEXT: xxswapd v5, vs2
; CHECK-P9-NEXT: xxswapd v0, vs3
; CHECK-P9-NEXT: xxswapd v1, vs4
; CHECK-P9-NEXT: xxswapd v6, vs5
; CHECK-P9-NEXT: xxswapd v7, vs6
; CHECK-P9-NEXT: xxswapd v8, vs1
; CHECK-P9-NEXT: xxswapd v9, vs7
; CHECK-P9-NEXT: xxswapd v10, vs10
; CHECK-P9-NEXT: xxswapd v11, vs11
; CHECK-P9-NEXT: xxswapd v12, vs8
; CHECK-P9-NEXT: xxswapd v13, vs12
; CHECK-P9-NEXT: xxswapd v14, vs13
; CHECK-P9-NEXT: xxswapd v2, v2
; CHECK-P9-NEXT: xxswapd v15, vs9
; CHECK-P9-NEXT: xxswapd v3, v3
; CHECK-P9-NEXT: vmrglb v5, v0, v5
; CHECK-P9-NEXT: vmrglb v4, v4, v1
; CHECK-P9-NEXT: vmrglb v0, v7, v6
; CHECK-P9-NEXT: vmrglb v1, v8, v9
; CHECK-P9-NEXT: vmrglb v6, v11, v10
; CHECK-P9-NEXT: vmrglb v7, v12, v13
; CHECK-P9-NEXT: vmrglb v2, v2, v14
; CHECK-P9-NEXT: vmrglb v3, v15, v3
; CHECK-P9-NEXT: vmrglh v4, v4, v5
; CHECK-P9-NEXT: vmrglh v5, v1, v0
; CHECK-P9-NEXT: vmrglh v0, v7, v6
; CHECK-P9-NEXT: vmrglh v2, v3, v2
; CHECK-P9-NEXT: vmrglw v3, v5, v4
; CHECK-P9-NEXT: vmrglw v2, v2, v0
; CHECK-P9-NEXT: xxmrgld v2, v2, v3
; CHECK-P9-NEXT: blr
;
; CHECK-BE-LABEL: test16elt:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxv vs2, 32(r3)
; CHECK-BE-NEXT: lxv vs3, 48(r3)
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: lxv vs1, 16(r3)
; CHECK-BE-NEXT: std r26, -48(r1) # 8-byte Folded Spill
; CHECK-BE-NEXT: std r27, -40(r1) # 8-byte Folded Spill
; CHECK-BE-NEXT: std r28, -32(r1) # 8-byte Folded Spill
; CHECK-BE-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-BE-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-BE-NEXT: xxsldwi vs4, vs3, vs3, 3
; CHECK-BE-NEXT: xxswapd vs5, vs3
; CHECK-BE-NEXT: xxsldwi vs6, vs3, vs3, 1
; CHECK-BE-NEXT: xxsldwi vs7, vs2, vs2, 3
; CHECK-BE-NEXT: xxswapd vs8, vs2
; CHECK-BE-NEXT: xxsldwi vs9, vs2, vs2, 1
; CHECK-BE-NEXT: xxsldwi vs10, vs1, vs1, 3
; CHECK-BE-NEXT: xxswapd vs11, vs1
; CHECK-BE-NEXT: xxsldwi vs12, vs1, vs1, 1
; CHECK-BE-NEXT: xxsldwi vs13, vs0, vs0, 3
; CHECK-BE-NEXT: xxswapd v2, vs0
; CHECK-BE-NEXT: xxsldwi v3, vs0, vs0, 1
; CHECK-BE-NEXT: xscvspdpn f3, vs3
; CHECK-BE-NEXT: xscvspdpn f2, vs2
; CHECK-BE-NEXT: xscvspdpn f1, vs1
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvspdpn f4, vs4
; CHECK-BE-NEXT: xscvspdpn f5, vs5
; CHECK-BE-NEXT: xscvspdpn f6, vs6
; CHECK-BE-NEXT: xscvspdpn f7, vs7
; CHECK-BE-NEXT: xscvspdpn f8, vs8
; CHECK-BE-NEXT: xscvspdpn f9, vs9
; CHECK-BE-NEXT: xscvspdpn f10, vs10
; CHECK-BE-NEXT: xscvspdpn f11, vs11
; CHECK-BE-NEXT: xscvspdpn f12, vs12
; CHECK-BE-NEXT: xscvspdpn f13, vs13
; CHECK-BE-NEXT: xscvspdpn v2, v2
; CHECK-BE-NEXT: xscvspdpn v3, v3
; CHECK-BE-NEXT: xscvdpsxws f3, f3
; CHECK-BE-NEXT: xscvdpsxws f2, f2
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: xscvdpsxws f4, f4
; CHECK-BE-NEXT: xscvdpsxws f5, f5
; CHECK-BE-NEXT: xscvdpsxws f6, f6
; CHECK-BE-NEXT: xscvdpsxws f7, f7
; CHECK-BE-NEXT: xscvdpsxws f8, f8
; CHECK-BE-NEXT: xscvdpsxws f9, f9
; CHECK-BE-NEXT: xscvdpsxws f10, f10
; CHECK-BE-NEXT: xscvdpsxws f11, f11
; CHECK-BE-NEXT: xscvdpsxws f12, f12
; CHECK-BE-NEXT: xscvdpsxws f13, f13
; CHECK-BE-NEXT: xscvdpsxws v2, v2
; CHECK-BE-NEXT: xscvdpsxws v3, v3
; CHECK-BE-NEXT: mfvsrwz r3, f3
; CHECK-BE-NEXT: mfvsrwz r4, f2
; CHECK-BE-NEXT: mfvsrwz r11, f1
; CHECK-BE-NEXT: mfvsrwz r12, f0
; CHECK-BE-NEXT: mfvsrwz r5, f4
; CHECK-BE-NEXT: mfvsrwz r6, f5
; CHECK-BE-NEXT: mfvsrwz r7, f6
; CHECK-BE-NEXT: mfvsrwz r8, f7
; CHECK-BE-NEXT: mfvsrwz r9, f8
; CHECK-BE-NEXT: mfvsrwz r10, f9
; CHECK-BE-NEXT: mfvsrwz r0, f10
; CHECK-BE-NEXT: mfvsrwz r30, f11
; CHECK-BE-NEXT: mfvsrwz r29, f12
; CHECK-BE-NEXT: mfvsrwz r28, f13
; CHECK-BE-NEXT: mfvsrwz r27, v2
; CHECK-BE-NEXT: mfvsrwz r26, v3
; CHECK-BE-NEXT: sldi r3, r3, 56
; CHECK-BE-NEXT: sldi r4, r4, 56
; CHECK-BE-NEXT: sldi r11, r11, 56
; CHECK-BE-NEXT: sldi r12, r12, 56
; CHECK-BE-NEXT: sldi r5, r5, 56
; CHECK-BE-NEXT: sldi r6, r6, 56
; CHECK-BE-NEXT: sldi r7, r7, 56
; CHECK-BE-NEXT: sldi r8, r8, 56
; CHECK-BE-NEXT: sldi r9, r9, 56
; CHECK-BE-NEXT: sldi r10, r10, 56
; CHECK-BE-NEXT: sldi r0, r0, 56
; CHECK-BE-NEXT: sldi r30, r30, 56
; CHECK-BE-NEXT: sldi r29, r29, 56
; CHECK-BE-NEXT: sldi r28, r28, 56
; CHECK-BE-NEXT: sldi r27, r27, 56
; CHECK-BE-NEXT: sldi r26, r26, 56
; CHECK-BE-NEXT: mtvsrd v2, r3
; CHECK-BE-NEXT: mtvsrd v3, r4
; CHECK-BE-NEXT: mtvsrd v10, r11
; CHECK-BE-NEXT: mtvsrd v14, r12
; CHECK-BE-NEXT: mtvsrd v4, r5
; CHECK-BE-NEXT: mtvsrd v5, r6
; CHECK-BE-NEXT: mtvsrd v0, r7
; CHECK-BE-NEXT: mtvsrd v1, r8
; CHECK-BE-NEXT: mtvsrd v6, r9
; CHECK-BE-NEXT: mtvsrd v7, r10
; CHECK-BE-NEXT: mtvsrd v8, r0
; CHECK-BE-NEXT: mtvsrd v9, r30
; CHECK-BE-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-BE-NEXT: mtvsrd v11, r29
; CHECK-BE-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
; CHECK-BE-NEXT: mtvsrd v12, r28
; CHECK-BE-NEXT: ld r28, -32(r1) # 8-byte Folded Reload
; CHECK-BE-NEXT: mtvsrd v13, r27
; CHECK-BE-NEXT: ld r27, -40(r1) # 8-byte Folded Reload
; CHECK-BE-NEXT: mtvsrd v15, r26
; CHECK-BE-NEXT: ld r26, -48(r1) # 8-byte Folded Reload
; CHECK-BE-NEXT: vmrghb v4, v5, v4
; CHECK-BE-NEXT: vmrghb v2, v2, v0
; CHECK-BE-NEXT: vmrghb v5, v6, v1
; CHECK-BE-NEXT: vmrghb v3, v3, v7
; CHECK-BE-NEXT: vmrghb v0, v9, v8
; CHECK-BE-NEXT: vmrghb v1, v10, v11
; CHECK-BE-NEXT: vmrghb v6, v13, v12
; CHECK-BE-NEXT: vmrghb v7, v14, v15
; CHECK-BE-NEXT: vmrghh v2, v2, v4
; CHECK-BE-NEXT: vmrghh v3, v3, v5
; CHECK-BE-NEXT: vmrghh v4, v1, v0
; CHECK-BE-NEXT: vmrghh v5, v7, v6
; CHECK-BE-NEXT: vmrghw v2, v3, v2
; CHECK-BE-NEXT: vmrghw v3, v5, v4
; CHECK-BE-NEXT: xxmrghd v2, v3, v2
; CHECK-BE-NEXT: blr
entry:
%a = load <16 x float>, <16 x float>* %0, align 64
%1 = fptoui <16 x float> %a to <16 x i8>
ret <16 x i8> %1
}
define i16 @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xscvspdpn f0, vs0
; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 3
; CHECK-P8-NEXT: xscvspdpn f1, vs1
; CHECK-P8-NEXT: xscvdpsxws f0, f0
; CHECK-P8-NEXT: xscvdpsxws f1, f1
; CHECK-P8-NEXT: mfvsrwz r4, f0
; CHECK-P8-NEXT: mfvsrwz r3, f1
; CHECK-P8-NEXT: mtvsrd f1, r4
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: vmrglb v2, v3, v2
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: clrldi r3, r3, 48
; CHECK-P8-NEXT: sth r3, -2(r1)
; CHECK-P8-NEXT: lhz r3, -2(r1)
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt_signed:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xscvspdpn f0, vs0
; CHECK-P9-NEXT: xxsldwi vs1, v2, v2, 3
; CHECK-P9-NEXT: xscvdpsxws f0, f0
; CHECK-P9-NEXT: xscvspdpn f1, vs1
; CHECK-P9-NEXT: xscvdpsxws f1, f1
; CHECK-P9-NEXT: mfvsrwz r4, f0
; CHECK-P9-NEXT: mfvsrwz r3, f1
; CHECK-P9-NEXT: mtvsrd f1, r4
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: xxswapd v3, vs1
; CHECK-P9-NEXT: addi r3, r1, -2
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: vmrglb v2, v3, v2
; CHECK-P9-NEXT: vsldoi v2, v2, v2, 8
; CHECK-P9-NEXT: stxsihx v2, 0, r3
; CHECK-P9-NEXT: lhz r3, -2(r1)
; CHECK-P9-NEXT: blr
;
; CHECK-BE-LABEL: test2elt_signed:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: mtvsrd f0, r3
; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 1
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvspdpn f1, vs1
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: mfvsrwz r3, f0
; CHECK-BE-NEXT: sldi r3, r3, 56
; CHECK-BE-NEXT: mfvsrwz r4, f1
; CHECK-BE-NEXT: mtvsrd v2, r3
; CHECK-BE-NEXT: addi r3, r1, -2
; CHECK-BE-NEXT: sldi r4, r4, 56
; CHECK-BE-NEXT: mtvsrd v3, r4
; CHECK-BE-NEXT: vmrghb v2, v2, v3
; CHECK-BE-NEXT: vsldoi v2, v2, v2, 10
; CHECK-BE-NEXT: stxsihx v2, 0, r3
; CHECK-BE-NEXT: lhz r3, -2(r1)
; CHECK-BE-NEXT: blr
entry:
%0 = bitcast i64 %a.coerce to <2 x float>
%1 = fptosi <2 x float> %0 to <2 x i8>
%2 = bitcast <2 x i8> %1 to i16
ret i16 %2
}
define i32 @test4elt_signed(<4 x float> %a) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
; CHECK-P8-NEXT: xscvspdpn f1, v2
; CHECK-P8-NEXT: xxswapd vs2, v2
; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1
; CHECK-P8-NEXT: xscvspdpn f0, vs0
; CHECK-P8-NEXT: xscvspdpn f2, vs2
; CHECK-P8-NEXT: xscvspdpn f3, vs3
; CHECK-P8-NEXT: xscvdpsxws f1, f1
; CHECK-P8-NEXT: xscvdpsxws f0, f0
; CHECK-P8-NEXT: xscvdpsxws f2, f2
; CHECK-P8-NEXT: xscvdpsxws f3, f3
; CHECK-P8-NEXT: mfvsrwz r3, f1
; CHECK-P8-NEXT: mtvsrd f1, r3
; CHECK-P8-NEXT: mfvsrwz r3, f0
; CHECK-P8-NEXT: mfvsrwz r4, f2
; CHECK-P8-NEXT: xxswapd v4, vs1
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mfvsrwz r3, f3
; CHECK-P8-NEXT: mtvsrd f2, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: mtvsrd f3, r3
; CHECK-P8-NEXT: xxswapd v3, vs2
; CHECK-P8-NEXT: xxswapd v5, vs3
; CHECK-P8-NEXT: vmrglb v2, v3, v2
; CHECK-P8-NEXT: vmrglb v3, v4, v5
; CHECK-P8-NEXT: vmrglh v2, v3, v2
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: mfvsrwz r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test4elt_signed:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3
; CHECK-P9-NEXT: xxswapd vs1, v2
; CHECK-P9-NEXT: xxsldwi vs2, v2, v2, 1
; CHECK-P9-NEXT: xscvspdpn f3, v2
; CHECK-P9-NEXT: xscvspdpn f0, vs0
; CHECK-P9-NEXT: xscvspdpn f1, vs1
; CHECK-P9-NEXT: xscvspdpn f2, vs2
; CHECK-P9-NEXT: xscvdpsxws f3, f3
; CHECK-P9-NEXT: xscvdpsxws f0, f0
; CHECK-P9-NEXT: xscvdpsxws f1, f1
; CHECK-P9-NEXT: xscvdpsxws f2, f2
; CHECK-P9-NEXT: mfvsrwz r5, f3
; CHECK-P9-NEXT: mfvsrwz r3, f0
; CHECK-P9-NEXT: mfvsrwz r4, f1
; CHECK-P9-NEXT: mfvsrwz r6, f2
; CHECK-P9-NEXT: mtvsrd f2, r5
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtvsrd f1, r4
; CHECK-P9-NEXT: mtvsrd f3, r6
; CHECK-P9-NEXT: xxswapd v4, vs2
; CHECK-P9-NEXT: li r3, 0
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xxswapd v3, vs1
; CHECK-P9-NEXT: xxswapd v5, vs3
; CHECK-P9-NEXT: vmrglb v2, v3, v2
; CHECK-P9-NEXT: vmrglb v3, v4, v5
; CHECK-P9-NEXT: vmrglh v2, v3, v2
; CHECK-P9-NEXT: vextuwrx r3, r3, v2
; CHECK-P9-NEXT: blr
;
; CHECK-BE-LABEL: test4elt_signed:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 3
; CHECK-BE-NEXT: xxswapd vs1, v2
; CHECK-BE-NEXT: xxsldwi vs2, v2, v2, 1
; CHECK-BE-NEXT: xscvspdpn f3, v2
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvspdpn f1, vs1
; CHECK-BE-NEXT: xscvspdpn f2, vs2
; CHECK-BE-NEXT: xscvdpsxws f3, f3
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: xscvdpsxws f2, f2
; CHECK-BE-NEXT: mfvsrwz r5, f3
; CHECK-BE-NEXT: sldi r5, r5, 56
; CHECK-BE-NEXT: mfvsrwz r3, f0
; CHECK-BE-NEXT: mfvsrwz r4, f1
; CHECK-BE-NEXT: mfvsrwz r6, f2
; CHECK-BE-NEXT: mtvsrd v4, r5
; CHECK-BE-NEXT: sldi r3, r3, 56
; CHECK-BE-NEXT: sldi r4, r4, 56
; CHECK-BE-NEXT: sldi r6, r6, 56
; CHECK-BE-NEXT: mtvsrd v2, r3
; CHECK-BE-NEXT: mtvsrd v3, r4
; CHECK-BE-NEXT: mtvsrd v5, r6
; CHECK-BE-NEXT: li r3, 0
; CHECK-BE-NEXT: vmrghb v2, v3, v2
; CHECK-BE-NEXT: vmrghb v3, v4, v5
; CHECK-BE-NEXT: vmrghh v2, v3, v2
; CHECK-BE-NEXT: vextuwlx r3, r3, v2
; CHECK-BE-NEXT: blr
entry:
%0 = fptosi <4 x float> %a to <4 x i8>
%1 = bitcast <4 x i8> %0 to i32
ret i32 %1
}
define i64 @test8elt_signed(<8 x float>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: lvx v5, r3, r4
; CHECK-P8-NEXT: xxswapd vs1, v2
; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
; CHECK-P8-NEXT: xxsldwi vs2, v5, v5, 3
; CHECK-P8-NEXT: xscvspdpn f4, v5
; CHECK-P8-NEXT: xxswapd vs3, v5
; CHECK-P8-NEXT: xxsldwi vs5, v5, v5, 1
; CHECK-P8-NEXT: xscvspdpn f1, vs1
; CHECK-P8-NEXT: xscvspdpn f0, vs0
; CHECK-P8-NEXT: xscvspdpn f2, vs2
; CHECK-P8-NEXT: xscvspdpn f3, vs3
; CHECK-P8-NEXT: xscvspdpn f5, vs5
; CHECK-P8-NEXT: xscvdpsxws f4, f4
; CHECK-P8-NEXT: xscvdpsxws f1, f1
; CHECK-P8-NEXT: xscvdpsxws f0, f0
; CHECK-P8-NEXT: xscvdpsxws f2, f2
; CHECK-P8-NEXT: xscvdpsxws f3, f3
; CHECK-P8-NEXT: xscvdpsxws f5, f5
; CHECK-P8-NEXT: mfvsrwz r4, f4
; CHECK-P8-NEXT: mfvsrwz r6, f1
; CHECK-P8-NEXT: mfvsrwz r5, f0
; CHECK-P8-NEXT: mtvsrd f1, r6
; CHECK-P8-NEXT: mtvsrd f0, r5
; CHECK-P8-NEXT: xxswapd v4, vs1
; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 1
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: xscvspdpn f0, v2
; CHECK-P8-NEXT: mtvsrd f4, r4
; CHECK-P8-NEXT: xscvspdpn f1, vs1
; CHECK-P8-NEXT: mfvsrwz r4, f2
; CHECK-P8-NEXT: xxswapd v1, vs4
; CHECK-P8-NEXT: vmrglb v2, v4, v3
; CHECK-P8-NEXT: mtvsrd f2, r4
; CHECK-P8-NEXT: xscvdpsxws f0, f0
; CHECK-P8-NEXT: mfvsrwz r4, f5
; CHECK-P8-NEXT: xxswapd v5, vs2
; CHECK-P8-NEXT: xscvdpsxws f1, f1
; CHECK-P8-NEXT: mfvsrwz r3, f0
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mfvsrwz r3, f1
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: mtvsrd f1, r3
; CHECK-P8-NEXT: mfvsrwz r3, f3
; CHECK-P8-NEXT: mtvsrd f3, r4
; CHECK-P8-NEXT: xxswapd v4, vs1
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: xxswapd v6, vs3
; CHECK-P8-NEXT: xxswapd v0, vs0
; CHECK-P8-NEXT: vmrglb v3, v3, v4
; CHECK-P8-NEXT: vmrglb v4, v0, v5
; CHECK-P8-NEXT: vmrglb v5, v1, v6
; CHECK-P8-NEXT: vmrglh v2, v3, v2
; CHECK-P8-NEXT: vmrglh v3, v5, v4
; CHECK-P8-NEXT: vmrglw v2, v3, v2
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test8elt_signed:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lxv vs0, 16(r3)
; CHECK-P9-NEXT: lxv vs1, 0(r3)
; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
; CHECK-P9-NEXT: xxswapd vs3, vs1
; CHECK-P9-NEXT: xxsldwi vs4, vs1, vs1, 1
; CHECK-P9-NEXT: xxsldwi vs5, vs0, vs0, 3
; CHECK-P9-NEXT: xxswapd vs6, vs0
; CHECK-P9-NEXT: xxsldwi vs7, vs0, vs0, 1
; CHECK-P9-NEXT: xscvspdpn f1, vs1
; CHECK-P9-NEXT: xscvspdpn f0, vs0
; CHECK-P9-NEXT: xscvspdpn f2, vs2
; CHECK-P9-NEXT: xscvspdpn f3, vs3
; CHECK-P9-NEXT: xscvspdpn f4, vs4
; CHECK-P9-NEXT: xscvspdpn f5, vs5
; CHECK-P9-NEXT: xscvspdpn f6, vs6
; CHECK-P9-NEXT: xscvspdpn f7, vs7
; CHECK-P9-NEXT: xscvdpsxws f1, f1
; CHECK-P9-NEXT: xscvdpsxws f0, f0
; CHECK-P9-NEXT: xscvdpsxws f2, f2
; CHECK-P9-NEXT: xscvdpsxws f3, f3
; CHECK-P9-NEXT: xscvdpsxws f4, f4
; CHECK-P9-NEXT: xscvdpsxws f5, f5
; CHECK-P9-NEXT: xscvdpsxws f6, f6
; CHECK-P9-NEXT: xscvdpsxws f7, f7
; CHECK-P9-NEXT: mfvsrwz r5, f1
; CHECK-P9-NEXT: mfvsrwz r9, f0
; CHECK-P9-NEXT: mfvsrwz r3, f2
; CHECK-P9-NEXT: mfvsrwz r4, f3
; CHECK-P9-NEXT: mfvsrwz r6, f4
; CHECK-P9-NEXT: mfvsrwz r7, f5
; CHECK-P9-NEXT: mfvsrwz r8, f6
; CHECK-P9-NEXT: mfvsrwz r10, f7
; CHECK-P9-NEXT: mtvsrd f2, r5
; CHECK-P9-NEXT: mtvsrd f6, r9
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtvsrd f1, r4
; CHECK-P9-NEXT: mtvsrd f3, r6
; CHECK-P9-NEXT: mtvsrd f4, r7
; CHECK-P9-NEXT: mtvsrd f5, r8
; CHECK-P9-NEXT: mtvsrd f7, r10
; CHECK-P9-NEXT: xxswapd v4, vs2
; CHECK-P9-NEXT: xxswapd v6, vs6
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xxswapd v3, vs1
; CHECK-P9-NEXT: xxswapd v5, vs3
; CHECK-P9-NEXT: xxswapd v0, vs4
; CHECK-P9-NEXT: xxswapd v1, vs5
; CHECK-P9-NEXT: xxswapd v7, vs7
; CHECK-P9-NEXT: vmrglb v2, v3, v2
; CHECK-P9-NEXT: vmrglb v3, v4, v5
; CHECK-P9-NEXT: vmrglb v4, v1, v0
; CHECK-P9-NEXT: vmrglb v5, v6, v7
; CHECK-P9-NEXT: vmrglh v2, v3, v2
; CHECK-P9-NEXT: vmrglh v3, v5, v4
; CHECK-P9-NEXT: vmrglw v2, v3, v2
; CHECK-P9-NEXT: mfvsrld r3, v2
; CHECK-P9-NEXT: blr
;
; CHECK-BE-LABEL: test8elt_signed:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: lxv vs1, 16(r3)
; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
; CHECK-BE-NEXT: xxswapd vs3, vs1
; CHECK-BE-NEXT: xxsldwi vs4, vs1, vs1, 1
; CHECK-BE-NEXT: xxsldwi vs5, vs0, vs0, 3
; CHECK-BE-NEXT: xxswapd vs6, vs0
; CHECK-BE-NEXT: xxsldwi vs7, vs0, vs0, 1
; CHECK-BE-NEXT: xscvspdpn f1, vs1
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvspdpn f2, vs2
; CHECK-BE-NEXT: xscvspdpn f3, vs3
; CHECK-BE-NEXT: xscvspdpn f4, vs4
; CHECK-BE-NEXT: xscvspdpn f5, vs5
; CHECK-BE-NEXT: xscvspdpn f6, vs6
; CHECK-BE-NEXT: xscvspdpn f7, vs7
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: xscvdpsxws f2, f2
; CHECK-BE-NEXT: xscvdpsxws f3, f3
; CHECK-BE-NEXT: xscvdpsxws f4, f4
; CHECK-BE-NEXT: xscvdpsxws f5, f5
; CHECK-BE-NEXT: xscvdpsxws f6, f6
; CHECK-BE-NEXT: xscvdpsxws f7, f7
; CHECK-BE-NEXT: mfvsrwz r5, f1
; CHECK-BE-NEXT: mfvsrwz r9, f0
; CHECK-BE-NEXT: sldi r5, r5, 56
; CHECK-BE-NEXT: sldi r9, r9, 56
; CHECK-BE-NEXT: mfvsrwz r3, f2
; CHECK-BE-NEXT: mfvsrwz r4, f3
; CHECK-BE-NEXT: mfvsrwz r6, f4
; CHECK-BE-NEXT: mfvsrwz r7, f5
; CHECK-BE-NEXT: mfvsrwz r8, f6
; CHECK-BE-NEXT: mfvsrwz r10, f7
; CHECK-BE-NEXT: mtvsrd v4, r5
; CHECK-BE-NEXT: mtvsrd v6, r9
; CHECK-BE-NEXT: sldi r3, r3, 56
; CHECK-BE-NEXT: sldi r4, r4, 56
; CHECK-BE-NEXT: sldi r6, r6, 56
; CHECK-BE-NEXT: sldi r7, r7, 56
; CHECK-BE-NEXT: sldi r8, r8, 56
; CHECK-BE-NEXT: sldi r10, r10, 56
; CHECK-BE-NEXT: mtvsrd v2, r3
; CHECK-BE-NEXT: mtvsrd v3, r4
; CHECK-BE-NEXT: mtvsrd v5, r6
; CHECK-BE-NEXT: mtvsrd v0, r7
; CHECK-BE-NEXT: mtvsrd v1, r8
; CHECK-BE-NEXT: mtvsrd v7, r10
; CHECK-BE-NEXT: vmrghb v2, v3, v2
; CHECK-BE-NEXT: vmrghb v3, v4, v5
; CHECK-BE-NEXT: vmrghb v4, v1, v0
; CHECK-BE-NEXT: vmrghb v5, v6, v7
; CHECK-BE-NEXT: vmrghh v2, v3, v2
; CHECK-BE-NEXT: vmrghh v3, v5, v4
; CHECK-BE-NEXT: vmrghw v2, v3, v2
; CHECK-BE-NEXT: mfvsrd r3, v2
; CHECK-BE-NEXT: blr
entry:
%a = load <8 x float>, <8 x float>* %0, align 32
%1 = fptosi <8 x float> %a to <8 x i8>
%2 = bitcast <8 x i8> %1 to i64
ret i64 %2
}
define <16 x i8> @test16elt_signed(<16 x float>* nocapture readonly) local_unnamed_addr #3 {
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: lvx v3, r3, r4
; CHECK-P8-NEXT: li r4, 32
; CHECK-P8-NEXT: xscvspdpn f2, v2
; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
; CHECK-P8-NEXT: xscvspdpn f4, v3
; CHECK-P8-NEXT: xxswapd vs1, v2
; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1
; CHECK-P8-NEXT: xxsldwi vs5, v3, v3, 3
; CHECK-P8-NEXT: lvx v2, r3, r4
; CHECK-P8-NEXT: xscvspdpn f0, vs0
; CHECK-P8-NEXT: xxswapd vs6, v3
; CHECK-P8-NEXT: xscvspdpn f1, vs1
; CHECK-P8-NEXT: xxsldwi vs7, v3, v3, 1
; CHECK-P8-NEXT: xscvspdpn f3, vs3
; CHECK-P8-NEXT: xxsldwi vs8, v2, v2, 3
; CHECK-P8-NEXT: xscvdpsxws f2, f2
; CHECK-P8-NEXT: xxswapd vs9, v2
; CHECK-P8-NEXT: xscvdpsxws f4, f4
; CHECK-P8-NEXT: xscvspdpn f5, vs5
; CHECK-P8-NEXT: xscvdpsxws f0, f0
; CHECK-P8-NEXT: xscvspdpn f6, vs6
; CHECK-P8-NEXT: xscvdpsxws f1, f1
; CHECK-P8-NEXT: mfvsrwz r4, f2
; CHECK-P8-NEXT: xscvspdpn f7, vs7
; CHECK-P8-NEXT: mtvsrd f2, r4
; CHECK-P8-NEXT: mfvsrwz r4, f4
; CHECK-P8-NEXT: xscvdpsxws f3, f3
; CHECK-P8-NEXT: xscvspdpn f8, vs8
; CHECK-P8-NEXT: mtvsrd f4, r4
; CHECK-P8-NEXT: mfvsrwz r4, f0
; CHECK-P8-NEXT: xscvdpsxws f0, f5
; CHECK-P8-NEXT: xxswapd v0, vs4
; CHECK-P8-NEXT: xscvspdpn f9, vs9
; CHECK-P8-NEXT: mtvsrd f5, r4
; CHECK-P8-NEXT: mfvsrwz r4, f1
; CHECK-P8-NEXT: xscvdpsxws f1, f6
; CHECK-P8-NEXT: xxswapd v3, vs5
; CHECK-P8-NEXT: mtvsrd f6, r4
; CHECK-P8-NEXT: mfvsrwz r4, f3
; CHECK-P8-NEXT: xscvdpsxws f3, f7
; CHECK-P8-NEXT: xxswapd v4, vs6
; CHECK-P8-NEXT: mtvsrd f7, r4
; CHECK-P8-NEXT: mfvsrwz r4, f0
; CHECK-P8-NEXT: xscvdpsxws f0, f8
; CHECK-P8-NEXT: xxswapd v5, vs7
; CHECK-P8-NEXT: mtvsrd f8, r4
; CHECK-P8-NEXT: mfvsrwz r4, f1
; CHECK-P8-NEXT: xscvdpsxws f1, f9
; CHECK-P8-NEXT: xxswapd v1, vs8
; CHECK-P8-NEXT: mtvsrd f9, r4
; CHECK-P8-NEXT: mfvsrwz r4, f3
; CHECK-P8-NEXT: vmrglb v3, v4, v3
; CHECK-P8-NEXT: xxswapd v4, vs2
; CHECK-P8-NEXT: mtvsrd f3, r4
; CHECK-P8-NEXT: xxswapd v6, vs9
; CHECK-P8-NEXT: mfvsrwz r4, f0
; CHECK-P8-NEXT: xscvspdpn f0, v2
; CHECK-P8-NEXT: xxswapd v7, vs3
; CHECK-P8-NEXT: mtvsrd f5, r4
; CHECK-P8-NEXT: mfvsrwz r4, f1
; CHECK-P8-NEXT: vmrglb v4, v4, v5
; CHECK-P8-NEXT: xxswapd v5, vs5
; CHECK-P8-NEXT: mtvsrd f1, r4
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: lvx v9, r3, r4
; CHECK-P8-NEXT: vmrglb v1, v6, v1
; CHECK-P8-NEXT: xxswapd v8, vs1
; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 1
; CHECK-P8-NEXT: xxsldwi vs2, v9, v9, 3
; CHECK-P8-NEXT: xscvspdpn f4, v9
; CHECK-P8-NEXT: xxswapd vs3, v9
; CHECK-P8-NEXT: xxsldwi vs5, v9, v9, 1
; CHECK-P8-NEXT: xscvspdpn f1, vs1
; CHECK-P8-NEXT: xscvspdpn f2, vs2
; CHECK-P8-NEXT: xscvspdpn f3, vs3
; CHECK-P8-NEXT: xscvspdpn f5, vs5
; CHECK-P8-NEXT: xscvdpsxws f0, f0
; CHECK-P8-NEXT: xscvdpsxws f4, f4
; CHECK-P8-NEXT: xscvdpsxws f1, f1
; CHECK-P8-NEXT: xscvdpsxws f2, f2
; CHECK-P8-NEXT: xscvdpsxws f3, f3
; CHECK-P8-NEXT: xscvdpsxws f5, f5
; CHECK-P8-NEXT: mfvsrwz r3, f0
; CHECK-P8-NEXT: mfvsrwz r4, f4
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtvsrd f4, r4
; CHECK-P8-NEXT: mfvsrwz r3, f1
; CHECK-P8-NEXT: mfvsrwz r4, f2
; CHECK-P8-NEXT: xxswapd v9, vs4
; CHECK-P8-NEXT: mtvsrd f1, r3
; CHECK-P8-NEXT: mfvsrwz r3, f3
; CHECK-P8-NEXT: mtvsrd f2, r4
; CHECK-P8-NEXT: xxswapd v6, vs1
; CHECK-P8-NEXT: mfvsrwz r4, f5
; CHECK-P8-NEXT: vmrglb v2, v0, v7
; CHECK-P8-NEXT: xxswapd v0, vs0
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: xxswapd v7, vs2
; CHECK-P8-NEXT: mtvsrd f3, r4
; CHECK-P8-NEXT: vmrglb v5, v8, v5
; CHECK-P8-NEXT: xxswapd v8, vs0
; CHECK-P8-NEXT: xxswapd v10, vs3
; CHECK-P8-NEXT: vmrglb v0, v0, v6
; CHECK-P8-NEXT: vmrglh v3, v4, v3
; CHECK-P8-NEXT: vmrglb v6, v8, v7
; CHECK-P8-NEXT: vmrglb v7, v9, v10
; CHECK-P8-NEXT: vmrglh v2, v2, v1
; CHECK-P8-NEXT: vmrglh v4, v0, v5
; CHECK-P8-NEXT: vmrglh v5, v7, v6
; CHECK-P8-NEXT: vmrglw v2, v2, v3
; CHECK-P8-NEXT: vmrglw v3, v5, v4
; CHECK-P8-NEXT: xxmrgld v2, v3, v2
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt_signed:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lxv vs2, 16(r3)
; CHECK-P9-NEXT: lxv vs3, 0(r3)
; CHECK-P9-NEXT: lxv vs0, 48(r3)
; CHECK-P9-NEXT: lxv vs1, 32(r3)
; CHECK-P9-NEXT: std r26, -48(r1) # 8-byte Folded Spill
; CHECK-P9-NEXT: std r27, -40(r1) # 8-byte Folded Spill
; CHECK-P9-NEXT: std r28, -32(r1) # 8-byte Folded Spill
; CHECK-P9-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P9-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P9-NEXT: xxsldwi vs4, vs3, vs3, 3
; CHECK-P9-NEXT: xxswapd vs5, vs3
; CHECK-P9-NEXT: xxsldwi vs6, vs3, vs3, 1
; CHECK-P9-NEXT: xxsldwi vs7, vs2, vs2, 3
; CHECK-P9-NEXT: xxswapd vs8, vs2
; CHECK-P9-NEXT: xxsldwi vs9, vs2, vs2, 1
; CHECK-P9-NEXT: xxsldwi vs10, vs1, vs1, 3
; CHECK-P9-NEXT: xxswapd vs11, vs1
; CHECK-P9-NEXT: xxsldwi vs12, vs1, vs1, 1
; CHECK-P9-NEXT: xxsldwi vs13, vs0, vs0, 3
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xxsldwi v3, vs0, vs0, 1
; CHECK-P9-NEXT: xscvspdpn f3, vs3
; CHECK-P9-NEXT: xscvspdpn f2, vs2
; CHECK-P9-NEXT: xscvspdpn f1, vs1
; CHECK-P9-NEXT: xscvspdpn f0, vs0
; CHECK-P9-NEXT: xscvspdpn f4, vs4
; CHECK-P9-NEXT: xscvspdpn f5, vs5
; CHECK-P9-NEXT: xscvspdpn f6, vs6
; CHECK-P9-NEXT: xscvspdpn f7, vs7
; CHECK-P9-NEXT: xscvspdpn f8, vs8
; CHECK-P9-NEXT: xscvspdpn f9, vs9
; CHECK-P9-NEXT: xscvspdpn f10, vs10
; CHECK-P9-NEXT: xscvspdpn f11, vs11
; CHECK-P9-NEXT: xscvspdpn f12, vs12
; CHECK-P9-NEXT: xscvspdpn f13, vs13
; CHECK-P9-NEXT: xscvspdpn v2, v2
; CHECK-P9-NEXT: xscvspdpn v3, v3
; CHECK-P9-NEXT: xscvdpsxws f3, f3
; CHECK-P9-NEXT: xscvdpsxws f2, f2
; CHECK-P9-NEXT: xscvdpsxws f1, f1
; CHECK-P9-NEXT: xscvdpsxws f0, f0
; CHECK-P9-NEXT: xscvdpsxws f4, f4
; CHECK-P9-NEXT: xscvdpsxws f5, f5
; CHECK-P9-NEXT: xscvdpsxws f6, f6
; CHECK-P9-NEXT: xscvdpsxws f7, f7
; CHECK-P9-NEXT: xscvdpsxws f8, f8
; CHECK-P9-NEXT: xscvdpsxws f9, f9
; CHECK-P9-NEXT: xscvdpsxws f10, f10
; CHECK-P9-NEXT: xscvdpsxws f11, f11
; CHECK-P9-NEXT: xscvdpsxws f12, f12
; CHECK-P9-NEXT: xscvdpsxws f13, f13
; CHECK-P9-NEXT: xscvdpsxws v2, v2
; CHECK-P9-NEXT: xscvdpsxws v3, v3
; CHECK-P9-NEXT: mfvsrwz r3, f3
; CHECK-P9-NEXT: mfvsrwz r4, f2
; CHECK-P9-NEXT: mfvsrwz r11, f1
; CHECK-P9-NEXT: mfvsrwz r12, f0
; CHECK-P9-NEXT: mfvsrwz r5, f4
; CHECK-P9-NEXT: mfvsrwz r6, f5
; CHECK-P9-NEXT: mfvsrwz r7, f6
; CHECK-P9-NEXT: mfvsrwz r8, f7
; CHECK-P9-NEXT: mfvsrwz r9, f8
; CHECK-P9-NEXT: mfvsrwz r10, f9
; CHECK-P9-NEXT: mfvsrwz r0, f10
; CHECK-P9-NEXT: mfvsrwz r30, f11
; CHECK-P9-NEXT: mfvsrwz r29, f12
; CHECK-P9-NEXT: mfvsrwz r28, f13
; CHECK-P9-NEXT: mfvsrwz r27, v2
; CHECK-P9-NEXT: mfvsrwz r26, v3
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtvsrd f1, r4
; CHECK-P9-NEXT: mtvsrd f8, r11
; CHECK-P9-NEXT: mtvsrd f9, r12
; CHECK-P9-NEXT: mtvsrd f2, r5
; CHECK-P9-NEXT: mtvsrd f3, r6
; CHECK-P9-NEXT: mtvsrd f4, r7
; CHECK-P9-NEXT: mtvsrd f5, r8
; CHECK-P9-NEXT: mtvsrd f6, r9
; CHECK-P9-NEXT: mtvsrd f7, r10
; CHECK-P9-NEXT: mtvsrd f10, r0
; CHECK-P9-NEXT: mtvsrd f11, r30
; CHECK-P9-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P9-NEXT: mtvsrd f12, r29
; CHECK-P9-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
; CHECK-P9-NEXT: mtvsrd f13, r28
; CHECK-P9-NEXT: ld r28, -32(r1) # 8-byte Folded Reload
; CHECK-P9-NEXT: mtvsrd v2, r27
; CHECK-P9-NEXT: ld r27, -40(r1) # 8-byte Folded Reload
; CHECK-P9-NEXT: mtvsrd v3, r26
; CHECK-P9-NEXT: ld r26, -48(r1) # 8-byte Folded Reload
; CHECK-P9-NEXT: xxswapd v4, vs0
; CHECK-P9-NEXT: xxswapd v5, vs2
; CHECK-P9-NEXT: xxswapd v0, vs3
; CHECK-P9-NEXT: xxswapd v1, vs4
; CHECK-P9-NEXT: xxswapd v6, vs5
; CHECK-P9-NEXT: xxswapd v7, vs6
; CHECK-P9-NEXT: xxswapd v8, vs1
; CHECK-P9-NEXT: xxswapd v9, vs7
; CHECK-P9-NEXT: xxswapd v10, vs10
; CHECK-P9-NEXT: xxswapd v11, vs11
; CHECK-P9-NEXT: xxswapd v12, vs8
; CHECK-P9-NEXT: xxswapd v13, vs12
; CHECK-P9-NEXT: xxswapd v14, vs13
; CHECK-P9-NEXT: xxswapd v2, v2
; CHECK-P9-NEXT: xxswapd v15, vs9
; CHECK-P9-NEXT: xxswapd v3, v3
; CHECK-P9-NEXT: vmrglb v5, v0, v5
; CHECK-P9-NEXT: vmrglb v4, v4, v1
; CHECK-P9-NEXT: vmrglb v0, v7, v6
; CHECK-P9-NEXT: vmrglb v1, v8, v9
; CHECK-P9-NEXT: vmrglb v6, v11, v10
; CHECK-P9-NEXT: vmrglb v7, v12, v13
; CHECK-P9-NEXT: vmrglb v2, v2, v14
; CHECK-P9-NEXT: vmrglb v3, v15, v3
; CHECK-P9-NEXT: vmrglh v4, v4, v5
; CHECK-P9-NEXT: vmrglh v5, v1, v0
; CHECK-P9-NEXT: vmrglh v0, v7, v6
; CHECK-P9-NEXT: vmrglh v2, v3, v2
; CHECK-P9-NEXT: vmrglw v3, v5, v4
; CHECK-P9-NEXT: vmrglw v2, v2, v0
; CHECK-P9-NEXT: xxmrgld v2, v2, v3
; CHECK-P9-NEXT: blr
;
; CHECK-BE-LABEL: test16elt_signed:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxv vs2, 32(r3)
; CHECK-BE-NEXT: lxv vs3, 48(r3)
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: lxv vs1, 16(r3)
; CHECK-BE-NEXT: std r26, -48(r1) # 8-byte Folded Spill
; CHECK-BE-NEXT: std r27, -40(r1) # 8-byte Folded Spill
; CHECK-BE-NEXT: std r28, -32(r1) # 8-byte Folded Spill
; CHECK-BE-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-BE-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-BE-NEXT: xxsldwi vs4, vs3, vs3, 3
; CHECK-BE-NEXT: xxswapd vs5, vs3
; CHECK-BE-NEXT: xxsldwi vs6, vs3, vs3, 1
; CHECK-BE-NEXT: xxsldwi vs7, vs2, vs2, 3
; CHECK-BE-NEXT: xxswapd vs8, vs2
; CHECK-BE-NEXT: xxsldwi vs9, vs2, vs2, 1
; CHECK-BE-NEXT: xxsldwi vs10, vs1, vs1, 3
; CHECK-BE-NEXT: xxswapd vs11, vs1
; CHECK-BE-NEXT: xxsldwi vs12, vs1, vs1, 1
; CHECK-BE-NEXT: xxsldwi vs13, vs0, vs0, 3
; CHECK-BE-NEXT: xxswapd v2, vs0
; CHECK-BE-NEXT: xxsldwi v3, vs0, vs0, 1
; CHECK-BE-NEXT: xscvspdpn f3, vs3
; CHECK-BE-NEXT: xscvspdpn f2, vs2
; CHECK-BE-NEXT: xscvspdpn f1, vs1
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvspdpn f4, vs4
; CHECK-BE-NEXT: xscvspdpn f5, vs5
; CHECK-BE-NEXT: xscvspdpn f6, vs6
; CHECK-BE-NEXT: xscvspdpn f7, vs7
; CHECK-BE-NEXT: xscvspdpn f8, vs8
; CHECK-BE-NEXT: xscvspdpn f9, vs9
; CHECK-BE-NEXT: xscvspdpn f10, vs10
; CHECK-BE-NEXT: xscvspdpn f11, vs11
; CHECK-BE-NEXT: xscvspdpn f12, vs12
; CHECK-BE-NEXT: xscvspdpn f13, vs13
; CHECK-BE-NEXT: xscvspdpn v2, v2
; CHECK-BE-NEXT: xscvspdpn v3, v3
; CHECK-BE-NEXT: xscvdpsxws f3, f3
; CHECK-BE-NEXT: xscvdpsxws f2, f2
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: xscvdpsxws f4, f4
; CHECK-BE-NEXT: xscvdpsxws f5, f5
; CHECK-BE-NEXT: xscvdpsxws f6, f6
; CHECK-BE-NEXT: xscvdpsxws f7, f7
; CHECK-BE-NEXT: xscvdpsxws f8, f8
; CHECK-BE-NEXT: xscvdpsxws f9, f9
; CHECK-BE-NEXT: xscvdpsxws f10, f10
; CHECK-BE-NEXT: xscvdpsxws f11, f11
; CHECK-BE-NEXT: xscvdpsxws f12, f12
; CHECK-BE-NEXT: xscvdpsxws f13, f13
; CHECK-BE-NEXT: xscvdpsxws v2, v2
; CHECK-BE-NEXT: xscvdpsxws v3, v3
; CHECK-BE-NEXT: mfvsrwz r3, f3
; CHECK-BE-NEXT: mfvsrwz r4, f2
; CHECK-BE-NEXT: mfvsrwz r11, f1
; CHECK-BE-NEXT: mfvsrwz r12, f0
; CHECK-BE-NEXT: mfvsrwz r5, f4
; CHECK-BE-NEXT: mfvsrwz r6, f5
; CHECK-BE-NEXT: mfvsrwz r7, f6
; CHECK-BE-NEXT: mfvsrwz r8, f7
; CHECK-BE-NEXT: mfvsrwz r9, f8
; CHECK-BE-NEXT: mfvsrwz r10, f9
; CHECK-BE-NEXT: mfvsrwz r0, f10
; CHECK-BE-NEXT: mfvsrwz r30, f11
; CHECK-BE-NEXT: mfvsrwz r29, f12
; CHECK-BE-NEXT: mfvsrwz r28, f13
; CHECK-BE-NEXT: mfvsrwz r27, v2
; CHECK-BE-NEXT: mfvsrwz r26, v3
; CHECK-BE-NEXT: sldi r3, r3, 56
; CHECK-BE-NEXT: sldi r4, r4, 56
; CHECK-BE-NEXT: sldi r11, r11, 56
; CHECK-BE-NEXT: sldi r12, r12, 56
; CHECK-BE-NEXT: sldi r5, r5, 56
; CHECK-BE-NEXT: sldi r6, r6, 56
; CHECK-BE-NEXT: sldi r7, r7, 56
; CHECK-BE-NEXT: sldi r8, r8, 56
; CHECK-BE-NEXT: sldi r9, r9, 56
; CHECK-BE-NEXT: sldi r10, r10, 56
; CHECK-BE-NEXT: sldi r0, r0, 56
; CHECK-BE-NEXT: sldi r30, r30, 56
; CHECK-BE-NEXT: sldi r29, r29, 56
; CHECK-BE-NEXT: sldi r28, r28, 56
; CHECK-BE-NEXT: sldi r27, r27, 56
; CHECK-BE-NEXT: sldi r26, r26, 56
; CHECK-BE-NEXT: mtvsrd v2, r3
; CHECK-BE-NEXT: mtvsrd v3, r4
; CHECK-BE-NEXT: mtvsrd v10, r11
; CHECK-BE-NEXT: mtvsrd v14, r12
; CHECK-BE-NEXT: mtvsrd v4, r5
; CHECK-BE-NEXT: mtvsrd v5, r6
; CHECK-BE-NEXT: mtvsrd v0, r7
; CHECK-BE-NEXT: mtvsrd v1, r8
; CHECK-BE-NEXT: mtvsrd v6, r9
; CHECK-BE-NEXT: mtvsrd v7, r10
; CHECK-BE-NEXT: mtvsrd v8, r0
; CHECK-BE-NEXT: mtvsrd v9, r30
; CHECK-BE-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-BE-NEXT: mtvsrd v11, r29
; CHECK-BE-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
; CHECK-BE-NEXT: mtvsrd v12, r28
; CHECK-BE-NEXT: ld r28, -32(r1) # 8-byte Folded Reload
; CHECK-BE-NEXT: mtvsrd v13, r27
; CHECK-BE-NEXT: ld r27, -40(r1) # 8-byte Folded Reload
; CHECK-BE-NEXT: mtvsrd v15, r26
; CHECK-BE-NEXT: ld r26, -48(r1) # 8-byte Folded Reload
; CHECK-BE-NEXT: vmrghb v4, v5, v4
; CHECK-BE-NEXT: vmrghb v2, v2, v0
; CHECK-BE-NEXT: vmrghb v5, v6, v1
; CHECK-BE-NEXT: vmrghb v3, v3, v7
; CHECK-BE-NEXT: vmrghb v0, v9, v8
; CHECK-BE-NEXT: vmrghb v1, v10, v11
; CHECK-BE-NEXT: vmrghb v6, v13, v12
; CHECK-BE-NEXT: vmrghb v7, v14, v15
; CHECK-BE-NEXT: vmrghh v2, v2, v4
; CHECK-BE-NEXT: vmrghh v3, v3, v5
; CHECK-BE-NEXT: vmrghh v4, v1, v0
; CHECK-BE-NEXT: vmrghh v5, v7, v6
; CHECK-BE-NEXT: vmrghw v2, v3, v2
; CHECK-BE-NEXT: vmrghw v3, v5, v4
; CHECK-BE-NEXT: xxmrghd v2, v3, v2
; CHECK-BE-NEXT: blr
entry:
%a = load <16 x float>, <16 x float>* %0, align 64
%1 = fptosi <16 x float> %a to <16 x i8>
ret <16 x i8> %1
}