AMDGPU: Fix printed format of SReg_96
These are artificial, so I think this should only come up with inline
asm comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358446 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp b/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
index c1358f7..23bea35 100644
--- a/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
+++ b/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
@@ -357,6 +357,9 @@
} else if (MRI.getRegClass(AMDGPU::VReg_96RegClassID).contains(RegNo)) {
O << 'v';
NumRegs = 3;
+ } else if (MRI.getRegClass(AMDGPU::SReg_96RegClassID).contains(RegNo)) {
+ O << 's';
+ NumRegs = 3;
} else if (MRI.getRegClass(AMDGPU::VReg_160RegClassID).contains(RegNo)) {
O << 'v';
NumRegs = 5;
diff --git a/test/CodeGen/AMDGPU/inline-asm.ll b/test/CodeGen/AMDGPU/inline-asm.ll
index 9615efa..6a97626 100644
--- a/test/CodeGen/AMDGPU/inline-asm.ll
+++ b/test/CodeGen/AMDGPU/inline-asm.ll
@@ -267,3 +267,13 @@
tail call void asm sideeffect "s_trap ${0:n}", "n"(i32 10) #1
ret void
}
+
+; Make sure tuples of 3 SGPRs are printed with the [] syntax instead
+; of the tablegen default.
+; CHECK-LABEL: {{^}}sgpr96_name_format:
+; CHECK: ; sgpr96 s[0:2]
+define amdgpu_kernel void @sgpr96_name_format() {
+entry:
+ tail call void asm sideeffect "; sgpr96 $0", "s"(<3 x i32> <i32 10, i32 11, i32 12>) #1
+ ret void
+}
