| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=SI %s |
| # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=VI %s |
| # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX9 %s |
| |
| --- |
| name: test_smin_s32 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; SI-LABEL: name: test_smin_s32 |
| ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[COPY]], [[COPY1]] |
| ; SI: $vgpr0 = COPY [[SMIN]](s32) |
| ; VI-LABEL: name: test_smin_s32 |
| ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; VI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[COPY]], [[COPY1]] |
| ; VI: $vgpr0 = COPY [[SMIN]](s32) |
| ; GFX9-LABEL: name: test_smin_s32 |
| ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; GFX9: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[COPY]], [[COPY1]] |
| ; GFX9: $vgpr0 = COPY [[SMIN]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = G_SMIN %0, %1 |
| $vgpr0 = COPY %2 |
| ... |
| |
| --- |
| name: test_smin_s16 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; SI-LABEL: name: test_smin_s16 |
| ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[C]](s32) |
| ; SI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32) |
| ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY3]], [[C]](s32) |
| ; SI: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32) |
| ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[ASHR]], [[ASHR1]] |
| ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[SMIN]](s32) |
| ; SI: $vgpr0 = COPY [[COPY4]](s32) |
| ; VI-LABEL: name: test_smin_s16 |
| ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) |
| ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) |
| ; VI: [[SMIN:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC]], [[TRUNC1]] |
| ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SMIN]](s16) |
| ; VI: $vgpr0 = COPY [[ANYEXT]](s32) |
| ; GFX9-LABEL: name: test_smin_s16 |
| ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) |
| ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) |
| ; GFX9: [[SMIN:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC]], [[TRUNC1]] |
| ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SMIN]](s16) |
| ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s16) = G_TRUNC %0 |
| %3:_(s16) = G_TRUNC %1 |
| %4:_(s16) = G_SMIN %2, %3 |
| %5:_(s32) = G_ANYEXT %4 |
| $vgpr0 = COPY %5 |
| ... |
| |
| --- |
| name: test_smin_s8 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; SI-LABEL: name: test_smin_s8 |
| ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 |
| ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[C]](s32) |
| ; SI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32) |
| ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY3]], [[C]](s32) |
| ; SI: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32) |
| ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[ASHR]], [[ASHR1]] |
| ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[SMIN]](s32) |
| ; SI: $vgpr0 = COPY [[COPY4]](s32) |
| ; VI-LABEL: name: test_smin_s8 |
| ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) |
| ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 |
| ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32) |
| ; VI: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[TRUNC1]], [[TRUNC]](s16) |
| ; VI: [[ASHR:%[0-9]+]]:_(s16) = G_ASHR [[SHL]], [[TRUNC]](s16) |
| ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) |
| ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 |
| ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C2]](s32) |
| ; VI: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[TRUNC2]], [[TRUNC]](s16) |
| ; VI: [[ASHR1:%[0-9]+]]:_(s16) = G_ASHR [[SHL1]], [[TRUNC]](s16) |
| ; VI: [[SMIN:%[0-9]+]]:_(s16) = G_SMIN [[ASHR]], [[ASHR1]] |
| ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SMIN]](s16) |
| ; VI: $vgpr0 = COPY [[ANYEXT]](s32) |
| ; GFX9-LABEL: name: test_smin_s8 |
| ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) |
| ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 |
| ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32) |
| ; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[TRUNC1]], [[TRUNC]](s16) |
| ; GFX9: [[ASHR:%[0-9]+]]:_(s16) = G_ASHR [[SHL]], [[TRUNC]](s16) |
| ; GFX9: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) |
| ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 |
| ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32) |
| ; GFX9: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[TRUNC2]], [[TRUNC]](s16) |
| ; GFX9: [[ASHR1:%[0-9]+]]:_(s16) = G_ASHR [[SHL1]], [[TRUNC]](s16) |
| ; GFX9: [[SMIN:%[0-9]+]]:_(s16) = G_SMIN [[ASHR]], [[ASHR1]] |
| ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SMIN]](s16) |
| ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s8) = G_TRUNC %0 |
| %3:_(s8) = G_TRUNC %1 |
| %4:_(s8) = G_SMIN %2, %3 |
| %5:_(s32) = G_ANYEXT %4 |
| $vgpr0 = COPY %5 |
| ... |
| |
| --- |
| name: test_smin_s17 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; SI-LABEL: name: test_smin_s17 |
| ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 15 |
| ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[C]](s32) |
| ; SI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32) |
| ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY3]], [[C]](s32) |
| ; SI: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32) |
| ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[ASHR]], [[ASHR1]] |
| ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[SMIN]](s32) |
| ; SI: $vgpr0 = COPY [[COPY4]](s32) |
| ; VI-LABEL: name: test_smin_s17 |
| ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 15 |
| ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[C]](s32) |
| ; VI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32) |
| ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY3]], [[C]](s32) |
| ; VI: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32) |
| ; VI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[ASHR]], [[ASHR1]] |
| ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[SMIN]](s32) |
| ; VI: $vgpr0 = COPY [[COPY4]](s32) |
| ; GFX9-LABEL: name: test_smin_s17 |
| ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 15 |
| ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[C]](s32) |
| ; GFX9: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32) |
| ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY3]], [[C]](s32) |
| ; GFX9: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32) |
| ; GFX9: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[ASHR]], [[ASHR1]] |
| ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[SMIN]](s32) |
| ; GFX9: $vgpr0 = COPY [[COPY4]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s17) = G_TRUNC %0 |
| %3:_(s17) = G_TRUNC %1 |
| %4:_(s17) = G_SMIN %2, %3 |
| %5:_(s32) = G_ANYEXT %4 |
| $vgpr0 = COPY %5 |
| ... |
| |
| --- |
| name: test_smin_v2s32 |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; SI-LABEL: name: test_smin_v2s32 |
| ; SI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 |
| ; SI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 |
| ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) |
| ; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) |
| ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[UV]], [[UV2]] |
| ; SI: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[UV1]], [[UV3]] |
| ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[SMIN]](s32), [[SMIN1]](s32) |
| ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) |
| ; VI-LABEL: name: test_smin_v2s32 |
| ; VI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 |
| ; VI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 |
| ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) |
| ; VI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) |
| ; VI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[UV]], [[UV2]] |
| ; VI: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[UV1]], [[UV3]] |
| ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[SMIN]](s32), [[SMIN1]](s32) |
| ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) |
| ; GFX9-LABEL: name: test_smin_v2s32 |
| ; GFX9: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 |
| ; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) |
| ; GFX9: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) |
| ; GFX9: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[UV]], [[UV2]] |
| ; GFX9: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[UV1]], [[UV3]] |
| ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[SMIN]](s32), [[SMIN1]](s32) |
| ; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) |
| %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 |
| %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 |
| %2:_(<2 x s32>) = G_SMIN %0, %1 |
| $vgpr0_vgpr1 = COPY %2 |
| ... |
| |
| --- |
| name: test_smin_v3s32 |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5 |
| |
| ; SI-LABEL: name: test_smin_v3s32 |
| ; SI: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 |
| ; SI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 |
| ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) |
| ; SI: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) |
| ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[UV]], [[UV3]] |
| ; SI: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[UV1]], [[UV4]] |
| ; SI: [[SMIN2:%[0-9]+]]:_(s32) = G_SMIN [[UV2]], [[UV5]] |
| ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[SMIN]](s32), [[SMIN1]](s32), [[SMIN2]](s32) |
| ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) |
| ; VI-LABEL: name: test_smin_v3s32 |
| ; VI: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 |
| ; VI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 |
| ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) |
| ; VI: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) |
| ; VI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[UV]], [[UV3]] |
| ; VI: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[UV1]], [[UV4]] |
| ; VI: [[SMIN2:%[0-9]+]]:_(s32) = G_SMIN [[UV2]], [[UV5]] |
| ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[SMIN]](s32), [[SMIN1]](s32), [[SMIN2]](s32) |
| ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) |
| ; GFX9-LABEL: name: test_smin_v3s32 |
| ; GFX9: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 |
| ; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) |
| ; GFX9: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) |
| ; GFX9: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[UV]], [[UV3]] |
| ; GFX9: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[UV1]], [[UV4]] |
| ; GFX9: [[SMIN2:%[0-9]+]]:_(s32) = G_SMIN [[UV2]], [[UV5]] |
| ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[SMIN]](s32), [[SMIN1]](s32), [[SMIN2]](s32) |
| ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) |
| %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 |
| %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 |
| %2:_(<3 x s32>) = G_SMIN %0, %1 |
| $vgpr0_vgpr1_vgpr2 = COPY %2 |
| ... |
| |
| --- |
| name: test_smin_v2s16 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; SI-LABEL: name: test_smin_v2s16 |
| ; SI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 |
| ; SI: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 |
| ; SI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) |
| ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) |
| ; SI: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>) |
| ; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) |
| ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32) |
| ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[C]](s32) |
| ; SI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32) |
| ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[BITCAST1]](s32) |
| ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY3]], [[C]](s32) |
| ; SI: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32) |
| ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[ASHR]], [[ASHR1]] |
| ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[SMIN]](s32) |
| ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) |
| ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY4]], [[C]](s32) |
| ; SI: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[SHL2]], [[C]](s32) |
| ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) |
| ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[COPY5]], [[C]](s32) |
| ; SI: [[ASHR3:%[0-9]+]]:_(s32) = G_ASHR [[SHL3]], [[C]](s32) |
| ; SI: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[ASHR2]], [[ASHR3]] |
| ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SMIN1]](s32) |
| ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16) |
| ; SI: $vgpr0 = COPY [[BUILD_VECTOR]](<2 x s16>) |
| ; VI-LABEL: name: test_smin_v2s16 |
| ; VI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 |
| ; VI: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 |
| ; VI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) |
| ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32) |
| ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) |
| ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) |
| ; VI: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>) |
| ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST1]](s32) |
| ; VI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) |
| ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR1]](s32) |
| ; VI: [[SMIN:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC]], [[TRUNC2]] |
| ; VI: [[SMIN1:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC1]], [[TRUNC3]] |
| ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[SMIN]](s16), [[SMIN1]](s16) |
| ; VI: $vgpr0 = COPY [[BUILD_VECTOR]](<2 x s16>) |
| ; GFX9-LABEL: name: test_smin_v2s16 |
| ; GFX9: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 |
| ; GFX9: [[SMIN:%[0-9]+]]:_(<2 x s16>) = G_SMIN [[COPY]], [[COPY1]] |
| ; GFX9: $vgpr0 = COPY [[SMIN]](<2 x s16>) |
| %0:_(<2 x s16>) = COPY $vgpr0 |
| %1:_(<2 x s16>) = COPY $vgpr1 |
| %2:_(<2 x s16>) = G_SMIN %0, %1 |
| $vgpr0 = COPY %2 |
| ... |
| |
| --- |
| name: test_smin_v3s16 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; SI-LABEL: name: test_smin_v3s16 |
| ; SI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; SI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 |
| ; SI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; SI: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF1]](<4 x s16>), 0 |
| ; SI: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[EXTRACT]](<3 x s16>) |
| ; SI: [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[EXTRACT1]](<3 x s16>) |
| ; SI: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[UV]](s16) |
| ; SI: [[SEXT1:%[0-9]+]]:_(s32) = G_SEXT [[UV3]](s16) |
| ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[SEXT]], [[SEXT1]] |
| ; SI: [[SEXT2:%[0-9]+]]:_(s32) = G_SEXT [[UV1]](s16) |
| ; SI: [[SEXT3:%[0-9]+]]:_(s32) = G_SEXT [[UV4]](s16) |
| ; SI: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[SEXT2]], [[SEXT3]] |
| ; SI: [[SEXT4:%[0-9]+]]:_(s32) = G_SEXT [[UV2]](s16) |
| ; SI: [[SEXT5:%[0-9]+]]:_(s32) = G_SEXT [[UV5]](s16) |
| ; SI: [[SMIN2:%[0-9]+]]:_(s32) = G_SMIN [[SEXT4]], [[SEXT5]] |
| ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY [[SMIN]](s32) |
| ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[SMIN1]](s32) |
| ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SMIN2]](s32) |
| ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32) |
| ; SI: [[TRUNC:%[0-9]+]]:_(<3 x s16>) = G_TRUNC [[BUILD_VECTOR]](<3 x s32>) |
| ; SI: S_NOP 0, implicit [[TRUNC]](<3 x s16>) |
| ; VI-LABEL: name: test_smin_v3s16 |
| ; VI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; VI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 |
| ; VI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; VI: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF1]](<4 x s16>), 0 |
| ; VI: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[EXTRACT]](<3 x s16>) |
| ; VI: [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[EXTRACT1]](<3 x s16>) |
| ; VI: [[SMIN:%[0-9]+]]:_(s16) = G_SMIN [[UV]], [[UV3]] |
| ; VI: [[SMIN1:%[0-9]+]]:_(s16) = G_SMIN [[UV1]], [[UV4]] |
| ; VI: [[SMIN2:%[0-9]+]]:_(s16) = G_SMIN [[UV2]], [[UV5]] |
| ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SMIN]](s16) |
| ; VI: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[SMIN1]](s16) |
| ; VI: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[SMIN2]](s16) |
| ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32) |
| ; VI: [[TRUNC:%[0-9]+]]:_(<3 x s16>) = G_TRUNC [[BUILD_VECTOR]](<3 x s32>) |
| ; VI: S_NOP 0, implicit [[TRUNC]](<3 x s16>) |
| ; GFX9-LABEL: name: test_smin_v3s16 |
| ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; GFX9: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 |
| ; GFX9: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; GFX9: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF1]](<4 x s16>), 0 |
| ; GFX9: [[DEF2:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF2]], [[EXTRACT]](<3 x s16>), 0 |
| ; GFX9: [[DEF3:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; GFX9: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF3]], [[EXTRACT1]](<3 x s16>), 0 |
| ; GFX9: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT]](<4 x s16>) |
| ; GFX9: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT1]](<4 x s16>) |
| ; GFX9: [[SMIN:%[0-9]+]]:_(<2 x s16>) = G_SMIN [[UV]], [[UV2]] |
| ; GFX9: [[SMIN1:%[0-9]+]]:_(<2 x s16>) = G_SMIN [[UV1]], [[UV3]] |
| ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[SMIN]](<2 x s16>), [[SMIN1]](<2 x s16>) |
| ; GFX9: [[EXTRACT2:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[CONCAT_VECTORS]](<4 x s16>), 0 |
| ; GFX9: S_NOP 0, implicit [[EXTRACT2]](<3 x s16>) |
| %0:_(<3 x s16>) = G_IMPLICIT_DEF |
| %1:_(<3 x s16>) = G_IMPLICIT_DEF |
| %2:_(<3 x s16>) = G_SMIN %0, %1 |
| S_NOP 0, implicit %2 |
| ... |
| |
| --- |
| name: test_smin_v4s16 |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; SI-LABEL: name: test_smin_v4s16 |
| ; SI: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| ; SI: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 |
| ; SI: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) |
| ; SI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) |
| ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) |
| ; SI: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) |
| ; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) |
| ; SI: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>) |
| ; SI: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>) |
| ; SI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) |
| ; SI: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) |
| ; SI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C]](s32) |
| ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32) |
| ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[C]](s32) |
| ; SI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32) |
| ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[BITCAST2]](s32) |
| ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY3]], [[C]](s32) |
| ; SI: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32) |
| ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[ASHR]], [[ASHR1]] |
| ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[SMIN]](s32) |
| ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) |
| ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY4]], [[C]](s32) |
| ; SI: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[SHL2]], [[C]](s32) |
| ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) |
| ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[COPY5]], [[C]](s32) |
| ; SI: [[ASHR3:%[0-9]+]]:_(s32) = G_ASHR [[SHL3]], [[C]](s32) |
| ; SI: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[ASHR2]], [[ASHR3]] |
| ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SMIN1]](s32) |
| ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[BITCAST1]](s32) |
| ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[COPY6]], [[C]](s32) |
| ; SI: [[ASHR4:%[0-9]+]]:_(s32) = G_ASHR [[SHL4]], [[C]](s32) |
| ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[BITCAST3]](s32) |
| ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[COPY7]], [[C]](s32) |
| ; SI: [[ASHR5:%[0-9]+]]:_(s32) = G_ASHR [[SHL5]], [[C]](s32) |
| ; SI: [[SMIN2:%[0-9]+]]:_(s32) = G_SMIN [[ASHR4]], [[ASHR5]] |
| ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[SMIN2]](s32) |
| ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) |
| ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[COPY8]], [[C]](s32) |
| ; SI: [[ASHR6:%[0-9]+]]:_(s32) = G_ASHR [[SHL6]], [[C]](s32) |
| ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32) |
| ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[COPY9]], [[C]](s32) |
| ; SI: [[ASHR7:%[0-9]+]]:_(s32) = G_ASHR [[SHL7]], [[C]](s32) |
| ; SI: [[SMIN3:%[0-9]+]]:_(s32) = G_SMIN [[ASHR6]], [[ASHR7]] |
| ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SMIN3]](s32) |
| ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16), [[TRUNC2]](s16), [[TRUNC3]](s16) |
| ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<4 x s16>) |
| ; VI-LABEL: name: test_smin_v4s16 |
| ; VI: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| ; VI: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 |
| ; VI: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) |
| ; VI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) |
| ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32) |
| ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) |
| ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) |
| ; VI: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) |
| ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST1]](s32) |
| ; VI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) |
| ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR1]](s32) |
| ; VI: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>) |
| ; VI: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>) |
| ; VI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST2]](s32) |
| ; VI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) |
| ; VI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR2]](s32) |
| ; VI: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) |
| ; VI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST3]](s32) |
| ; VI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C]](s32) |
| ; VI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR3]](s32) |
| ; VI: [[SMIN:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC]], [[TRUNC4]] |
| ; VI: [[SMIN1:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC1]], [[TRUNC5]] |
| ; VI: [[SMIN2:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC2]], [[TRUNC6]] |
| ; VI: [[SMIN3:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC3]], [[TRUNC7]] |
| ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[SMIN]](s16), [[SMIN1]](s16), [[SMIN2]](s16), [[SMIN3]](s16) |
| ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<4 x s16>) |
| ; GFX9-LABEL: name: test_smin_v4s16 |
| ; GFX9: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 |
| ; GFX9: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) |
| ; GFX9: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>) |
| ; GFX9: [[SMIN:%[0-9]+]]:_(<2 x s16>) = G_SMIN [[UV]], [[UV2]] |
| ; GFX9: [[SMIN1:%[0-9]+]]:_(<2 x s16>) = G_SMIN [[UV1]], [[UV3]] |
| ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[SMIN]](<2 x s16>), [[SMIN1]](<2 x s16>) |
| ; GFX9: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) |
| %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| %1:_(<4 x s16>) = COPY $vgpr2_vgpr3 |
| %2:_(<4 x s16>) = G_SMIN %0, %1 |
| $vgpr0_vgpr1 = COPY %2 |
| ... |