| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=SI %s |
| # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=VI %s |
| # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX9 %s |
| |
| --- |
| name: test_fminnum_s32_ieee_mode_on |
| machineFunctionInfo: |
| mode: |
| ieee: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; SI-LABEL: name: test_fminnum_s32_ieee_mode_on |
| ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; SI: $vgpr0 = COPY %2(s32) |
| ; SI: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]] |
| ; SI: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]] |
| ; SI: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| ; VI-LABEL: name: test_fminnum_s32_ieee_mode_on |
| ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; VI: $vgpr0 = COPY %2(s32) |
| ; VI: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]] |
| ; VI: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]] |
| ; VI: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| ; GFX9-LABEL: name: test_fminnum_s32_ieee_mode_on |
| ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; GFX9: $vgpr0 = COPY %2(s32) |
| ; GFX9: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]] |
| ; GFX9: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]] |
| ; GFX9: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = G_FMINNUM %0, %1 |
| $vgpr0 = COPY %2 |
| ... |
| |
| --- |
| name: test_fminnum_s32_ieee_mode_off |
| machineFunctionInfo: |
| mode: |
| ieee: false |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; SI-LABEL: name: test_fminnum_s32_ieee_mode_off |
| ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; SI: [[FMINNUM:%[0-9]+]]:_(s32) = G_FMINNUM [[COPY]], [[COPY1]] |
| ; SI: $vgpr0 = COPY [[FMINNUM]](s32) |
| ; VI-LABEL: name: test_fminnum_s32_ieee_mode_off |
| ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; VI: [[FMINNUM:%[0-9]+]]:_(s32) = G_FMINNUM [[COPY]], [[COPY1]] |
| ; VI: $vgpr0 = COPY [[FMINNUM]](s32) |
| ; GFX9-LABEL: name: test_fminnum_s32_ieee_mode_off |
| ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; GFX9: [[FMINNUM:%[0-9]+]]:_(s32) = G_FMINNUM [[COPY]], [[COPY1]] |
| ; GFX9: $vgpr0 = COPY [[FMINNUM]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = G_FMINNUM %0, %1 |
| $vgpr0 = COPY %2 |
| ... |
| |
| --- |
| name: test_fminnum_s32_nnan |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; SI-LABEL: name: test_fminnum_s32_nnan |
| ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; SI: $vgpr0 = COPY %2(s32) |
| ; SI: %2:_(s32) = nnan G_FMINNUM_IEEE [[COPY]], [[COPY1]] |
| ; VI-LABEL: name: test_fminnum_s32_nnan |
| ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; VI: $vgpr0 = COPY %2(s32) |
| ; VI: %2:_(s32) = nnan G_FMINNUM_IEEE [[COPY]], [[COPY1]] |
| ; GFX9-LABEL: name: test_fminnum_s32_nnan |
| ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; GFX9: $vgpr0 = COPY %2(s32) |
| ; GFX9: %2:_(s32) = nnan G_FMINNUM_IEEE [[COPY]], [[COPY1]] |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = nnan G_FMINNUM %0, %1 |
| $vgpr0 = COPY %2 |
| ... |
| |
| |
| --- |
| name: test_fminnum_s32_nnan_lhs |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; SI-LABEL: name: test_fminnum_s32_nnan_lhs |
| ; SI: %0:_(s32) = nnan COPY $vgpr0 |
| ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; SI: $vgpr0 = COPY %2(s32) |
| ; SI: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]] |
| ; SI: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE %0, [[FCANONICALIZE]] |
| ; VI-LABEL: name: test_fminnum_s32_nnan_lhs |
| ; VI: %0:_(s32) = nnan COPY $vgpr0 |
| ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; VI: $vgpr0 = COPY %2(s32) |
| ; VI: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]] |
| ; VI: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE %0, [[FCANONICALIZE]] |
| ; GFX9-LABEL: name: test_fminnum_s32_nnan_lhs |
| ; GFX9: %0:_(s32) = nnan COPY $vgpr0 |
| ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; GFX9: $vgpr0 = COPY %2(s32) |
| ; GFX9: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]] |
| ; GFX9: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE %0, [[FCANONICALIZE]] |
| %0:_(s32) = nnan COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = G_FMINNUM %0, %1 |
| $vgpr0 = COPY %2 |
| ... |
| |
| |
| --- |
| name: test_fminnum_s32_nnan_rhs |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; SI-LABEL: name: test_fminnum_s32_nnan_rhs |
| ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; SI: %1:_(s32) = nnan COPY $vgpr1 |
| ; SI: $vgpr0 = COPY %2(s32) |
| ; SI: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]] |
| ; SI: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], %1 |
| ; VI-LABEL: name: test_fminnum_s32_nnan_rhs |
| ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; VI: %1:_(s32) = nnan COPY $vgpr1 |
| ; VI: $vgpr0 = COPY %2(s32) |
| ; VI: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]] |
| ; VI: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], %1 |
| ; GFX9-LABEL: name: test_fminnum_s32_nnan_rhs |
| ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; GFX9: %1:_(s32) = nnan COPY $vgpr1 |
| ; GFX9: $vgpr0 = COPY %2(s32) |
| ; GFX9: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]] |
| ; GFX9: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], %1 |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = nnan COPY $vgpr1 |
| %2:_(s32) = G_FMINNUM %0, %1 |
| $vgpr0 = COPY %2 |
| ... |
| |
| --- |
| name: test_fminnum_s32_nnan_lhs_rhs |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; SI-LABEL: name: test_fminnum_s32_nnan_lhs_rhs |
| ; SI: %0:_(s32) = nnan COPY $vgpr0 |
| ; SI: %1:_(s32) = nnan COPY $vgpr1 |
| ; SI: $vgpr0 = COPY %2(s32) |
| ; SI: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE %0, %1 |
| ; VI-LABEL: name: test_fminnum_s32_nnan_lhs_rhs |
| ; VI: %0:_(s32) = nnan COPY $vgpr0 |
| ; VI: %1:_(s32) = nnan COPY $vgpr1 |
| ; VI: $vgpr0 = COPY %2(s32) |
| ; VI: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE %0, %1 |
| ; GFX9-LABEL: name: test_fminnum_s32_nnan_lhs_rhs |
| ; GFX9: %0:_(s32) = nnan COPY $vgpr0 |
| ; GFX9: %1:_(s32) = nnan COPY $vgpr1 |
| ; GFX9: $vgpr0 = COPY %2(s32) |
| ; GFX9: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE %0, %1 |
| %0:_(s32) = nnan COPY $vgpr0 |
| %1:_(s32) = nnan COPY $vgpr1 |
| %2:_(s32) = G_FMINNUM %0, %1 |
| $vgpr0 = COPY %2 |
| ... |
| |
| --- |
| name: test_fminnum_s64 |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; SI-LABEL: name: test_fminnum_s64 |
| ; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 |
| ; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 |
| ; SI: $vgpr0_vgpr1 = COPY %2(s64) |
| ; SI: [[FCANONICALIZE:%[0-9]+]]:_(s64) = G_FCANONICALIZE [[COPY]] |
| ; SI: [[FCANONICALIZE1:%[0-9]+]]:_(s64) = G_FCANONICALIZE [[COPY1]] |
| ; SI: [[FMINNUM_IEEE:%[0-9]+]]:_(s64) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| ; VI-LABEL: name: test_fminnum_s64 |
| ; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 |
| ; VI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 |
| ; VI: $vgpr0_vgpr1 = COPY %2(s64) |
| ; VI: [[FCANONICALIZE:%[0-9]+]]:_(s64) = G_FCANONICALIZE [[COPY]] |
| ; VI: [[FCANONICALIZE1:%[0-9]+]]:_(s64) = G_FCANONICALIZE [[COPY1]] |
| ; VI: [[FMINNUM_IEEE:%[0-9]+]]:_(s64) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| ; GFX9-LABEL: name: test_fminnum_s64 |
| ; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 |
| ; GFX9: $vgpr0_vgpr1 = COPY %2(s64) |
| ; GFX9: [[FCANONICALIZE:%[0-9]+]]:_(s64) = G_FCANONICALIZE [[COPY]] |
| ; GFX9: [[FCANONICALIZE1:%[0-9]+]]:_(s64) = G_FCANONICALIZE [[COPY1]] |
| ; GFX9: [[FMINNUM_IEEE:%[0-9]+]]:_(s64) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| %0:_(s64) = COPY $vgpr0_vgpr1 |
| %1:_(s64) = COPY $vgpr2_vgpr3 |
| %2:_(s64) = G_FMINNUM %0, %1 |
| $vgpr0_vgpr1 = COPY %2 |
| ... |
| |
| --- |
| name: test_fminnum_s16 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; SI-LABEL: name: test_fminnum_s16 |
| ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) |
| ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) |
| ; SI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16) |
| ; SI: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16) |
| ; SI: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC %8(s32) |
| ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16) |
| ; SI: $vgpr0 = COPY [[ANYEXT]](s32) |
| ; SI: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FPEXT]], [[FPEXT1]] |
| ; VI-LABEL: name: test_fminnum_s16 |
| ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) |
| ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) |
| ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT %4(s16) |
| ; VI: $vgpr0 = COPY [[ANYEXT]](s32) |
| ; VI: [[FCANONICALIZE:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC]] |
| ; VI: [[FCANONICALIZE1:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC1]] |
| ; VI: [[FMINNUM_IEEE:%[0-9]+]]:_(s16) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| ; GFX9-LABEL: name: test_fminnum_s16 |
| ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) |
| ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) |
| ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT %4(s16) |
| ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32) |
| ; GFX9: [[FCANONICALIZE:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC]] |
| ; GFX9: [[FCANONICALIZE1:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC1]] |
| ; GFX9: [[FMINNUM_IEEE:%[0-9]+]]:_(s16) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s16) = G_TRUNC %0 |
| %3:_(s16) = G_TRUNC %1 |
| %4:_(s16) = G_FMINNUM %2, %3 |
| %5:_(s32) = G_ANYEXT %4 |
| $vgpr0 = COPY %5 |
| ... |
| |
| --- |
| name: test_fminnum_v2s32 |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; SI-LABEL: name: test_fminnum_v2s32 |
| ; SI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 |
| ; SI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 |
| ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) |
| ; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) |
| ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR %7(s32), %8(s32) |
| ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) |
| ; SI: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[UV1]] |
| ; SI: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[UV3]] |
| ; SI: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| ; SI: [[FCANONICALIZE2:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[UV]] |
| ; SI: [[FCANONICALIZE3:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[UV2]] |
| ; SI: [[FMINNUM_IEEE1:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE2]], [[FCANONICALIZE3]] |
| ; VI-LABEL: name: test_fminnum_v2s32 |
| ; VI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 |
| ; VI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 |
| ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) |
| ; VI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) |
| ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR %7(s32), %8(s32) |
| ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) |
| ; VI: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[UV1]] |
| ; VI: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[UV3]] |
| ; VI: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| ; VI: [[FCANONICALIZE2:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[UV]] |
| ; VI: [[FCANONICALIZE3:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[UV2]] |
| ; VI: [[FMINNUM_IEEE1:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE2]], [[FCANONICALIZE3]] |
| ; GFX9-LABEL: name: test_fminnum_v2s32 |
| ; GFX9: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 |
| ; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) |
| ; GFX9: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) |
| ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR %7(s32), %8(s32) |
| ; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) |
| ; GFX9: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[UV1]] |
| ; GFX9: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[UV3]] |
| ; GFX9: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| ; GFX9: [[FCANONICALIZE2:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[UV]] |
| ; GFX9: [[FCANONICALIZE3:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[UV2]] |
| ; GFX9: [[FMINNUM_IEEE1:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE2]], [[FCANONICALIZE3]] |
| %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 |
| %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 |
| %2:_(<2 x s32>) = G_FMINNUM %0, %1 |
| $vgpr0_vgpr1 = COPY %2 |
| ... |
| |
| --- |
| name: test_fminnum_v2s16 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; SI-LABEL: name: test_fminnum_v2s16 |
| ; SI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 |
| ; SI: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 |
| ; SI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) |
| ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32) |
| ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) |
| ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) |
| ; SI: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>) |
| ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST1]](s32) |
| ; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) |
| ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR1]](s32) |
| ; SI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16) |
| ; SI: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC2]](s16) |
| ; SI: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC %14(s32) |
| ; SI: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16) |
| ; SI: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC3]](s16) |
| ; SI: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC %11(s32) |
| ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16) |
| ; SI: $vgpr0 = COPY [[BUILD_VECTOR]](<2 x s16>) |
| ; SI: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FPEXT2]], [[FPEXT3]] |
| ; SI: [[FMINNUM_IEEE1:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FPEXT]], [[FPEXT1]] |
| ; VI-LABEL: name: test_fminnum_v2s16 |
| ; VI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 |
| ; VI: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 |
| ; VI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) |
| ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32) |
| ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) |
| ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) |
| ; VI: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>) |
| ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST1]](s32) |
| ; VI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) |
| ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR1]](s32) |
| ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR %7(s16), %8(s16) |
| ; VI: $vgpr0 = COPY [[BUILD_VECTOR]](<2 x s16>) |
| ; VI: [[FCANONICALIZE:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC1]] |
| ; VI: [[FCANONICALIZE1:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC3]] |
| ; VI: [[FMINNUM_IEEE:%[0-9]+]]:_(s16) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| ; VI: [[FCANONICALIZE2:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC]] |
| ; VI: [[FCANONICALIZE3:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC2]] |
| ; VI: [[FMINNUM_IEEE1:%[0-9]+]]:_(s16) = G_FMINNUM_IEEE [[FCANONICALIZE2]], [[FCANONICALIZE3]] |
| ; GFX9-LABEL: name: test_fminnum_v2s16 |
| ; GFX9: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 |
| ; GFX9: $vgpr0 = COPY %2(<2 x s16>) |
| ; GFX9: [[FCANONICALIZE:%[0-9]+]]:_(<2 x s16>) = G_FCANONICALIZE [[COPY]] |
| ; GFX9: [[FCANONICALIZE1:%[0-9]+]]:_(<2 x s16>) = G_FCANONICALIZE [[COPY1]] |
| ; GFX9: [[FMINNUM_IEEE:%[0-9]+]]:_(<2 x s16>) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| %0:_(<2 x s16>) = COPY $vgpr0 |
| %1:_(<2 x s16>) = COPY $vgpr1 |
| %2:_(<2 x s16>) = G_FMINNUM %0, %1 |
| $vgpr0 = COPY %2 |
| ... |
| |
| --- |
| name: test_fminnum_v3s16 |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; SI-LABEL: name: test_fminnum_v3s16 |
| ; SI: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| ; SI: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 |
| ; SI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[COPY]](<4 x s16>), 0 |
| ; SI: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[COPY1]](<4 x s16>), 0 |
| ; SI: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[EXTRACT]](<3 x s16>) |
| ; SI: [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[EXTRACT1]](<3 x s16>) |
| ; SI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16) |
| ; SI: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16) |
| ; SI: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC %24(s32) |
| ; SI: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16) |
| ; SI: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV4]](s16) |
| ; SI: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC %21(s32) |
| ; SI: [[FPEXT4:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16) |
| ; SI: [[FPEXT5:%[0-9]+]]:_(s32) = G_FPEXT [[UV5]](s16) |
| ; SI: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC %18(s32) |
| ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16) |
| ; SI: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC1]](s16) |
| ; SI: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC2]](s16) |
| ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32) |
| ; SI: [[TRUNC:%[0-9]+]]:_(<3 x s16>) = G_TRUNC [[BUILD_VECTOR]](<3 x s32>) |
| ; SI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[TRUNC]](<3 x s16>), 0 |
| ; SI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) |
| ; SI: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FPEXT4]], [[FPEXT5]] |
| ; SI: [[FMINNUM_IEEE1:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FPEXT2]], [[FPEXT3]] |
| ; SI: [[FMINNUM_IEEE2:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FPEXT]], [[FPEXT1]] |
| ; VI-LABEL: name: test_fminnum_v3s16 |
| ; VI: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| ; VI: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 |
| ; VI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[COPY]](<4 x s16>), 0 |
| ; VI: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[COPY1]](<4 x s16>), 0 |
| ; VI: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[EXTRACT]](<3 x s16>) |
| ; VI: [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[EXTRACT1]](<3 x s16>) |
| ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT %13(s16) |
| ; VI: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT %14(s16) |
| ; VI: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT %15(s16) |
| ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32) |
| ; VI: [[TRUNC:%[0-9]+]]:_(<3 x s16>) = G_TRUNC [[BUILD_VECTOR]](<3 x s32>) |
| ; VI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[TRUNC]](<3 x s16>), 0 |
| ; VI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) |
| ; VI: [[FCANONICALIZE:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[UV2]] |
| ; VI: [[FCANONICALIZE1:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[UV5]] |
| ; VI: [[FMINNUM_IEEE:%[0-9]+]]:_(s16) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| ; VI: [[FCANONICALIZE2:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[UV1]] |
| ; VI: [[FCANONICALIZE3:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[UV4]] |
| ; VI: [[FMINNUM_IEEE1:%[0-9]+]]:_(s16) = G_FMINNUM_IEEE [[FCANONICALIZE2]], [[FCANONICALIZE3]] |
| ; VI: [[FCANONICALIZE4:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[UV]] |
| ; VI: [[FCANONICALIZE5:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[UV3]] |
| ; VI: [[FMINNUM_IEEE2:%[0-9]+]]:_(s16) = G_FMINNUM_IEEE [[FCANONICALIZE4]], [[FCANONICALIZE5]] |
| ; GFX9-LABEL: name: test_fminnum_v3s16 |
| ; GFX9: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 |
| ; GFX9: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[COPY]](<4 x s16>), 0 |
| ; GFX9: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[COPY1]](<4 x s16>), 0 |
| ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; GFX9: [[EXTRACT2:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 |
| ; GFX9: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 |
| ; GFX9: [[EXTRACT3:%[0-9]+]]:_(<2 x s16>) = G_EXTRACT [[INSERT]](<4 x s16>), 0 |
| ; GFX9: [[DEF2:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; GFX9: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF2]], [[EXTRACT1]](<3 x s16>), 0 |
| ; GFX9: [[EXTRACT4:%[0-9]+]]:_(<2 x s16>) = G_EXTRACT [[INSERT1]](<4 x s16>), 0 |
| ; GFX9: [[DEF3:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; GFX9: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF3]], [[EXTRACT2]](<3 x s16>), 0 |
| ; GFX9: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], %10(<2 x s16>), 0 |
| ; GFX9: [[EXTRACT5:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT3]](<4 x s16>), 0 |
| ; GFX9: [[DEF4:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; GFX9: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF4]], [[EXTRACT]](<3 x s16>), 0 |
| ; GFX9: [[EXTRACT6:%[0-9]+]]:_(s16) = G_EXTRACT [[INSERT4]](<4 x s16>), 32 |
| ; GFX9: [[DEF5:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; GFX9: [[INSERT5:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF5]], [[EXTRACT1]](<3 x s16>), 0 |
| ; GFX9: [[EXTRACT7:%[0-9]+]]:_(s16) = G_EXTRACT [[INSERT5]](<4 x s16>), 32 |
| ; GFX9: [[DEF6:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; GFX9: [[INSERT6:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF6]], [[EXTRACT5]](<3 x s16>), 0 |
| ; GFX9: [[INSERT7:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT6]], %14(s16), 32 |
| ; GFX9: [[EXTRACT8:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT7]](<4 x s16>), 0 |
| ; GFX9: [[DEF7:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; GFX9: [[INSERT8:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF7]], [[EXTRACT8]](<3 x s16>), 0 |
| ; GFX9: $vgpr0_vgpr1 = COPY [[INSERT8]](<4 x s16>) |
| ; GFX9: [[FCANONICALIZE:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[EXTRACT6]] |
| ; GFX9: [[FCANONICALIZE1:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[EXTRACT7]] |
| ; GFX9: [[FMINNUM_IEEE:%[0-9]+]]:_(s16) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| ; GFX9: [[FCANONICALIZE2:%[0-9]+]]:_(<2 x s16>) = G_FCANONICALIZE [[EXTRACT3]] |
| ; GFX9: [[FCANONICALIZE3:%[0-9]+]]:_(<2 x s16>) = G_FCANONICALIZE [[EXTRACT4]] |
| ; GFX9: [[FMINNUM_IEEE1:%[0-9]+]]:_(<2 x s16>) = G_FMINNUM_IEEE [[FCANONICALIZE2]], [[FCANONICALIZE3]] |
| %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| %1:_(<4 x s16>) = COPY $vgpr2_vgpr3 |
| %2:_(<3 x s16>) = G_EXTRACT %0, 0 |
| %3:_(<3 x s16>) = G_EXTRACT %1, 0 |
| %4:_(<3 x s16>) = G_FMINNUM %2, %3 |
| %5:_(<4 x s16>) = G_IMPLICIT_DEF |
| %6:_(<4 x s16>) = G_INSERT %5, %4, 0 |
| $vgpr0_vgpr1 = COPY %6 |
| ... |
| |
| --- |
| name: test_fminnum_v4s16 |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; SI-LABEL: name: test_fminnum_v4s16 |
| ; SI: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| ; SI: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 |
| ; SI: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) |
| ; SI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) |
| ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32) |
| ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) |
| ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) |
| ; SI: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) |
| ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST1]](s32) |
| ; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) |
| ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR1]](s32) |
| ; SI: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>) |
| ; SI: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>) |
| ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST2]](s32) |
| ; SI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) |
| ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR2]](s32) |
| ; SI: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) |
| ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST3]](s32) |
| ; SI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C]](s32) |
| ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR3]](s32) |
| ; SI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16) |
| ; SI: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC4]](s16) |
| ; SI: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC %26(s32) |
| ; SI: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16) |
| ; SI: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC5]](s16) |
| ; SI: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC %23(s32) |
| ; SI: [[FPEXT4:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC2]](s16) |
| ; SI: [[FPEXT5:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC6]](s16) |
| ; SI: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC %20(s32) |
| ; SI: [[FPEXT6:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC3]](s16) |
| ; SI: [[FPEXT7:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC7]](s16) |
| ; SI: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC %17(s32) |
| ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16) |
| ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<4 x s16>) |
| ; SI: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FPEXT6]], [[FPEXT7]] |
| ; SI: [[FMINNUM_IEEE1:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FPEXT4]], [[FPEXT5]] |
| ; SI: [[FMINNUM_IEEE2:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FPEXT2]], [[FPEXT3]] |
| ; SI: [[FMINNUM_IEEE3:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FPEXT]], [[FPEXT1]] |
| ; VI-LABEL: name: test_fminnum_v4s16 |
| ; VI: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| ; VI: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 |
| ; VI: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) |
| ; VI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) |
| ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32) |
| ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) |
| ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) |
| ; VI: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) |
| ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST1]](s32) |
| ; VI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) |
| ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR1]](s32) |
| ; VI: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>) |
| ; VI: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>) |
| ; VI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST2]](s32) |
| ; VI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) |
| ; VI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR2]](s32) |
| ; VI: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) |
| ; VI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST3]](s32) |
| ; VI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C]](s32) |
| ; VI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR3]](s32) |
| ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR %11(s16), %12(s16), %13(s16), %14(s16) |
| ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<4 x s16>) |
| ; VI: [[FCANONICALIZE:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC3]] |
| ; VI: [[FCANONICALIZE1:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC7]] |
| ; VI: [[FMINNUM_IEEE:%[0-9]+]]:_(s16) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| ; VI: [[FCANONICALIZE2:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC2]] |
| ; VI: [[FCANONICALIZE3:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC6]] |
| ; VI: [[FMINNUM_IEEE1:%[0-9]+]]:_(s16) = G_FMINNUM_IEEE [[FCANONICALIZE2]], [[FCANONICALIZE3]] |
| ; VI: [[FCANONICALIZE4:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC1]] |
| ; VI: [[FCANONICALIZE5:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC5]] |
| ; VI: [[FMINNUM_IEEE2:%[0-9]+]]:_(s16) = G_FMINNUM_IEEE [[FCANONICALIZE4]], [[FCANONICALIZE5]] |
| ; VI: [[FCANONICALIZE6:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC]] |
| ; VI: [[FCANONICALIZE7:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[TRUNC4]] |
| ; VI: [[FMINNUM_IEEE3:%[0-9]+]]:_(s16) = G_FMINNUM_IEEE [[FCANONICALIZE6]], [[FCANONICALIZE7]] |
| ; GFX9-LABEL: name: test_fminnum_v4s16 |
| ; GFX9: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 |
| ; GFX9: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) |
| ; GFX9: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>) |
| ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS %7(<2 x s16>), %8(<2 x s16>) |
| ; GFX9: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) |
| ; GFX9: [[FCANONICALIZE:%[0-9]+]]:_(<2 x s16>) = G_FCANONICALIZE [[UV1]] |
| ; GFX9: [[FCANONICALIZE1:%[0-9]+]]:_(<2 x s16>) = G_FCANONICALIZE [[UV3]] |
| ; GFX9: [[FMINNUM_IEEE:%[0-9]+]]:_(<2 x s16>) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] |
| ; GFX9: [[FCANONICALIZE2:%[0-9]+]]:_(<2 x s16>) = G_FCANONICALIZE [[UV]] |
| ; GFX9: [[FCANONICALIZE3:%[0-9]+]]:_(<2 x s16>) = G_FCANONICALIZE [[UV2]] |
| ; GFX9: [[FMINNUM_IEEE1:%[0-9]+]]:_(<2 x s16>) = G_FMINNUM_IEEE [[FCANONICALIZE2]], [[FCANONICALIZE3]] |
| %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| %1:_(<4 x s16>) = COPY $vgpr2_vgpr3 |
| %2:_(<4 x s16>) = G_FMINNUM %0, %1 |
| $vgpr0_vgpr1 = COPY %2 |
| ... |