| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s |
| |
| --- |
| name: test_and_s32 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: test_and_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]] |
| ; CHECK: $vgpr0 = COPY [[AND]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = G_AND %0, %1 |
| $vgpr0 = COPY %2 |
| ... |
| |
| --- |
| name: test_and_s1 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: test_and_s1 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]] |
| ; CHECK: S_NOP 0, implicit [[AND]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(ne), %0, %2 |
| %4:_(s1) = G_ICMP intpred(ne), %1, %2 |
| %5:_(s32) = G_AND %0, %1 |
| S_NOP 0, implicit %5 |
| ... |
| |
| --- |
| name: test_and_s64 |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: test_and_s64 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 |
| ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]] |
| ; CHECK: $vgpr0_vgpr1 = COPY [[AND]](s64) |
| %0:_(s64) = COPY $vgpr0_vgpr1 |
| %1:_(s64) = COPY $vgpr2_vgpr3 |
| %2:_(s64) = G_AND %0, %1 |
| $vgpr0_vgpr1 = COPY %2 |
| ... |
| |
| --- |
| name: test_and_s7 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: test_and_s7 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]] |
| ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[AND]](s32) |
| ; CHECK: $vgpr0 = COPY [[COPY4]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s7) = G_TRUNC %0 |
| %3:_(s7) = G_TRUNC %1 |
| %4:_(s7) = G_AND %2, %3 |
| %5:_(s32) = G_ANYEXT %4 |
| $vgpr0 = COPY %5 |
| ... |
| |
| --- |
| name: test_and_s8 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: test_and_s8 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]] |
| ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[AND]](s32) |
| ; CHECK: $vgpr0 = COPY [[COPY4]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s8) = G_TRUNC %0 |
| %3:_(s8) = G_TRUNC %1 |
| %4:_(s8) = G_AND %2, %3 |
| %5:_(s32) = G_ANYEXT %4 |
| $vgpr0 = COPY %5 |
| ... |
| |
| --- |
| name: test_and_s16 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: test_and_s16 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]] |
| ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[AND]](s32) |
| ; CHECK: $vgpr0 = COPY [[COPY4]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s16) = G_TRUNC %0 |
| %3:_(s16) = G_TRUNC %1 |
| %4:_(s16) = G_AND %2, %3 |
| %5:_(s32) = G_ANYEXT %4 |
| $vgpr0 = COPY %5 |
| ... |
| |
| --- |
| name: test_and_s24 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: test_and_s24 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]] |
| ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[AND]](s32) |
| ; CHECK: $vgpr0 = COPY [[COPY4]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s24) = G_TRUNC %0 |
| %3:_(s24) = G_TRUNC %1 |
| %4:_(s24) = G_AND %2, %3 |
| %5:_(s32) = G_ANYEXT %4 |
| $vgpr0 = COPY %5 |
| ... |
| |
| --- |
| name: test_and_v2s32 |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: test_and_v2s32 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 |
| ; CHECK: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[COPY1]] |
| ; CHECK: $vgpr0_vgpr1 = COPY [[AND]](<2 x s32>) |
| %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 |
| %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 |
| %2:_(<2 x s32>) = G_AND %0, %1 |
| $vgpr0_vgpr1 = COPY %2 |
| ... |
| |
| --- |
| name: test_and_v3i32 |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5 |
| |
| ; CHECK-LABEL: name: test_and_v3i32 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 |
| ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) |
| ; CHECK: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV]], [[UV3]] |
| ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[UV4]] |
| ; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[UV2]], [[UV5]] |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[AND]](s32), [[AND1]](s32), [[AND2]](s32) |
| ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) |
| %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 |
| %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 |
| %2:_(<3 x s32>) = G_AND %0, %1 |
| $vgpr0_vgpr1_vgpr2 = COPY %2 |
| ... |
| |
| --- |
| name: test_and_v4i32 |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7 |
| |
| ; CHECK-LABEL: name: test_and_v4i32 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7 |
| ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) |
| ; CHECK: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<4 x s32>) |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV]], [[UV4]] |
| ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[UV5]] |
| ; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[UV2]], [[UV6]] |
| ; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[UV3]], [[UV7]] |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[AND]](s32), [[AND1]](s32), [[AND2]](s32), [[AND3]](s32) |
| ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) |
| %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| %1:_(<4 x s32>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7 |
| %2:_(<4 x s32>) = G_AND %0, %1 |
| $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 |
| ... |
| |
| --- |
| name: test_and_v5i32 |
| body: | |
| bb.0: |
| |
| ; CHECK-LABEL: name: test_and_v5i32 |
| ; CHECK: [[DEF:%[0-9]+]]:_(<5 x s32>) = G_IMPLICIT_DEF |
| ; CHECK: [[DEF1:%[0-9]+]]:_(<5 x s32>) = G_IMPLICIT_DEF |
| ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<5 x s32>) |
| ; CHECK: [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](<5 x s32>) |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV]], [[UV5]] |
| ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[UV6]] |
| ; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[UV2]], [[UV7]] |
| ; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[UV3]], [[UV8]] |
| ; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[UV4]], [[UV9]] |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[AND]](s32), [[AND1]](s32), [[AND2]](s32), [[AND3]](s32), [[AND4]](s32) |
| ; CHECK: [[DEF2:%[0-9]+]]:_(<8 x s32>) = G_IMPLICIT_DEF |
| ; CHECK: [[INSERT:%[0-9]+]]:_(<8 x s32>) = G_INSERT [[DEF2]], [[BUILD_VECTOR]](<5 x s32>), 0 |
| ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<8 x s32>) |
| %0:_(<5 x s32>) = G_IMPLICIT_DEF |
| %1:_(<5 x s32>) = G_IMPLICIT_DEF |
| %2:_(<5 x s32>) = G_AND %0, %1 |
| %3:_(<8 x s32>) = G_IMPLICIT_DEF |
| %4:_(<8 x s32>) = G_INSERT %3, %2, 0 |
| $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %4 |
| ... |
| |
| --- |
| name: test_and_v2s64 |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7 |
| |
| ; CHECK-LABEL: name: test_and_v2s64 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7 |
| ; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) |
| ; CHECK: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>) |
| ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[UV2]] |
| ; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[UV3]] |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[AND]](s64), [[AND1]](s64) |
| ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) |
| %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| %1:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7 |
| %2:_(<2 x s64>) = G_AND %0, %1 |
| $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 |
| ... |
| |
| --- |
| name: test_and_v2s16 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: test_and_v2s16 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 |
| ; CHECK: [[AND:%[0-9]+]]:_(<2 x s16>) = G_AND [[COPY]], [[COPY1]] |
| ; CHECK: $vgpr0 = COPY [[AND]](<2 x s16>) |
| %0:_(<2 x s16>) = COPY $vgpr0 |
| %1:_(<2 x s16>) = COPY $vgpr1 |
| %2:_(<2 x s16>) = G_AND %0, %1 |
| $vgpr0 = COPY %2 |
| ... |
| |
| --- |
| name: test_and_v3s16 |
| body: | |
| bb.0: |
| |
| ; CHECK-LABEL: name: test_and_v3s16 |
| ; CHECK: [[DEF:%[0-9]+]]:_(<3 x s16>) = G_IMPLICIT_DEF |
| ; CHECK: [[DEF1:%[0-9]+]]:_(<3 x s16>) = G_IMPLICIT_DEF |
| ; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[DEF]](<3 x s16>) |
| ; CHECK: [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[DEF1]](<3 x s16>) |
| ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16) |
| ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV3]](s16) |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[ANYEXT1]] |
| ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[AND]](s32) |
| ; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16) |
| ; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV4]](s16) |
| ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ANYEXT2]], [[ANYEXT3]] |
| ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[AND1]](s32) |
| ; CHECK: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s16) |
| ; CHECK: [[ANYEXT5:%[0-9]+]]:_(s32) = G_ANYEXT [[UV5]](s16) |
| ; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ANYEXT4]], [[ANYEXT5]] |
| ; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[AND2]](s32) |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16), [[TRUNC2]](s16) |
| ; CHECK: [[DEF2:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; CHECK: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF2]], [[BUILD_VECTOR]](<3 x s16>), 0 |
| ; CHECK: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) |
| %0:_(<3 x s16>) = G_IMPLICIT_DEF |
| %1:_(<3 x s16>) = G_IMPLICIT_DEF |
| %2:_(<3 x s16>) = G_AND %0, %1 |
| %4:_(<4 x s16>) = G_IMPLICIT_DEF |
| %5:_(<4 x s16>) = G_INSERT %4, %2, 0 |
| $vgpr0_vgpr1 = COPY %5 |
| ... |
| |
| --- |
| name: test_and_v4s16 |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: test_and_v4s16 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 |
| ; CHECK: [[AND:%[0-9]+]]:_(<4 x s16>) = G_AND [[COPY]], [[COPY1]] |
| ; CHECK: $vgpr0_vgpr1 = COPY [[AND]](<4 x s16>) |
| %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| %1:_(<4 x s16>) = COPY $vgpr2_vgpr3 |
| %2:_(<4 x s16>) = G_AND %0, %1 |
| $vgpr0_vgpr1 = COPY %2 |
| ... |