Sign in
llvm
/
llvm
/
ba0c352c6aca8c2526dedff74865494630e9bb74
/
.
/
test
/
CodeGen
/
Hexagon
/
vect
/
vect-mul-v4i8.ll
blob: 5ebc33726bbb154e259efc7b5d5889c2c723c1c7 [
file
] [
log
] [
blame
]
; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
; CHECK: vmpybu
; CHECK: vtrunehb
define
<
4
x
i8
>
@t_i4x8
(<
4
x
i8
>
%a
,
<
4
x
i8
>
%b
)
nounwind
{
entry
:
%0
=
mul
<
4
x
i8
>
%a
,
%b
ret
<
4
x
i8
>
%0
}