[X86] Use default expansion for (i64 fp_to_uint f80) when avx512 is enabled on 64-bit targets to match what happens without avx512.
In 64-bit mode prior to avx512 we use Expand, but with avx512 we need to make f32/f64 conversions Legal so we use Custom and then do our own expansion for f80. But this seems to produce codegen differences relative to avx2. This patch corrects this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353921 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 2fb01f6..ac4bce0 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -18093,7 +18093,9 @@
(!Subtarget.is64Bit() ||
!isScalarFPTypeInSSEReg(TheVT));
- if (!IsSigned && DstTy != MVT::i64 && !Subtarget.hasAVX512()) {
+ if (!IsSigned && DstTy != MVT::i64) {
+ assert(!Subtarget.hasAVX512() &&
+ "AVX512 should have already been handled!");
// Replace the fp-to-uint32 operation with an fp-to-sint64 FIST.
// The low 32 bits of the fist result will have the correct uint32 result.
assert(DstTy == MVT::i32 && "Unexpected FP_TO_UINT");
@@ -18732,6 +18734,17 @@
assert(!VT.isVector());
+ if (!IsSigned && Subtarget.hasAVX512()) {
+ SDValue Src = Op.getOperand(0);
+ // Conversions from f32/f64 should be legal.
+ if (Src.getValueType() != MVT::f80)
+ return Op;
+
+ // Use default expansion.
+ if (VT == MVT::i64)
+ return SDValue();
+ }
+
if (SDValue V = FP_TO_INTHelper(Op, DAG, IsSigned))
return V;
diff --git a/test/CodeGen/X86/scalar-fp-to-i64.ll b/test/CodeGen/X86/scalar-fp-to-i64.ll
index a97fc22..d7e63ba 100644
--- a/test/CodeGen/X86/scalar-fp-to-i64.ll
+++ b/test/CodeGen/X86/scalar-fp-to-i64.ll
@@ -1066,18 +1066,15 @@
; AVX512_64_WIN-NEXT: flds __real@{{.*}}(%rip)
; AVX512_64_WIN-NEXT: fld %st(1)
; AVX512_64_WIN-NEXT: fsub %st(1), %st
-; AVX512_64_WIN-NEXT: xorl %ecx, %ecx
+; AVX512_64_WIN-NEXT: xorl %eax, %eax
; AVX512_64_WIN-NEXT: fxch %st(1)
; AVX512_64_WIN-NEXT: fucompi %st(2), %st
; AVX512_64_WIN-NEXT: fcmovnbe %st(1), %st
; AVX512_64_WIN-NEXT: fstp %st(1)
; AVX512_64_WIN-NEXT: fisttpll (%rsp)
-; AVX512_64_WIN-NEXT: setbe %cl
-; AVX512_64_WIN-NEXT: shll $31, %ecx
-; AVX512_64_WIN-NEXT: xorl {{[0-9]+}}(%rsp), %ecx
-; AVX512_64_WIN-NEXT: shlq $32, %rcx
-; AVX512_64_WIN-NEXT: movl (%rsp), %eax
-; AVX512_64_WIN-NEXT: orq %rcx, %rax
+; AVX512_64_WIN-NEXT: setbe %al
+; AVX512_64_WIN-NEXT: shlq $63, %rax
+; AVX512_64_WIN-NEXT: xorq (%rsp), %rax
; AVX512_64_WIN-NEXT: popq %rcx
; AVX512_64_WIN-NEXT: retq
;
@@ -1087,18 +1084,15 @@
; AVX512_64_LIN-NEXT: flds {{.*}}(%rip)
; AVX512_64_LIN-NEXT: fld %st(1)
; AVX512_64_LIN-NEXT: fsub %st(1), %st
-; AVX512_64_LIN-NEXT: xorl %ecx, %ecx
+; AVX512_64_LIN-NEXT: xorl %eax, %eax
; AVX512_64_LIN-NEXT: fxch %st(1)
; AVX512_64_LIN-NEXT: fucompi %st(2), %st
; AVX512_64_LIN-NEXT: fcmovnbe %st(1), %st
; AVX512_64_LIN-NEXT: fstp %st(1)
; AVX512_64_LIN-NEXT: fisttpll -{{[0-9]+}}(%rsp)
-; AVX512_64_LIN-NEXT: setbe %cl
-; AVX512_64_LIN-NEXT: shll $31, %ecx
-; AVX512_64_LIN-NEXT: xorl -{{[0-9]+}}(%rsp), %ecx
-; AVX512_64_LIN-NEXT: shlq $32, %rcx
-; AVX512_64_LIN-NEXT: movl -{{[0-9]+}}(%rsp), %eax
-; AVX512_64_LIN-NEXT: orq %rcx, %rax
+; AVX512_64_LIN-NEXT: setbe %al
+; AVX512_64_LIN-NEXT: shlq $63, %rax
+; AVX512_64_LIN-NEXT: xorq -{{[0-9]+}}(%rsp), %rax
; AVX512_64_LIN-NEXT: retq
;
; SSE3_32_WIN-LABEL: x_to_u64:
