| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL |
| --- | |
| define void @test_unmerge_v128() { |
| ret void |
| } |
| |
| define void @test_unmerge_v256() { |
| ret void |
| } |
| |
| ... |
| --- |
| name: test_unmerge_v128 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| registers: |
| - { id: 0, class: vecr } |
| - { id: 1, class: vecr } |
| - { id: 2, class: vecr } |
| - { id: 3, class: vecr } |
| - { id: 4, class: vecr } |
| body: | |
| bb.1 (%ir-block.0): |
| |
| ; ALL-LABEL: name: test_unmerge_v128 |
| ; ALL: [[DEF:%[0-9]+]]:vr512 = IMPLICIT_DEF |
| ; ALL: [[COPY:%[0-9]+]]:vr128x = COPY [[DEF]].sub_xmm |
| ; ALL: [[VEXTRACTF32x4Zrr:%[0-9]+]]:vr128x = VEXTRACTF32x4Zrr [[DEF]], 1 |
| ; ALL: [[VEXTRACTF32x4Zrr1:%[0-9]+]]:vr128x = VEXTRACTF32x4Zrr [[DEF]], 2 |
| ; ALL: [[VEXTRACTF32x4Zrr2:%[0-9]+]]:vr128x = VEXTRACTF32x4Zrr [[DEF]], 3 |
| ; ALL: $xmm0 = COPY [[COPY]] |
| ; ALL: RET 0, implicit $xmm0 |
| %0(<16 x s32>) = IMPLICIT_DEF |
| %1(<4 x s32>), %2(<4 x s32>), %3(<4 x s32>), %4(<4 x s32>) = G_UNMERGE_VALUES %0(<16 x s32>) |
| $xmm0 = COPY %1(<4 x s32>) |
| RET 0, implicit $xmm0 |
| |
| ... |
| --- |
| name: test_unmerge_v256 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| registers: |
| - { id: 0, class: vecr } |
| - { id: 1, class: vecr } |
| - { id: 2, class: vecr } |
| body: | |
| bb.1 (%ir-block.0): |
| |
| ; ALL-LABEL: name: test_unmerge_v256 |
| ; ALL: [[DEF:%[0-9]+]]:vr512 = IMPLICIT_DEF |
| ; ALL: [[COPY:%[0-9]+]]:vr256x = COPY [[DEF]].sub_ymm |
| ; ALL: [[VEXTRACTF64x4Zrr:%[0-9]+]]:vr256x = VEXTRACTF64x4Zrr [[DEF]], 1 |
| ; ALL: $ymm0 = COPY [[COPY]] |
| ; ALL: RET 0, implicit $ymm0 |
| %0(<16 x s32>) = IMPLICIT_DEF |
| %1(<8 x s32>), %2(<8 x s32>) = G_UNMERGE_VALUES %0(<16 x s32>) |
| $ymm0 = COPY %1(<8 x s32>) |
| RET 0, implicit $ymm0 |
| |
| ... |