| # RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GCN -check-prefix=VI %s |
| # RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s |
| |
| # GCN: bb.0.entry: |
| # GCN: %m0 = S_MOV_B32 |
| # GFX9: S_NOP 0 |
| # VI-NOT: S_NOP_0 |
| # GCN: V_INTERP_P1_F32 |
| |
| --- |
| name: hazard_implicit_def |
| alignment: 0 |
| exposesReturnsTwice: false |
| legalized: false |
| regBankSelected: false |
| selected: false |
| tracksRegLiveness: true |
| registers: |
| liveins: |
| - { reg: '%sgpr7', virtual-reg: '' } |
| - { reg: '%vgpr4', virtual-reg: '' } |
| body: | |
| bb.0.entry: |
| liveins: %sgpr7, %vgpr4 |
| |
| %m0 = S_MOV_B32 killed %sgpr7 |
| %vgpr5 = IMPLICIT_DEF |
| %vgpr0 = V_INTERP_P1_F32 killed %vgpr4, 0, 0, implicit %m0, implicit %exec |
| SI_RETURN_TO_EPILOG killed %vgpr5, killed %vgpr0 |
| |
| ... |
