blob: dc638425355858346f2c5348bbaa8b11bbb2ae57 [file] [log] [blame]
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -codegenprepare < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define i1 @PR41004(i32 %x, i32 %y, i32 %t1) {
; CHECK-LABEL: @PR41004(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[T0:%.*]] = icmp eq i32 [[Y:%.*]], 1
; CHECK-NEXT: br i1 [[T0]], label [[SELECT_TRUE_SINK:%.*]], label [[SELECT_END:%.*]]
; CHECK: select.true.sink:
; CHECK-NEXT: [[REM:%.*]] = srem i32 [[X:%.*]], 2
; CHECK-NEXT: br label [[SELECT_END]]
; CHECK: select.end:
; CHECK-NEXT: [[MUL:%.*]] = phi i32 [ [[REM]], [[SELECT_TRUE_SINK]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP0:%.*]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 [[T1:%.*]], i32 1)
; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i32, i1 } [[TMP0]], 1
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[MATH]], [[MUL]]
; CHECK-NEXT: ret i1 [[OV]]
;
entry:
%rem = srem i32 %x, 2
%t0 = icmp eq i32 %y, 1
%mul = select i1 %t0, i32 %rem, i32 0
%neg = add i32 %t1, -1
%add = add i32 %neg, %mul
br label %if
if:
%tobool = icmp eq i32 %t1, 0
ret i1 %tobool
}