| //===- MipsLegalizerInfo.cpp ------------------------------------*- C++ -*-===// |
| // |
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| // See https://llvm.org/LICENSE.txt for license information. |
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| // |
| //===----------------------------------------------------------------------===// |
| /// \file |
| /// This file implements the targeting of the Machinelegalizer class for Mips. |
| /// \todo This should be generated by TableGen. |
| //===----------------------------------------------------------------------===// |
| |
| #include "MipsLegalizerInfo.h" |
| #include "MipsTargetMachine.h" |
| #include "llvm/CodeGen/GlobalISel/LegalizerHelper.h" |
| |
| using namespace llvm; |
| |
| MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) { |
| using namespace TargetOpcode; |
| |
| const LLT s1 = LLT::scalar(1); |
| const LLT s32 = LLT::scalar(32); |
| const LLT s64 = LLT::scalar(64); |
| const LLT p0 = LLT::pointer(0, 32); |
| |
| getActionDefinitionsBuilder({G_ADD, G_SUB}) |
| .legalFor({s32}) |
| .clampScalar(0, s32, s32); |
| |
| getActionDefinitionsBuilder(G_MUL) |
| .legalFor({s32}) |
| .minScalar(0, s32); |
| |
| getActionDefinitionsBuilder({G_UADDE, G_USUBO, G_USUBE}) |
| .lowerFor({{s32, s1}}); |
| |
| getActionDefinitionsBuilder({G_LOAD, G_STORE}) |
| .legalForTypesWithMemSize({{s32, p0, 8}, |
| {s32, p0, 16}, |
| {s32, p0, 32}, |
| {p0, p0, 32}}) |
| .minScalar(0, s32); |
| |
| getActionDefinitionsBuilder({G_ZEXTLOAD, G_SEXTLOAD}) |
| .legalForTypesWithMemSize({{s32, p0, 8}, |
| {s32, p0, 16}}) |
| .minScalar(0, s32); |
| |
| getActionDefinitionsBuilder(G_SELECT) |
| .legalForCartesianProduct({p0, s32}, {s32}) |
| .minScalar(0, s32) |
| .minScalar(1, s32); |
| |
| getActionDefinitionsBuilder({G_AND, G_OR, G_XOR}) |
| .legalFor({s32}) |
| .clampScalar(0, s32, s32); |
| |
| getActionDefinitionsBuilder({G_SDIV, G_SREM, G_UREM, G_UDIV}) |
| .legalFor({s32}) |
| .minScalar(0, s32) |
| .libcallFor({s64}); |
| |
| getActionDefinitionsBuilder({G_SHL, G_ASHR, G_LSHR}) |
| .legalFor({s32, s32}) |
| .minScalar(1, s32); |
| |
| getActionDefinitionsBuilder(G_ICMP) |
| .legalFor({{s32, s32}}) |
| .minScalar(0, s32); |
| |
| getActionDefinitionsBuilder(G_CONSTANT) |
| .legalFor({s32}) |
| .clampScalar(0, s32, s32); |
| |
| getActionDefinitionsBuilder(G_GEP) |
| .legalFor({{p0, s32}}); |
| |
| getActionDefinitionsBuilder(G_FRAME_INDEX) |
| .legalFor({p0}); |
| |
| getActionDefinitionsBuilder(G_GLOBAL_VALUE) |
| .legalFor({p0}); |
| |
| computeTables(); |
| verify(*ST.getInstrInfo()); |
| } |
| |
| bool MipsLegalizerInfo::legalizeCustom(MachineInstr &MI, |
| MachineRegisterInfo &MRI, |
| MachineIRBuilder &MIRBuilder, |
| GISelChangeObserver &Observer) const { |
| |
| using namespace TargetOpcode; |
| |
| MIRBuilder.setInstr(MI); |
| |
| return false; |
| } |