| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32 |
| --- | |
| |
| define void @and_i1() {entry: ret void} |
| define void @and_i8() {entry: ret void} |
| define void @and_i16() {entry: ret void} |
| define void @and_i32() {entry: ret void} |
| define void @and_i64() {entry: ret void} |
| define void @or_i1() {entry: ret void} |
| define void @or_i8() {entry: ret void} |
| define void @or_i16() {entry: ret void} |
| define void @or_i32() {entry: ret void} |
| define void @or_i64() {entry: ret void} |
| define void @xor_i1() {entry: ret void} |
| define void @xor_i8() {entry: ret void} |
| define void @xor_i16() {entry: ret void} |
| define void @xor_i32() {entry: ret void} |
| define void @xor_i64() {entry: ret void} |
| define void @shl(i32) {entry: ret void} |
| define void @ashr(i32) {entry: ret void} |
| define void @lshr(i32) {entry: ret void} |
| define void @shlv(i32, i32) {entry: ret void} |
| define void @ashrv(i32, i32) {entry: ret void} |
| define void @lshrv(i32, i32) {entry: ret void} |
| |
| ... |
| --- |
| name: and_i1 |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1 |
| |
| ; MIPS32-LABEL: name: and_i1 |
| ; MIPS32: liveins: $a0, $a1 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]] |
| ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[AND]](s32) |
| ; MIPS32: $v0 = COPY [[COPY4]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %2:_(s32) = COPY $a0 |
| %0:_(s1) = G_TRUNC %2(s32) |
| %3:_(s32) = COPY $a1 |
| %1:_(s1) = G_TRUNC %3(s32) |
| %4:_(s1) = G_AND %1, %0 |
| %5:_(s32) = G_ANYEXT %4(s1) |
| $v0 = COPY %5(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: and_i8 |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1 |
| |
| ; MIPS32-LABEL: name: and_i8 |
| ; MIPS32: liveins: $a0, $a1 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]] |
| ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[AND]](s32) |
| ; MIPS32: $v0 = COPY [[COPY4]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %2:_(s32) = COPY $a0 |
| %0:_(s8) = G_TRUNC %2(s32) |
| %3:_(s32) = COPY $a1 |
| %1:_(s8) = G_TRUNC %3(s32) |
| %4:_(s8) = G_AND %1, %0 |
| %5:_(s32) = G_ANYEXT %4(s8) |
| $v0 = COPY %5(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: and_i16 |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1 |
| |
| ; MIPS32-LABEL: name: and_i16 |
| ; MIPS32: liveins: $a0, $a1 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]] |
| ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[AND]](s32) |
| ; MIPS32: $v0 = COPY [[COPY4]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %2:_(s32) = COPY $a0 |
| %0:_(s16) = G_TRUNC %2(s32) |
| %3:_(s32) = COPY $a1 |
| %1:_(s16) = G_TRUNC %3(s32) |
| %4:_(s16) = G_AND %1, %0 |
| %5:_(s32) = G_ANYEXT %4(s16) |
| $v0 = COPY %5(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: and_i32 |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1 |
| |
| ; MIPS32-LABEL: name: and_i32 |
| ; MIPS32: liveins: $a0, $a1 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[COPY]] |
| ; MIPS32: $v0 = COPY [[AND]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %0:_(s32) = COPY $a0 |
| %1:_(s32) = COPY $a1 |
| %2:_(s32) = G_AND %1, %0 |
| $v0 = COPY %2(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: and_i64 |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1, $a2, $a3 |
| |
| ; MIPS32-LABEL: name: and_i64 |
| ; MIPS32: liveins: $a0, $a1, $a2, $a3 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 |
| ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3 |
| ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY]] |
| ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[COPY1]] |
| ; MIPS32: $v0 = COPY [[AND]](s32) |
| ; MIPS32: $v1 = COPY [[AND1]](s32) |
| ; MIPS32: RetRA implicit $v0, implicit $v1 |
| %2:_(s32) = COPY $a0 |
| %3:_(s32) = COPY $a1 |
| %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32) |
| %4:_(s32) = COPY $a2 |
| %5:_(s32) = COPY $a3 |
| %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32) |
| %6:_(s64) = G_AND %1, %0 |
| %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64) |
| $v0 = COPY %7(s32) |
| $v1 = COPY %8(s32) |
| RetRA implicit $v0, implicit $v1 |
| |
| ... |
| --- |
| name: or_i1 |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1 |
| |
| ; MIPS32-LABEL: name: or_i1 |
| ; MIPS32: liveins: $a0, $a1 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY2]], [[COPY3]] |
| ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[OR]](s32) |
| ; MIPS32: $v0 = COPY [[COPY4]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %2:_(s32) = COPY $a0 |
| %0:_(s1) = G_TRUNC %2(s32) |
| %3:_(s32) = COPY $a1 |
| %1:_(s1) = G_TRUNC %3(s32) |
| %4:_(s1) = G_OR %1, %0 |
| %5:_(s32) = G_ANYEXT %4(s1) |
| $v0 = COPY %5(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: or_i8 |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1 |
| |
| ; MIPS32-LABEL: name: or_i8 |
| ; MIPS32: liveins: $a0, $a1 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY2]], [[COPY3]] |
| ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[OR]](s32) |
| ; MIPS32: $v0 = COPY [[COPY4]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %2:_(s32) = COPY $a0 |
| %0:_(s8) = G_TRUNC %2(s32) |
| %3:_(s32) = COPY $a1 |
| %1:_(s8) = G_TRUNC %3(s32) |
| %4:_(s8) = G_OR %1, %0 |
| %5:_(s32) = G_ANYEXT %4(s8) |
| $v0 = COPY %5(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: or_i16 |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1 |
| |
| ; MIPS32-LABEL: name: or_i16 |
| ; MIPS32: liveins: $a0, $a1 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY2]], [[COPY3]] |
| ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[OR]](s32) |
| ; MIPS32: $v0 = COPY [[COPY4]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %2:_(s32) = COPY $a0 |
| %0:_(s16) = G_TRUNC %2(s32) |
| %3:_(s32) = COPY $a1 |
| %1:_(s16) = G_TRUNC %3(s32) |
| %4:_(s16) = G_OR %1, %0 |
| %5:_(s32) = G_ANYEXT %4(s16) |
| $v0 = COPY %5(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: or_i32 |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1 |
| |
| ; MIPS32-LABEL: name: or_i32 |
| ; MIPS32: liveins: $a0, $a1 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY1]], [[COPY]] |
| ; MIPS32: $v0 = COPY [[OR]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %0:_(s32) = COPY $a0 |
| %1:_(s32) = COPY $a1 |
| %2:_(s32) = G_OR %1, %0 |
| $v0 = COPY %2(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: or_i64 |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1, $a2, $a3 |
| |
| ; MIPS32-LABEL: name: or_i64 |
| ; MIPS32: liveins: $a0, $a1, $a2, $a3 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 |
| ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3 |
| ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY2]], [[COPY]] |
| ; MIPS32: [[OR1:%[0-9]+]]:_(s32) = G_OR [[COPY3]], [[COPY1]] |
| ; MIPS32: $v0 = COPY [[OR]](s32) |
| ; MIPS32: $v1 = COPY [[OR1]](s32) |
| ; MIPS32: RetRA implicit $v0, implicit $v1 |
| %2:_(s32) = COPY $a0 |
| %3:_(s32) = COPY $a1 |
| %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32) |
| %4:_(s32) = COPY $a2 |
| %5:_(s32) = COPY $a3 |
| %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32) |
| %6:_(s64) = G_OR %1, %0 |
| %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64) |
| $v0 = COPY %7(s32) |
| $v1 = COPY %8(s32) |
| RetRA implicit $v0, implicit $v1 |
| |
| ... |
| --- |
| name: xor_i1 |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1 |
| |
| ; MIPS32-LABEL: name: xor_i1 |
| ; MIPS32: liveins: $a0, $a1 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; MIPS32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY3]] |
| ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[XOR]](s32) |
| ; MIPS32: $v0 = COPY [[COPY4]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %2:_(s32) = COPY $a0 |
| %0:_(s1) = G_TRUNC %2(s32) |
| %3:_(s32) = COPY $a1 |
| %1:_(s1) = G_TRUNC %3(s32) |
| %4:_(s1) = G_XOR %1, %0 |
| %5:_(s32) = G_ANYEXT %4(s1) |
| $v0 = COPY %5(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: xor_i8 |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1 |
| |
| ; MIPS32-LABEL: name: xor_i8 |
| ; MIPS32: liveins: $a0, $a1 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; MIPS32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY3]] |
| ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[XOR]](s32) |
| ; MIPS32: $v0 = COPY [[COPY4]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %2:_(s32) = COPY $a0 |
| %0:_(s8) = G_TRUNC %2(s32) |
| %3:_(s32) = COPY $a1 |
| %1:_(s8) = G_TRUNC %3(s32) |
| %4:_(s8) = G_XOR %1, %0 |
| %5:_(s32) = G_ANYEXT %4(s8) |
| $v0 = COPY %5(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: xor_i16 |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1 |
| |
| ; MIPS32-LABEL: name: xor_i16 |
| ; MIPS32: liveins: $a0, $a1 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) |
| ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) |
| ; MIPS32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY3]] |
| ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[XOR]](s32) |
| ; MIPS32: $v0 = COPY [[COPY4]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %2:_(s32) = COPY $a0 |
| %0:_(s16) = G_TRUNC %2(s32) |
| %3:_(s32) = COPY $a1 |
| %1:_(s16) = G_TRUNC %3(s32) |
| %4:_(s16) = G_XOR %1, %0 |
| %5:_(s32) = G_ANYEXT %4(s16) |
| $v0 = COPY %5(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: xor_i32 |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1 |
| |
| ; MIPS32-LABEL: name: xor_i32 |
| ; MIPS32: liveins: $a0, $a1 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[COPY]] |
| ; MIPS32: $v0 = COPY [[XOR]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %0:_(s32) = COPY $a0 |
| %1:_(s32) = COPY $a1 |
| %2:_(s32) = G_XOR %1, %0 |
| $v0 = COPY %2(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: xor_i64 |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1, $a2, $a3 |
| |
| ; MIPS32-LABEL: name: xor_i64 |
| ; MIPS32: liveins: $a0, $a1, $a2, $a3 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 |
| ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3 |
| ; MIPS32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY]] |
| ; MIPS32: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[COPY3]], [[COPY1]] |
| ; MIPS32: $v0 = COPY [[XOR]](s32) |
| ; MIPS32: $v1 = COPY [[XOR1]](s32) |
| ; MIPS32: RetRA implicit $v0, implicit $v1 |
| %2:_(s32) = COPY $a0 |
| %3:_(s32) = COPY $a1 |
| %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32) |
| %4:_(s32) = COPY $a2 |
| %5:_(s32) = COPY $a3 |
| %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32) |
| %6:_(s64) = G_XOR %1, %0 |
| %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64) |
| $v0 = COPY %7(s32) |
| $v1 = COPY %8(s32) |
| RetRA implicit $v0, implicit $v1 |
| |
| ... |
| --- |
| name: shl |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0 |
| |
| ; MIPS32-LABEL: name: shl |
| ; MIPS32: liveins: $a0 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 |
| ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]] |
| ; MIPS32: $v0 = COPY [[SHL]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %0:_(s32) = COPY $a0 |
| %1:_(s32) = G_CONSTANT i32 1 |
| %2:_(s32) = G_SHL %0, %1 |
| $v0 = COPY %2(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: ashr |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0 |
| |
| ; MIPS32-LABEL: name: ashr |
| ; MIPS32: liveins: $a0 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 |
| ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]] |
| ; MIPS32: $v0 = COPY [[ASHR]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %0:_(s32) = COPY $a0 |
| %1:_(s32) = G_CONSTANT i32 1 |
| %2:_(s32) = G_ASHR %0, %1 |
| $v0 = COPY %2(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: lshr |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0 |
| |
| ; MIPS32-LABEL: name: lshr |
| ; MIPS32: liveins: $a0 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 |
| ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]] |
| ; MIPS32: $v0 = COPY [[LSHR]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %0:_(s32) = COPY $a0 |
| %1:_(s32) = G_CONSTANT i32 1 |
| %2:_(s32) = G_LSHR %0, %1 |
| $v0 = COPY %2(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: shlv |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1 |
| |
| ; MIPS32-LABEL: name: shlv |
| ; MIPS32: liveins: $a0, $a1 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY1]] |
| ; MIPS32: $v0 = COPY [[SHL]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %0:_(s32) = COPY $a0 |
| %1:_(s32) = COPY $a1 |
| %2:_(s32) = G_SHL %0, %1 |
| $v0 = COPY %2(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: ashrv |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1 |
| |
| ; MIPS32-LABEL: name: ashrv |
| ; MIPS32: liveins: $a0, $a1 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[COPY1]] |
| ; MIPS32: $v0 = COPY [[ASHR]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %0:_(s32) = COPY $a0 |
| %1:_(s32) = COPY $a1 |
| %2:_(s32) = G_ASHR %0, %1 |
| $v0 = COPY %2(s32) |
| RetRA implicit $v0 |
| |
| ... |
| --- |
| name: lshrv |
| alignment: 2 |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $a0, $a1 |
| |
| ; MIPS32-LABEL: name: lshrv |
| ; MIPS32: liveins: $a0, $a1 |
| ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 |
| ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 |
| ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY1]] |
| ; MIPS32: $v0 = COPY [[LSHR]](s32) |
| ; MIPS32: RetRA implicit $v0 |
| %0:_(s32) = COPY $a0 |
| %1:_(s32) = COPY $a1 |
| %2:_(s32) = G_LSHR %0, %1 |
| $v0 = COPY %2(s32) |
| RetRA implicit $v0 |
| |
| ... |