| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GCN %s |
| # RUN: FileCheck -check-prefix=ERR %s < %t |
| # RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GCN %s |
| # RUN: FileCheck -check-prefix=ERR %s < %t |
| |
| # ERR-NOT: remark: |
| # ERR: remark: <unknown>:0:0: cannot select: %2:sgpr(s32) = G_SMULH %0:sgpr, %1:sgpr (in function: smulh_s32_ss) |
| # ERR-NOT: remark: |
| |
| --- |
| name: smulh_s32_ss |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $sgpr0, $sgpr1 |
| ; GCN-LABEL: name: smulh_s32_ss |
| ; GCN: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 |
| ; GCN: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1 |
| ; GCN: [[SMULH:%[0-9]+]]:sgpr(s32) = G_SMULH [[COPY]], [[COPY1]] |
| ; GCN: S_ENDPGM 0, implicit [[SMULH]](s32) |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:sgpr(s32) = COPY $sgpr1 |
| %2:sgpr(s32) = G_SMULH %0, %1 |
| S_ENDPGM 0, implicit %2 |
| ... |
| |
| --- |
| name: smulh_s32_sv |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $sgpr0, $vgpr0 |
| ; GCN-LABEL: name: smulh_s32_sv |
| ; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0 |
| ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN: [[V_MUL_HI_I32_:%[0-9]+]]:vgpr_32 = V_MUL_HI_I32 [[COPY]], [[COPY1]], implicit $exec |
| ; GCN: S_ENDPGM 0, implicit [[V_MUL_HI_I32_]] |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:vgpr(s32) = COPY $vgpr0 |
| %2:vgpr(s32) = G_SMULH %0, %1 |
| S_ENDPGM 0, implicit %2 |
| ... |
| |
| --- |
| name: smulh_s32_vs |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $sgpr0, $vgpr0 |
| ; GCN-LABEL: name: smulh_s32_vs |
| ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0 |
| ; GCN: [[V_MUL_HI_I32_:%[0-9]+]]:vgpr_32 = V_MUL_HI_I32 [[COPY]], [[COPY1]], implicit $exec |
| ; GCN: S_ENDPGM 0, implicit [[V_MUL_HI_I32_]] |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:sgpr(s32) = COPY $sgpr0 |
| %2:vgpr(s32) = G_SMULH %0, %1 |
| S_ENDPGM 0, implicit %2 |
| ... |
| |
| --- |
| name: smulh_s32_vv |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| ; GCN-LABEL: name: smulh_s32_vv |
| ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; GCN: [[V_MUL_HI_I32_:%[0-9]+]]:vgpr_32 = V_MUL_HI_I32 [[COPY]], [[COPY1]], implicit $exec |
| ; GCN: S_ENDPGM 0, implicit [[V_MUL_HI_I32_]] |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:vgpr(s32) = COPY $vgpr1 |
| %2:vgpr(s32) = G_SMULH %0, %1 |
| S_ENDPGM 0, implicit %2 |
| ... |