commit 17d2bf7db1534b932c18866cea440693cf1404ff
author Simon Pilgrim <llvm-dev@redking.me.uk> Wed Mar 13 13:14:14 2019 +0000
committer Simon Pilgrim <llvm-dev@redking.me.uk> Wed Mar 13 13:14:14 2019 +0000
tree 3ddfef0d0c3ed655867690718ed670a94916bb8e
parent e853018a81d2c6fc41347a7daad37036bf0b9889

Fix signed/unsigned mismatch warning. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356046 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index fd7bfcb..e34fa5b 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -12033,7 +12033,7 @@
     SDValue BaseAddr = Ld->getOperand(1);
     EVT SVT = BroadcastVT.getScalarType();
     unsigned Offset = BroadcastIdx * SVT.getStoreSize();
-    assert((Offset * 8) == BitOffset && "Unexpected bit-offset");
+    assert((int)(Offset * 8) == BitOffset && "Unexpected bit-offset");
     SDValue NewAddr = DAG.getMemBasePlusOffset(BaseAddr, Offset, DL);
     V = DAG.getLoad(SVT, DL, Ld->getChain(), NewAddr,
                     DAG.getMachineFunction().getMachineMemOperand(