Revert r354606, it breaks asan tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354609 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Hexagon/HexagonInstrInfo.cpp b/lib/Target/Hexagon/HexagonInstrInfo.cpp
index 68e4ade..b0b0296 100644
--- a/lib/Target/Hexagon/HexagonInstrInfo.cpp
+++ b/lib/Target/Hexagon/HexagonInstrInfo.cpp
@@ -1313,38 +1313,6 @@
return true;
}
- case Hexagon::PS_crash: {
- // Generate a misaligned load that is guaranteed to cause a crash.
- class CrashPseudoSourceValue : public PseudoSourceValue {
- public:
- CrashPseudoSourceValue(const TargetInstrInfo &TII)
- : PseudoSourceValue(TargetCustom, TII) {}
-
- bool isConstant(const MachineFrameInfo *) const override {
- return false;
- }
- bool isAliased(const MachineFrameInfo *) const override {
- return false;
- }
- bool mayAlias(const MachineFrameInfo *) const override {
- return false;
- }
- void printCustom(raw_ostream &OS) const override {
- OS << "MisalignedCrash";
- }
- };
-
- static const CrashPseudoSourceValue CrashPSV(*this);
- MachineMemOperand *MMO = MF.getMachineMemOperand(
- MachinePointerInfo(&CrashPSV),
- MachineMemOperand::MOLoad | MachineMemOperand::MOVolatile, 8, 1);
- BuildMI(MBB, MI, DL, get(Hexagon::PS_loadrdabs), Hexagon::D13)
- .addImm(0xBADC0FEE) // Misaligned load.
- .addMemOperand(MMO);
- MBB.erase(MI);
- break;
- }
-
case Hexagon::PS_tailcall_i:
MI.setDesc(get(Hexagon::J2_jump));
return true;
diff --git a/lib/Target/Hexagon/HexagonPatterns.td b/lib/Target/Hexagon/HexagonPatterns.td
index 9a7fda3..5c70970 100644
--- a/lib/Target/Hexagon/HexagonPatterns.td
+++ b/lib/Target/Hexagon/HexagonPatterns.td
@@ -3081,7 +3081,7 @@
def HexagonBARRIER: SDNode<"HexagonISD::BARRIER", SDTNone, [SDNPHasChain]>;
def: Pat<(HexagonBARRIER), (Y2_barrier)>;
-def: Pat<(trap), (PS_crash)>;
+def: Pat<(trap), (J2_trap0 (i32 0))>;
// Read cycle counter.
def SDTInt64Leaf: SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
diff --git a/lib/Target/Hexagon/HexagonPseudo.td b/lib/Target/Hexagon/HexagonPseudo.td
index 7dd25d7..50900d8 100644
--- a/lib/Target/Hexagon/HexagonPseudo.td
+++ b/lib/Target/Hexagon/HexagonPseudo.td
@@ -559,8 +559,3 @@
defm PS_storerf : NewCircularStore<IntRegs, HalfWordAccess>;
defm PS_storeri : NewCircularStore<IntRegs, WordAccess>;
defm PS_storerd : NewCircularStore<DoubleRegs, WordAccess>;
-
-// A pseudo that generates a runtime crash. This is used to implement
-// __builtin_trap.
-let hasSideEffects = 1, isPseudo = 1, isCodeGenOnly = 1, isSolo = 1 in
-def PS_crash: InstHexagon<(outs), (ins), "", [], "", PSEUDO, TypePSEUDO>;
diff --git a/test/CodeGen/Hexagon/trap-crash.ll b/test/CodeGen/Hexagon/trap-crash.ll
deleted file mode 100644
index e940d98..0000000
--- a/test/CodeGen/Hexagon/trap-crash.ll
+++ /dev/null
@@ -1,20 +0,0 @@
-; RUN: llc -march=hexagon < %s | FileCheck %s
-
-; Generate code that is guaranteed to crash. At the moment, it's a
-; misaligned load.
-; CHECK: memd(##3134984174)
-
-target triple = "hexagon"
-
-; Function Attrs: noreturn nounwind
-define i32 @f0() #0 {
-entry:
- tail call void @llvm.trap()
- unreachable
-}
-
-; Function Attrs: cold noreturn nounwind
-declare void @llvm.trap() #1
-
-attributes #0 = { noreturn nounwind "target-cpu"="hexagonv60" }
-attributes #1 = { cold noreturn nounwind }
diff --git a/test/CodeGen/Hexagon/trap-unreachable.ll b/test/CodeGen/Hexagon/trap-unreachable.ll
index b14f1e3..124b37a 100644
--- a/test/CodeGen/Hexagon/trap-unreachable.ll
+++ b/test/CodeGen/Hexagon/trap-unreachable.ll
@@ -1,7 +1,5 @@
; RUN: llc -march=hexagon -trap-unreachable < %s | FileCheck %s
-
-; Trap is implemented via a misaligned load.
-; CHECK: memd(##3134984174)
+; CHECK: trap
define void @fred() #0 {
unreachable
