| //===- ARC.td - Describe the ARC Target Machine ------------*- tablegen -*-===// |
| // |
| // The LLVM Compiler Infrastructure |
| // |
| // This file is distributed under the University of Illinois Open Source |
| // License. See LICENSE.TXT for details. |
| // |
| //===----------------------------------------------------------------------===// |
| |
| include "llvm/Target/Target.td" |
| |
| include "ARCRegisterInfo.td" |
| include "ARCInstrInfo.td" |
| include "ARCCallingConv.td" |
| |
| def ARCInstrInfo : InstrInfo; |
| |
| class Proc<string Name, list<SubtargetFeature> Features> |
| : Processor<Name, NoItineraries, Features>; |
| |
| def : Proc<"generic", []>; |
| |
| def ARC : Target { |
| let InstructionSet = ARCInstrInfo; |
| } |
