| # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py |
| # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=500 < %s | FileCheck %s |
| |
| # LLVM-MCA-BEGIN |
| vpinsrb $0, %eax, %xmm0, %xmm0 |
| vpinsrb $1, %eax, %xmm0, %xmm0 |
| # LLVM-MCA-END |
| |
| # LLVM-MCA-BEGIN |
| vpinsrw $0, %eax, %xmm0, %xmm0 |
| vpinsrw $1, %eax, %xmm0, %xmm0 |
| # LLVM-MCA-END |
| |
| # LLVM-MCA-BEGIN |
| vpinsrd $0, %eax, %xmm0, %xmm0 |
| vpinsrd $1, %eax, %xmm0, %xmm0 |
| # LLVM-MCA-END |
| |
| # LLVM-MCA-BEGIN |
| vpinsrq $0, %rax, %xmm0, %xmm0 |
| vpinsrq $1, %rax, %xmm0, %xmm0 |
| # LLVM-MCA-END |
| |
| # CHECK: [0] Code Region |
| |
| # CHECK: Iterations: 500 |
| # CHECK-NEXT: Instructions: 1000 |
| # CHECK-NEXT: Total Cycles: 2003 |
| # CHECK-NEXT: Total uOps: 2000 |
| |
| # CHECK: Dispatch Width: 4 |
| # CHECK-NEXT: uOps Per Cycle: 1.00 |
| # CHECK-NEXT: IPC: 0.50 |
| # CHECK-NEXT: Block RThroughput: 1.0 |
| |
| # CHECK: Instruction Info: |
| # CHECK-NEXT: [1]: #uOps |
| # CHECK-NEXT: [2]: Latency |
| # CHECK-NEXT: [3]: RThroughput |
| # CHECK-NEXT: [4]: MayLoad |
| # CHECK-NEXT: [5]: MayStore |
| # CHECK-NEXT: [6]: HasSideEffects (U) |
| |
| # CHECK: [1] [2] [3] [4] [5] [6] Instructions: |
| # CHECK-NEXT: 2 12 0.50 vpinsrb $0, %eax, %xmm0, %xmm0 |
| # CHECK-NEXT: 2 12 0.50 vpinsrb $1, %eax, %xmm0, %xmm0 |
| |
| # CHECK: Resources: |
| # CHECK-NEXT: [0.0] - PdAGLU01 |
| # CHECK-NEXT: [0.1] - PdAGLU01 |
| # CHECK-NEXT: [1] - PdBranch |
| # CHECK-NEXT: [2] - PdCount |
| # CHECK-NEXT: [3] - PdDiv |
| # CHECK-NEXT: [4] - PdEX0 |
| # CHECK-NEXT: [5] - PdEX1 |
| # CHECK-NEXT: [6] - PdFPCVT |
| # CHECK-NEXT: [7.0] - PdFPFMA |
| # CHECK-NEXT: [7.1] - PdFPFMA |
| # CHECK-NEXT: [8.0] - PdFPMAL |
| # CHECK-NEXT: [8.1] - PdFPMAL |
| # CHECK-NEXT: [9] - PdFPMMA |
| # CHECK-NEXT: [10] - PdFPSTO |
| # CHECK-NEXT: [11] - PdFPU0 |
| # CHECK-NEXT: [12] - PdFPU1 |
| # CHECK-NEXT: [13] - PdFPU2 |
| # CHECK-NEXT: [14] - PdFPU3 |
| # CHECK-NEXT: [15] - PdFPXBR |
| # CHECK-NEXT: [16.0] - PdLoad |
| # CHECK-NEXT: [16.1] - PdLoad |
| # CHECK-NEXT: [17] - PdMul |
| # CHECK-NEXT: [18] - PdStore |
| |
| # CHECK: Resource pressure per iteration: |
| # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] |
| # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - - 1.00 1.00 - - - - - - - |
| |
| # CHECK: Resource pressure by instruction: |
| # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] Instructions: |
| # CHECK-NEXT: - - - - - - - - - - - 1.00 - - - 1.00 - - - - - - - vpinsrb $0, %eax, %xmm0, %xmm0 |
| # CHECK-NEXT: - - - - - - - - - - 1.00 - - - 1.00 - - - - - - - - vpinsrb $1, %eax, %xmm0, %xmm0 |
| |
| # CHECK: [1] Code Region |
| |
| # CHECK: Iterations: 500 |
| # CHECK-NEXT: Instructions: 1000 |
| # CHECK-NEXT: Total Cycles: 2003 |
| # CHECK-NEXT: Total uOps: 2000 |
| |
| # CHECK: Dispatch Width: 4 |
| # CHECK-NEXT: uOps Per Cycle: 1.00 |
| # CHECK-NEXT: IPC: 0.50 |
| # CHECK-NEXT: Block RThroughput: 1.0 |
| |
| # CHECK: Instruction Info: |
| # CHECK-NEXT: [1]: #uOps |
| # CHECK-NEXT: [2]: Latency |
| # CHECK-NEXT: [3]: RThroughput |
| # CHECK-NEXT: [4]: MayLoad |
| # CHECK-NEXT: [5]: MayStore |
| # CHECK-NEXT: [6]: HasSideEffects (U) |
| |
| # CHECK: [1] [2] [3] [4] [5] [6] Instructions: |
| # CHECK-NEXT: 2 12 0.50 vpinsrw $0, %eax, %xmm0, %xmm0 |
| # CHECK-NEXT: 2 12 0.50 vpinsrw $1, %eax, %xmm0, %xmm0 |
| |
| # CHECK: Resources: |
| # CHECK-NEXT: [0.0] - PdAGLU01 |
| # CHECK-NEXT: [0.1] - PdAGLU01 |
| # CHECK-NEXT: [1] - PdBranch |
| # CHECK-NEXT: [2] - PdCount |
| # CHECK-NEXT: [3] - PdDiv |
| # CHECK-NEXT: [4] - PdEX0 |
| # CHECK-NEXT: [5] - PdEX1 |
| # CHECK-NEXT: [6] - PdFPCVT |
| # CHECK-NEXT: [7.0] - PdFPFMA |
| # CHECK-NEXT: [7.1] - PdFPFMA |
| # CHECK-NEXT: [8.0] - PdFPMAL |
| # CHECK-NEXT: [8.1] - PdFPMAL |
| # CHECK-NEXT: [9] - PdFPMMA |
| # CHECK-NEXT: [10] - PdFPSTO |
| # CHECK-NEXT: [11] - PdFPU0 |
| # CHECK-NEXT: [12] - PdFPU1 |
| # CHECK-NEXT: [13] - PdFPU2 |
| # CHECK-NEXT: [14] - PdFPU3 |
| # CHECK-NEXT: [15] - PdFPXBR |
| # CHECK-NEXT: [16.0] - PdLoad |
| # CHECK-NEXT: [16.1] - PdLoad |
| # CHECK-NEXT: [17] - PdMul |
| # CHECK-NEXT: [18] - PdStore |
| |
| # CHECK: Resource pressure per iteration: |
| # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] |
| # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - - 1.00 1.00 - - - - - - - |
| |
| # CHECK: Resource pressure by instruction: |
| # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] Instructions: |
| # CHECK-NEXT: - - - - - - - - - - - 1.00 - - - 1.00 - - - - - - - vpinsrw $0, %eax, %xmm0, %xmm0 |
| # CHECK-NEXT: - - - - - - - - - - 1.00 - - - 1.00 - - - - - - - - vpinsrw $1, %eax, %xmm0, %xmm0 |
| |
| # CHECK: [2] Code Region |
| |
| # CHECK: Iterations: 500 |
| # CHECK-NEXT: Instructions: 1000 |
| # CHECK-NEXT: Total Cycles: 2003 |
| # CHECK-NEXT: Total uOps: 2000 |
| |
| # CHECK: Dispatch Width: 4 |
| # CHECK-NEXT: uOps Per Cycle: 1.00 |
| # CHECK-NEXT: IPC: 0.50 |
| # CHECK-NEXT: Block RThroughput: 1.0 |
| |
| # CHECK: Instruction Info: |
| # CHECK-NEXT: [1]: #uOps |
| # CHECK-NEXT: [2]: Latency |
| # CHECK-NEXT: [3]: RThroughput |
| # CHECK-NEXT: [4]: MayLoad |
| # CHECK-NEXT: [5]: MayStore |
| # CHECK-NEXT: [6]: HasSideEffects (U) |
| |
| # CHECK: [1] [2] [3] [4] [5] [6] Instructions: |
| # CHECK-NEXT: 2 12 0.50 vpinsrd $0, %eax, %xmm0, %xmm0 |
| # CHECK-NEXT: 2 12 0.50 vpinsrd $1, %eax, %xmm0, %xmm0 |
| |
| # CHECK: Resources: |
| # CHECK-NEXT: [0.0] - PdAGLU01 |
| # CHECK-NEXT: [0.1] - PdAGLU01 |
| # CHECK-NEXT: [1] - PdBranch |
| # CHECK-NEXT: [2] - PdCount |
| # CHECK-NEXT: [3] - PdDiv |
| # CHECK-NEXT: [4] - PdEX0 |
| # CHECK-NEXT: [5] - PdEX1 |
| # CHECK-NEXT: [6] - PdFPCVT |
| # CHECK-NEXT: [7.0] - PdFPFMA |
| # CHECK-NEXT: [7.1] - PdFPFMA |
| # CHECK-NEXT: [8.0] - PdFPMAL |
| # CHECK-NEXT: [8.1] - PdFPMAL |
| # CHECK-NEXT: [9] - PdFPMMA |
| # CHECK-NEXT: [10] - PdFPSTO |
| # CHECK-NEXT: [11] - PdFPU0 |
| # CHECK-NEXT: [12] - PdFPU1 |
| # CHECK-NEXT: [13] - PdFPU2 |
| # CHECK-NEXT: [14] - PdFPU3 |
| # CHECK-NEXT: [15] - PdFPXBR |
| # CHECK-NEXT: [16.0] - PdLoad |
| # CHECK-NEXT: [16.1] - PdLoad |
| # CHECK-NEXT: [17] - PdMul |
| # CHECK-NEXT: [18] - PdStore |
| |
| # CHECK: Resource pressure per iteration: |
| # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] |
| # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - - 1.00 1.00 - - - - - - - |
| |
| # CHECK: Resource pressure by instruction: |
| # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] Instructions: |
| # CHECK-NEXT: - - - - - - - - - - - 1.00 - - - 1.00 - - - - - - - vpinsrd $0, %eax, %xmm0, %xmm0 |
| # CHECK-NEXT: - - - - - - - - - - 1.00 - - - 1.00 - - - - - - - - vpinsrd $1, %eax, %xmm0, %xmm0 |
| |
| # CHECK: [3] Code Region |
| |
| # CHECK: Iterations: 500 |
| # CHECK-NEXT: Instructions: 1000 |
| # CHECK-NEXT: Total Cycles: 2003 |
| # CHECK-NEXT: Total uOps: 2000 |
| |
| # CHECK: Dispatch Width: 4 |
| # CHECK-NEXT: uOps Per Cycle: 1.00 |
| # CHECK-NEXT: IPC: 0.50 |
| # CHECK-NEXT: Block RThroughput: 1.0 |
| |
| # CHECK: Instruction Info: |
| # CHECK-NEXT: [1]: #uOps |
| # CHECK-NEXT: [2]: Latency |
| # CHECK-NEXT: [3]: RThroughput |
| # CHECK-NEXT: [4]: MayLoad |
| # CHECK-NEXT: [5]: MayStore |
| # CHECK-NEXT: [6]: HasSideEffects (U) |
| |
| # CHECK: [1] [2] [3] [4] [5] [6] Instructions: |
| # CHECK-NEXT: 2 12 0.50 vpinsrq $0, %rax, %xmm0, %xmm0 |
| # CHECK-NEXT: 2 12 0.50 vpinsrq $1, %rax, %xmm0, %xmm0 |
| |
| # CHECK: Resources: |
| # CHECK-NEXT: [0.0] - PdAGLU01 |
| # CHECK-NEXT: [0.1] - PdAGLU01 |
| # CHECK-NEXT: [1] - PdBranch |
| # CHECK-NEXT: [2] - PdCount |
| # CHECK-NEXT: [3] - PdDiv |
| # CHECK-NEXT: [4] - PdEX0 |
| # CHECK-NEXT: [5] - PdEX1 |
| # CHECK-NEXT: [6] - PdFPCVT |
| # CHECK-NEXT: [7.0] - PdFPFMA |
| # CHECK-NEXT: [7.1] - PdFPFMA |
| # CHECK-NEXT: [8.0] - PdFPMAL |
| # CHECK-NEXT: [8.1] - PdFPMAL |
| # CHECK-NEXT: [9] - PdFPMMA |
| # CHECK-NEXT: [10] - PdFPSTO |
| # CHECK-NEXT: [11] - PdFPU0 |
| # CHECK-NEXT: [12] - PdFPU1 |
| # CHECK-NEXT: [13] - PdFPU2 |
| # CHECK-NEXT: [14] - PdFPU3 |
| # CHECK-NEXT: [15] - PdFPXBR |
| # CHECK-NEXT: [16.0] - PdLoad |
| # CHECK-NEXT: [16.1] - PdLoad |
| # CHECK-NEXT: [17] - PdMul |
| # CHECK-NEXT: [18] - PdStore |
| |
| # CHECK: Resource pressure per iteration: |
| # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] |
| # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - - 1.00 1.00 - - - - - - - |
| |
| # CHECK: Resource pressure by instruction: |
| # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] Instructions: |
| # CHECK-NEXT: - - - - - - - - - - - 1.00 - - - 1.00 - - - - - - - vpinsrq $0, %rax, %xmm0, %xmm0 |
| # CHECK-NEXT: - - - - - - - - - - 1.00 - - - 1.00 - - - - - - - - vpinsrq $1, %rax, %xmm0, %xmm0 |
