test/CodeGen/Mips/GlobalISel/legalizer/mul.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |

  define void @mul_i32() {entry: ret void}
  define void @mul_i8_sext() {entry: ret void}
  define void @mul_i8_zext() {entry: ret void}
  define void @mul_i8_aext() {entry: ret void}
  define void @mul_i16_sext() {entry: ret void}
  define void @mul_i16_zext() {entry: ret void}
  define void @mul_i16_aext() {entry: ret void}

...
---
name:            mul_i32
alignment:       2
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: mul_i32
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
    ; MIPS32: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY]], [[COPY1]]
    ; MIPS32: $v0 = COPY [[MUL]](s32)
    ; MIPS32: RetRA implicit $v0
    %0:_(s32) = COPY $a0
    %1:_(s32) = COPY $a1
    %2:_(s32) = G_MUL %0, %1
    $v0 = COPY %2(s32)
    RetRA implicit $v0

...
---
name:            mul_i8_sext
alignment:       2
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: mul_i8_sext
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; MIPS32: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY2]], [[COPY3]]
    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[MUL]](s32)
    ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY4]], [[C]](s32)
    ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
    ; MIPS32: $v0 = COPY [[ASHR]](s32)
    ; MIPS32: RetRA implicit $v0
    %2:_(s32) = COPY $a0
    %0:_(s8) = G_TRUNC %2(s32)
    %3:_(s32) = COPY $a1
    %1:_(s8) = G_TRUNC %3(s32)
    %4:_(s8) = G_MUL %1, %0
    %5:_(s32) = G_SEXT %4(s8)
    $v0 = COPY %5(s32)
    RetRA implicit $v0

...
---
name:            mul_i8_zext
alignment:       2
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: mul_i8_zext
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; MIPS32: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY2]], [[COPY3]]
    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[MUL]](s32)
    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C]]
    ; MIPS32: $v0 = COPY [[AND]](s32)
    ; MIPS32: RetRA implicit $v0
    %2:_(s32) = COPY $a0
    %0:_(s8) = G_TRUNC %2(s32)
    %3:_(s32) = COPY $a1
    %1:_(s8) = G_TRUNC %3(s32)
    %4:_(s8) = G_MUL %1, %0
    %5:_(s32) = G_ZEXT %4(s8)
    $v0 = COPY %5(s32)
    RetRA implicit $v0

...
---
name:            mul_i8_aext
alignment:       2
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: mul_i8_aext
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; MIPS32: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY2]], [[COPY3]]
    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[MUL]](s32)
    ; MIPS32: $v0 = COPY [[COPY4]](s32)
    ; MIPS32: RetRA implicit $v0
    %2:_(s32) = COPY $a0
    %0:_(s8) = G_TRUNC %2(s32)
    %3:_(s32) = COPY $a1
    %1:_(s8) = G_TRUNC %3(s32)
    %4:_(s8) = G_MUL %1, %0
    %5:_(s32) = G_ANYEXT %4(s8)
    $v0 = COPY %5(s32)
    RetRA implicit $v0

...
---
name:            mul_i16_sext
alignment:       2
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: mul_i16_sext
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; MIPS32: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY2]], [[COPY3]]
    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[MUL]](s32)
    ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY4]], [[C]](s32)
    ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
    ; MIPS32: $v0 = COPY [[ASHR]](s32)
    ; MIPS32: RetRA implicit $v0
    %2:_(s32) = COPY $a0
    %0:_(s16) = G_TRUNC %2(s32)
    %3:_(s32) = COPY $a1
    %1:_(s16) = G_TRUNC %3(s32)
    %4:_(s16) = G_MUL %1, %0
    %5:_(s32) = G_SEXT %4(s16)
    $v0 = COPY %5(s32)
    RetRA implicit $v0

...
---
name:            mul_i16_zext
alignment:       2
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: mul_i16_zext
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; MIPS32: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY2]], [[COPY3]]
    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[MUL]](s32)
    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C]]
    ; MIPS32: $v0 = COPY [[AND]](s32)
    ; MIPS32: RetRA implicit $v0
    %2:_(s32) = COPY $a0
    %0:_(s16) = G_TRUNC %2(s32)
    %3:_(s32) = COPY $a1
    %1:_(s16) = G_TRUNC %3(s32)
    %4:_(s16) = G_MUL %1, %0
    %5:_(s32) = G_ZEXT %4(s16)
    $v0 = COPY %5(s32)
    RetRA implicit $v0

...
---
name:            mul_i16_aext
alignment:       2
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: mul_i16_aext
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; MIPS32: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY2]], [[COPY3]]
    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[MUL]](s32)
    ; MIPS32: $v0 = COPY [[COPY4]](s32)
    ; MIPS32: RetRA implicit $v0
    %2:_(s32) = COPY $a0
    %0:_(s16) = G_TRUNC %2(s32)
    %3:_(s32) = COPY $a1
    %1:_(s16) = G_TRUNC %3(s32)
    %4:_(s16) = G_MUL %1, %0
    %5:_(s32) = G_ANYEXT %4(s16)
    $v0 = COPY %5(s32)
    RetRA implicit $v0

...