Google Git
Sign in
llvm / llvm-project / llvm / HEAD
  1. cb18ba9 Revert "[SLP]Attempt to vectorize long stores, if short one failed." by Nikita Popov · 2 weeks ago
  2. 6aaf1d8 [SelectionDAG] Add some validation of (S/U)(ADD/SUB)O_CARRY nodes. (#89133) by Craig Topper · 2 weeks ago
  3. a8bc1c3 [Support] Report EISDIR when opening a directory (#79880) by azhan92 · 2 weeks ago
  4. 3437398 [RISCV] Add coverage of add (mul X, C), Y oppurtunity using shNadd by Philip Reames · 2 weeks ago
  5. b3245e7 [InstCombine] Don't use dominating conditions to transform sub into xor. (#88566) by Craig Topper · 2 weeks ago
  6. 64780f4 [LiveIns] Improve recomputeLiveIns() (#88951) by Kai Nacke · 2 weeks ago
  7. 079e7f7 CodeGenPrepare: Add support for llvm.threadlocal.address address-mode sinking (#87844) by Matthias Braun · 2 weeks ago
  8. 0f046bf AMDGPU: Fix not handling atomicrmw fadd in exotic address spaces correctly by Matt Arsenault · 2 weeks ago
  9. b3762e1 [gn build] Manually port d423d80e560d by Arthur Eubanks · 2 weeks ago
  10. 1d2d1a3 [X86] Always use 64-bit relocations in no-PIC large code model (#89101) by Arthur Eubanks · 2 weeks ago
  11. 51c9d5a [llvm][NVPTX] Don't emit unused var 'temp_param_reg' (NFC) (#89004) by Youngsuk Kim · 2 weeks ago
  12. 683c607 [AArch64] Add some test cases for LD2/LD3/LD4 shuffles. NFC by David Green · 2 weeks ago
  13. 3dc6a55 [AArch64] Update latencies for Cortex-A510 scheduling model (#87293) by Usman Nadeem · 2 weeks ago
  14. 3a94463 [RISCV] Add coverage for strength reduction of mul by small negative immediates by Philip Reames · 2 weeks ago
  15. b895b4e [CostModel][X86] Recognise vector rotation by uniform constant patterns by Simon Pilgrim · 2 weeks ago
  16. fe8638c [InstCombine] Add phase ordering test for #88239. NFC by Craig Topper · 2 weeks ago
  17. c70626c [InstCombine] Add test case for turning sub into xor using dominating condition. NFC by Craig Topper · 3 weeks ago
  18. 6b7d2f0 [GlobalISel][AArch64] Add LLRINT support (#88702) by David Green · 2 weeks ago
  19. d979e63 [InstCombine] Use `auto *` instead of `auto` in `visitSIToFP`; NFC by Noah Goldstein · 2 weeks ago
  20. 3eb4d91 [CostModel][X86] Add basic GFNI target test coverage for shift/rotate costs by Simon Pilgrim · 2 weeks ago
  21. debf4a4 [SLP]Attempt to vectorize long stores, if short one failed. by Alexey Bataev · 2 weeks ago
  22. 175ff50 [RISCV] Fix typo in RISCVScheduleV.td that was introduced in 60a1158 by Michael Maitland · 2 weeks ago
  23. 385b977 [FMV] Remove useless features according the latest ACLE spec. (#88965) by Alexandros Lamprineas · 2 weeks ago
  24. 1017509 [compiler-rt] Use __atomic builtins whenever possible by Alexander Richardson · 2 weeks ago
  25. d6fdd30 [VPlan] Check for VPWidenLoadRecipe directly in truncateToMinBW. (NFCI). by Florian Hahn · 2 weeks ago
  26. 1bb0c96 [VectorCombine] Remove single quotes from "-passes=vector-combine" by Simon Pilgrim · 2 weeks ago
  27. e74185a [CostModel][X86] Update BITREVERSE costs for GFNI targets by Simon Pilgrim · 2 weeks ago
  28. 9e62351 [AMDGPU] Fix predicates for BUFFER_ATOMIC_FMIN/FMAX patterns (#89066) by Jay Foad · 2 weeks ago
  29. cb94cc1 [VPlan] Factor out helper to recursively collect all users (NFCI). by Florian Hahn · 2 weeks ago
  30. 9478cc7 [RISCV] Explicitly bail if something modifies VL/VTYPE in doLocalPostpass by Luke Lau · 2 weeks ago
  31. 46d078f [PowerPC] 32-bit large code-model support for toc-data (#85129) by Zaara Syeda · 2 weeks ago
  32. 7288aff [RISCV] Add test for doLocalPostpass issue not checking if VL was modified. NFC by Luke Lau · 2 weeks ago
  33. 04b9b15 [LLVM][CodeGen] Fix register lane liveness tracking in RegisterPressure (#88892) by Krzysztof Parzyszek · 2 weeks ago
  34. ca0461d [Inline] Regenerate inline-switch-default-2.ll (NFC) by DianQK · 2 weeks ago
  35. 34eecd3 [AMDGPU][Docs] Fix broken link to HRF memory model reference (#88696) by Fabian Ritter · 2 weeks ago
  36. bf14996 [VP] Correct lowering of predicated fma and faddmul to avoid strictfp. (#85272) by Kevin P. Neal · 2 weeks ago
  37. 37e539e [TailDuplicator] Add maximum predecessors and successors to consider tail duplicating blocks (#78582) by Quentin Dian · 2 weeks ago
  38. 7fa22a0 [RISCV] Fix clang-tidy warning about else after return. NFC by Luke Lau · 2 weeks ago
  39. efde4d4 [X86] vector-shuffle-combining-sse41.ll - add missing AVX1/2/512 check prefixes by Simon Pilgrim · 2 weeks ago
  40. b08f1e4 [RemoveDIs] Update update_test_checks script to recognize dbg_records (#87388) by Stephen Tozer · 2 weeks ago
  41. cf9aa3b [RISCV] Assert only valid AVLs in doLocalPostpass are X0 or virtual regs. NFC by Luke Lau · 2 weeks ago
  42. 9afb38a [MLIR][Flang][OpenMP] Make omp.simdloop into a loop wrapper (#87365) by Sergio Afonso · 2 weeks ago
  43. 1d3053e update_test_checks: keep names stable with generated functions (#87988) by Nicolai Hähnle · 2 weeks ago
  44. b3daa74 [VPlan] Split VPWidenMemoryInstructionRecipe (NFCI). (#87411) by Florian Hahn · 2 weeks ago
  45. 3e55381 [LV][NFC] Remove the declaration of function `fixReduction`. (#88491) by Mel Chen · 2 weeks ago
  46. aa8404f [SPIR-V] Account for zext in a llvm intrinsic call (#88903) by Vyacheslav Levytskyy · 2 weeks ago
  47. 9bb555a [SPIR-V] Improve Tablegen instruction selection and account for a pointer size of the target (#88725) by Vyacheslav Levytskyy · 2 weeks ago
  48. 74aa3a0 [PatternMatch] Do not accept undef elements in m_AllOnes() and friends (#88217) by Nikita Popov · 2 weeks ago
  49. 8e8497d Move gfni for bitreverse check out of SSSE3. (#88938) by shamithoke · 2 weeks ago
  50. 050c029 [X86][NFC] Add test cases for pr88958 by Phoebe Wang · 2 weeks ago
  51. 13f660a AMDGPU: Move libcall simplify into PeepholeEP (#88853) by Matt Arsenault · 2 weeks ago
  52. c5f8dea [RISCV] Support Zama16b1p0 (#88474) by Jesse Huang · 2 weeks ago
  53. 51bfa1b [RISCV] Simplify FindRegWithEncoding in copyPhysRegVector. NFC (#89001) by Craig Topper · 2 weeks ago
  54. d6a8856 [memprof] Simplify IndexedMemProfRecord::operator== (NFC) (#88986) by Kazu Hirata · 2 weeks ago
  55. bba01bd [RISCV] Add CFI information for vector callee-saved registers (#86811) by Brandon Wu · 2 weeks ago
  56. 8ec41ec [RISCV] Convert VTYPE operand check to assert in RISCVInsertVSETVLI. NFC by Luke Lau · 2 weeks ago
  57. 66c7c5e [TableGen][InstrInfoEmitter] Count sub-operands on def operands by Michael Liao · 2 weeks ago
  58. 393a277 [Sparc] Fix instr desc of special register stores by Michael Liao · 2 weeks ago
  59. cd8f006 Revert "[SLP]Attempt to vectorize long stores, if short one failed." by Nikita Popov · 2 weeks ago
  60. b0782bd Update foldFMulReassoc to respect absent fast-math flags (#88589) by Andy Kaylor · 2 weeks ago
  61. 6450601 [X86] Fix instr desc of CFCMOV's 'mr' variants by darkbuck · 2 weeks ago
  62. d97c89d2 [RISCV] Re-separate unaligned scalar and vector memory features in the backend. (#88954) by Craig Topper · 2 weeks ago
  63. 346ed2f [memprof] Use SizeIs (NFC) (#88984) by Kazu Hirata · 2 weeks ago
  64. 78fa372 [ValueTracking] Implement `computeKnownFPClass` for `llvm.vector.reduce.{fmin,fmax,fmaximum,fminimum}` by Noah Goldstein · 3 weeks ago
  65. 46faff7 [ValueTracking] Add tests for `computeKnownFPClass` of `llvm.vector.reduce.{fmin,fmax,fmaximum,fminimum}`; NFC by Noah Goldstein · 3 weeks ago
  66. af639ae Revert "Reapply "[LV] Improve AnyOf reduction codegen. (#78304)"" by Arthur Eubanks · 2 weeks ago
  67. 2b9bdfd [RISCV] Enable mul strength reduction for XTheadBa by Philip Reames · 2 weeks ago
  68. 0d11526 [InstCombine] Add canonicalization of `sitofp` -> `uitofp nneg` by Noah Goldstein · 6 weeks ago
  69. ce05b0f1 [VPlan] Don't mark VPBlendRecipe as phi-like. by Florian Hahn · 2 weeks ago
  70. 5e313c8 update_test_checks: remove an unused function by Nicolai Hähnle · 4 weeks ago
  71. 223ee7e update_test_checks: add new test by Nicolai Hähnle · 4 weeks ago
  72. 671ccbe update_test_checks: pre-commit a new test by Nicolai Hähnle · 3 weeks ago
  73. b16410c [X86] Change how we treat functions with explicit sections as small/large (#88172) by Arthur Eubanks · 2 weeks ago
  74. 63baefc [llvm] Drop unaligned from calls to readNext (NFC) (#88841) by Kazu Hirata · 2 weeks ago
  75. d6ef726 [gn build] Port 9ec8c961664d by LLVM GN Syncbot · 2 weeks ago
  76. 15f4121 [SLP]Attempt to vectorize long stores, if short one failed. by Alexey Bataev · 2 weeks ago
  77. c4a424a [SLP]Keep externally used GEPs as GEPs, if possible instead of extractelement. by Alexey Bataev · 2 weeks ago
  78. c20765a [memprof] Add another constructor to MemProfReader (#88952) by Kazu Hirata · 2 weeks ago
  79. 71100d3 [RISCV] Add coverage for strength reduction of mul as 2^N - 2^M by Philip Reames · 2 weeks ago
  80. 349fcfd [InstCombine] Update `vector_reduce_and` tests to actually use `llvm.vector.reduce.and`; NFC by Noah Goldstein · 2 weeks ago
  81. fbb26ab [gn] port 22629bb22a1b by Nico Weber · 2 weeks ago
  82. bbe9514 [RISCV] Strength reduce mul by 2^n + 2/4/8 + 1 (#88911) by Philip Reames · 2 weeks ago
  83. 9f9f6b3 [RISCV] Avoid matching 3/5/9 * 2^N as 2^N + 2/4/8 (e.g. 24) (#88937) by Philip Reames · 2 weeks ago
  84. 61502d1 [MLGO] Use double comparison facilities for reg alloc scoring tests (#88862) by Aiden Grossman · 2 weeks ago
  85. b317822 [memprof] Use CSId to construct MemProfRecord (#88362) by Kazu Hirata · 2 weeks ago
  86. c63c321 [RemoveDI] Add support for debug records to debugify (#87383) by Stephen Tozer · 2 weeks ago
  87. 9290651 [RISCV] Fix obvious copy paste error. by Harald van Dijk · 2 weeks ago
  88. 2088f9d [VectorCombine][X86] Add initial shuffle-of-shuffles.ll test cover for #88743 by Simon Pilgrim · 2 weeks ago
  89. 1b9c9d6 [RISCV] Add coverage for strength reduction of mul 2^N +/- 3/5/9 by Philip Reames · 2 weeks ago
  90. 1f782d6 Revert "[JumpThreading] Thread over BB with only an unconditional branch" (#88907) by XChy · 2 weeks ago
  91. b2eba5d [ValueTracking] Restore isKnownNonZero parameter order. (#88873) by Harald van Dijk · 2 weeks ago
  92. 464e6d1 [VectorCombine][X86] shuffle-of-binops.ll - split off foldShuffleOfBinops tests from shuffle.ll by Simon Pilgrim · 2 weeks ago
  93. 55d9a68 [LV][NFCI]Use integer for cost/trip count calculations instead of double, fix possible UB. by Alexey Bataev · 2 weeks ago
  94. d5a0c2b [VectorCombine][X86] Regenerate shuffle.ll + shuffle-of-casts.ll by Simon Pilgrim · 2 weeks ago
  95. cd14b22 [SLP]Fix PR88834: check if unsigned arg can be trunced, being used in smax/smin intrinsics. by Alexey Bataev · 2 weeks ago
  96. 2f56031 [SLP][NFC]Add a test with the incorrect vectorization of smax with unsigned arg. by Alexey Bataev · 2 weeks ago
  97. eca9ee4 [AMDGPU][CodeGen] Improve handling of memcpy for -Os/-Oz compilations (#87632) by Shilei Tian · 2 weeks ago
  98. 4d0bfee [SLP] Make sure MinVF is a power-of-2 by using PowerOf2Ceil. by Florian Hahn · 2 weeks ago
  99. 1cd21cb [X86] Add shuffle tests for BLEND(PERMUTE(X),PERMUTE(Y)) patterns by Simon Pilgrim · 2 weeks ago
  100. 0a2adde [gn] port fe48bf672e1ab2 by Nico Weber · 2 weeks ago