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llvm / llvm-project / llvm / e7e1a7ad6f753bcb646a0a80f8ac71809ba0829d / . / docs / AMDGPU / gfx10_waitcnt_depctr.rst
blob: d996feada576736b0194e6d4dfc1c218e2188c69 [file] [log] [blame]
Dmitry Preobrazhensky3ba4b432022-04-12 15:16:20 +0300[diff] [blame]1..
2 **************************************************
3 * *
4 * Automatically generated file, do not edit! *
5 * *
6 **************************************************
7
8.. _amdgpu_synid_gfx10_waitcnt_depctr:
9
10waitcnt_depctr
11==============
12
13Dependency counters to wait for.
14
15This operand may be specified as one of the following:
16
Dmitry Preobrazhenskye2f435d2022-12-13 14:36:43 +0300[diff] [blame]17* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range from -32768 to 65535.
Dmitry Preobrazhensky3ba4b432022-04-12 15:16:20 +0300[diff] [blame]18* A combination of *symbolic values* described below.
19
20 ======================== ======================== ================ =================
21 Syntax Description Valid *N* Values Default *N* Value
22 ======================== ======================== ================ =================
23 depctr_sa_sdst(<*N*>) Wait for SA_SDST <= N 0..1 1
24 depctr_va_vdst(<*N*>) Wait for VA_VDST <= N 0..15 15
25 depctr_va_sdst(<*N*>) Wait for VA_SDST <= N 0..7 7
26 depctr_va_ssrc(<*N*>) Wait for VA_SSRC <= N 0..1 1
27 depctr_va_vcc(<*N*>) Wait for VA_VCC <= N 0..1 1
28 depctr_vm_vsrc(<*N*>) Wait for VM_VSRC <= N 0..7 7
29 ======================== ======================== ================ =================
30
Dmitry Preobrazhenskye2f435d2022-12-13 14:36:43 +0300[diff] [blame]31 These values may be specified in any order. Spaces, ampersands, and commas may be used as optional separators.
Dmitry Preobrazhensky3ba4b432022-04-12 15:16:20 +0300[diff] [blame]32
33Examples:
34
35.. parsed-literal::
36
37 s_waitcnt_depctr depctr_sa_sdst(0) depctr_va_vdst(0)
38 s_waitcnt_depctr depctr_sa_sdst(1) & depctr_va_vdst(1)
39 s_waitcnt_depctr depctr_va_vdst(3), depctr_va_sdst(5)