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Duncan Sands11129582012-07-26 08:04:09 +00001This file is a list of the people responsible for ensuring that patches for a
2particular part of LLVM are reviewed, either by themself or by someone else.
3They are also the gatekeepers for their part of LLVM, with the final word on
4what goes in or not.
5
6The list is sorted by surname and formatted to allow easy grepping and
7beautification by scripts. The fields are: name (N), email (E), web-address
8(W), PGP key ID and fingerprint (P), description (D), and snail-mail address
9(S).
10
Benjamin Kramer5c858892012-11-14 18:17:45 +000011N: Joe Abbey
12E: jabbey@arxan.com
13D: LLVM Bitcode (lib/Bitcode/* include/llvm/Bitcode/*)
14
Owen Andersonaa9a73f2012-11-15 22:56:42 +000015N: Owen Anderson
16E: resistor@mac.com
17D: SelectionDAG (lib/CodeGen/SelectionDAG/*)
18
Rafael Espindolaa1bd7b42012-11-22 16:43:44 +000019N: Rafael Avila de Espindola
20E: rafael.espindola@gmail.com
21D: Gold plugin (tools/gold/*)
22
Chandler Carruth502c61b2012-11-16 11:43:01 +000023N: Chandler Carruth
24E: chandlerc@gmail.com
25E: chandlerc@google.com
Eric Christopherfb91b512013-04-17 03:18:49 +000026D: Config, ADT, Support, inlining & related passes, SROA/mem2reg & related passes, CMake, library layering
Chandler Carruth502c61b2012-11-16 11:43:01 +000027
Duncan Sands11129582012-07-26 08:04:09 +000028N: Evan Cheng
29E: evan.cheng@apple.com
Evan Cheng5433e9d2012-11-15 19:31:48 +000030D: ARM target, parts of code generator not covered by someone else
Duncan Sands11129582012-07-26 08:04:09 +000031
Benjamin Kramer5c858892012-11-14 18:17:45 +000032N: Eric Christopher
33E: echristo@gmail.com
Eric Christopher81ddeaf2012-11-15 22:57:22 +000034D: Debug Information, autotools/configure/make build, inline assembly
Benjamin Kramer5c858892012-11-14 18:17:45 +000035
Duncan Sands11129582012-07-26 08:04:09 +000036N: Greg Clayton
37D: LLDB
38
39N: Peter Collingbourne
40D: libclc
41
Anshuman Dasgupta352d2222012-11-19 15:40:22 +000042N: Anshuman Dasgupta
43E: adasgupt@codeaurora.org
44D: Hexagon Backend
45
Hal Finkel7dddd822012-11-14 07:59:10 +000046N: Hal Finkel
47E: hfinkel@anl.gov
48D: BBVectorize and the PowerPC target
49
Venkatraman Govindaraju5d2518f2012-11-22 22:14:48 +000050N: Venkatraman Govindaraju
51E: venkatra@cs.wisc.edu
52D: Sparc Backend (lib/Target/Sparc/*)
53
Duncan Sands11129582012-07-26 08:04:09 +000054N: Tobias Grosser
55D: Polly
56
Benjamin Kramer5c858892012-11-14 18:17:45 +000057N: James Grosbach
58E: grosbach@apple.com
59D: MC layer
60
Duncan Sands11129582012-07-26 08:04:09 +000061N: Howard Hinnant
62D: libc++
63
Justin Holewinskia9ce5092012-11-14 19:36:27 +000064N: Justin Holewinski
65E: jholewinski@nvidia.com
66D: NVPTX Target (lib/Target/NVPTX/*)
67
Andrew Kaylor59b47f42012-11-16 23:56:48 +000068N: Andy Kaylor
69E: andrew.kaylor@intel.com
70D: MCJIT, RuntimeDyld and JIT event listeners
71
Galina Kistanova80ec35a2012-11-15 23:16:47 +000072N: Galina Kistanova
73E: gkistanova@gmail.com
74D: LLVM Buildbot
75
Duncan Sands11129582012-07-26 08:04:09 +000076N: Anton Korobeynikov
Anton Korobeynikov4be5cc22012-11-15 19:10:23 +000077E: anton@korobeynikov.info
78D: Exception handling, Windows codegen, ARM EABI
Duncan Sands11129582012-07-26 08:04:09 +000079
Benjamin Kramer5c858892012-11-14 18:17:45 +000080N: Benjamin Kramer
81E: benny.kra@gmail.com
82D: DWARF Parser
83
Sergei Larin1abae882012-11-15 19:24:19 +000084N: Sergei Larin
85E: slarin@codeaurora.org
86D: VLIW Instruction Scheduling, Packetization
87
Duncan Sands11129582012-07-26 08:04:09 +000088N: Chris Lattner
89E: sabre@nondot.org
90W: http://nondot.org/~sabre/
91D: Everything not covered by someone else
92
Tim Northover7ca433a2013-01-31 12:51:16 +000093N: Tim Northover
94E: Tim.Northover@arm.com
95D: AArch64 backend
96
Duncan Sands11129582012-07-26 08:04:09 +000097N: Jakob Olesen
98D: Register allocators and TableGen
99
Richard Osborne12b08d92012-11-16 21:26:36 +0000100N: Richard Osborne
101E: richard@xmos.com
102D: XCore Backend
103
Chad Rosiera6dac5a2012-11-14 18:43:21 +0000104N: Chad Rosier
Chad Rosierbcadded2013-11-15 17:35:29 +0000105E: mcrosier@codeaurora.org
Richard Smith856036f2012-11-27 00:48:36 +0000106D: Fast-Isel
Chad Rosiera6dac5a2012-11-14 18:43:21 +0000107
Nadav Rotem7a6f49f2012-11-14 19:47:48 +0000108N: Nadav Rotem
109E: nrotem@apple.com
Nadav Rotemcc4672d2012-11-15 22:26:51 +0000110D: X86 Backend, Loop Vectorizer
Nadav Rotem7a6f49f2012-11-14 19:47:48 +0000111
Richard Sandiford093b6702013-05-08 14:41:29 +0000112N: Richard Sandiford
113E: rsandifo@linux.vnet.ibm.com
114D: SystemZ Backend
115
Duncan Sands11129582012-07-26 08:04:09 +0000116N: Duncan Sands
117E: baldrick@free.fr
118D: DragonEgg
Joe Abbey9d26f882012-11-13 22:32:15 +0000119
Kostya Serebryany9264b6c2013-06-27 08:47:12 +0000120N: Kostya Serebryany
121E: kcc@google.com
122D: AddressSanitizer, ThreadSanitizer (LLVM parts)
123
Michael J. Spencerca66bdf2013-01-15 09:37:45 +0000124N: Michael Spencer
125E: bigcheesegs@gmail.com
126D: Windows parts of Support, Object, ar, nm, objdump, ranlib, size
127
Tom Stellard852bd5a2012-12-19 22:10:35 +0000128N: Tom Stellard
129E: thomas.stellard@amd.com
130E: mesa-dev@lists.freedesktop.org
131D: R600 Backend
132
Kostya Serebryany9264b6c2013-06-27 08:47:12 +0000133N: Evgeniy Stepanov
134E: eugenis@google.com
135D: MemorySanitizer (LLVM part)
136
Andrew Trick712da702012-11-14 07:04:23 +0000137N: Andrew Trick
138E: atrick@apple.com
Andrew Trick8bb89f7a42012-12-05 23:32:44 +0000139D: IndVar Simplify, Loop Strength Reduction, Instruction Scheduling
Bill Wendling09e74e32013-03-18 17:47:33 +0000140
141N: Bill Wendling
142E: wendling@apple.com
Bill Wendlingfc582ef2013-04-10 21:56:52 +0000143D: libLTO, IR Linker
Peter Zotov078513c2013-11-13 04:24:13 +0000144
145N: Peter Zotov
146E: whitequark@whitequark.org
147D: OCaml bindings