test/CodeGen/Mips/GlobalISel/legalizer/constants.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |

  define void @any_i64() {entry: ret void}
  define void @any_i32() {entry: ret void}
  define void @signed_i16() {entry: ret void}
  define void @signed_i8() {entry: ret void}
  define void @unsigned_i16() {entry: ret void}
  define void @unsigned_i8() {entry: ret void}
  define void @i1_true() {entry: ret void}
  define void @i1_false() {entry: ret void}

...
---
name:            any_i64
alignment:       4
tracksRegLiveness: true
body:             |
  bb.1.entry:
    ; MIPS32-LABEL: name: any_i64
    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
    ; MIPS32-NEXT: $v0 = COPY [[C1]](s32)
    ; MIPS32-NEXT: $v1 = COPY [[C]](s32)
    ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1
    %0:_(s64) = G_CONSTANT i64 -9223372036854775808
    %1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0(s64)
    $v0 = COPY %2(s32)
    $v1 = COPY %1(s32)
    RetRA implicit $v0, implicit $v1

...
---
name:            any_i32
alignment:       4
tracksRegLiveness: true
body:             |
  bb.1.entry:
    ; MIPS32-LABEL: name: any_i32
    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
    ; MIPS32-NEXT: $v0 = COPY [[C]](s32)
    ; MIPS32-NEXT: RetRA implicit $v0
    %0:_(s32) = G_CONSTANT i32 -2147483648
    $v0 = COPY %0(s32)
    RetRA implicit $v0

...
---
name:            signed_i16
alignment:       4
tracksRegLiveness: true
body:             |
  bb.1.entry:
    ; MIPS32-LABEL: name: signed_i16
    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32)
    ; MIPS32-NEXT: $v0 = COPY [[COPY]](s32)
    ; MIPS32-NEXT: RetRA implicit $v0
    %0:_(s16) = G_CONSTANT i16 -32768
    %1:_(s32) = G_SEXT %0(s16)
    $v0 = COPY %1(s32)
    RetRA implicit $v0

...
---
name:            signed_i8
alignment:       4
tracksRegLiveness: true
body:             |
  bb.1.entry:
    ; MIPS32-LABEL: name: signed_i8
    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -128
    ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32)
    ; MIPS32-NEXT: $v0 = COPY [[COPY]](s32)
    ; MIPS32-NEXT: RetRA implicit $v0
    %0:_(s8) = G_CONSTANT i8 -128
    %1:_(s32) = G_SEXT %0(s8)
    $v0 = COPY %1(s32)
    RetRA implicit $v0

...
---
name:            unsigned_i16
alignment:       4
tracksRegLiveness: true
body:             |
  bb.1.entry:
    ; MIPS32-LABEL: name: unsigned_i16
    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32768
    ; MIPS32-NEXT: $v0 = COPY [[C]](s32)
    ; MIPS32-NEXT: RetRA implicit $v0
    %0:_(s16) = G_CONSTANT i16 -32768
    %1:_(s32) = G_ZEXT %0(s16)
    $v0 = COPY %1(s32)
    RetRA implicit $v0

...
---
name:            unsigned_i8
alignment:       4
tracksRegLiveness: true
body:             |
  bb.1.entry:
    ; MIPS32-LABEL: name: unsigned_i8
    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 128
    ; MIPS32-NEXT: $v0 = COPY [[C]](s32)
    ; MIPS32-NEXT: RetRA implicit $v0
    %0:_(s8) = G_CONSTANT i8 -128
    %1:_(s32) = G_ZEXT %0(s8)
    $v0 = COPY %1(s32)
    RetRA implicit $v0

...
---
name:            i1_true
alignment:       4
tracksRegLiveness: true
body:             |
  bb.1.entry:
    ; MIPS32-LABEL: name: i1_true
    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; MIPS32-NEXT: $v0 = COPY [[C]](s32)
    ; MIPS32-NEXT: RetRA implicit $v0
    %0:_(s1) = G_CONSTANT i1 true
    %1:_(s32) = G_ZEXT %0(s1)
    $v0 = COPY %1(s32)
    RetRA implicit $v0

...
---
name:            i1_false
alignment:       4
tracksRegLiveness: true
body:             |
  bb.1.entry:
    ; MIPS32-LABEL: name: i1_false
    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; MIPS32-NEXT: $v0 = COPY [[C]](s32)
    ; MIPS32-NEXT: RetRA implicit $v0
    %0:_(s1) = G_CONSTANT i1 false
    %1:_(s32) = G_ZEXT %0(s1)
    $v0 = COPY %1(s32)
    RetRA implicit $v0

...