test/CodeGen/X86/i128-udiv.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64

; Make sure none of these crash, and that the power-of-two transformations
; trigger correctly.

define i128 @test1(i128 %x) nounwind {
; X86-LABEL: test1:
; X86:       # %bb.0:
; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
; X86-NEXT:    shrdl $2, %edx, %ecx
; X86-NEXT:    shrl $2, %edx
; X86-NEXT:    movl %edx, 4(%eax)
; X86-NEXT:    movl %ecx, (%eax)
; X86-NEXT:    movl $0, 12(%eax)
; X86-NEXT:    movl $0, 8(%eax)
; X86-NEXT:    retl $4
;
; X64-LABEL: test1:
; X64:       # %bb.0:
; X64-NEXT:    movq %rsi, %rax
; X64-NEXT:    shrq $2, %rax
; X64-NEXT:    xorl %edx, %edx
; X64-NEXT:    retq
  %tmp = udiv i128 %x, 73786976294838206464
  ret i128 %tmp
}

define i128 @test2(i128 %x) nounwind {
; X86-LABEL: test2:
; X86 doesn't have __divti3, so the urem is expanded into a loop.
; X86: udiv-do-while
;
; X64-LABEL: test2:
; X64:       # %bb.0:
; X64-NEXT:    pushq %rax
; X64-NEXT:    xorl %edx, %edx
; X64-NEXT:    movq $-4, %rcx
; X64-NEXT:    callq __udivti3@PLT
; X64-NEXT:    popq %rcx
; X64-NEXT:    retq
  %tmp = udiv i128 %x, -73786976294838206464
  ret i128 %tmp
}

define i128 @test3(i128 %x) nounwind {
; X86-LABEL: test3:
; X86 doesn't have __divti3, so the urem is expanded into a loop.
; X86: udiv-do-while
;
; X64-LABEL: test3:
; X64:       # %bb.0:
; X64-NEXT:    pushq %rax
; X64-NEXT:    movq $-3, %rdx
; X64-NEXT:    movq $-5, %rcx
; X64-NEXT:    callq __udivti3@PLT
; X64-NEXT:    popq %rcx
; X64-NEXT:    retq
  %tmp = udiv i128 %x, -73786976294838206467
  ret i128 %tmp
}