| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X64 |
| # RUN: llc -O0 -mtriple=i386-linux-gnu -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s 2>%t -o - | FileCheck %s --check-prefixes=CHECK,X86 |
| # RUN: FileCheck -check-prefix=ERR32 %s < %t |
| |
| # ERR32: remark: <unknown>:0:0: unable to legalize instruction: %14:_(s32) = G_UMULH %7:_, %9:_ (in function: test_mul_i42) |
| # ERR32: remark: <unknown>:0:0: unable to legalize instruction: %10:_(s32) = G_UMULH %3:_, %5:_ (in function: test_mul_i64) |
| |
| --- | |
| define void @test_mul_i1() { ret void } |
| |
| define i8 @test_mul_i8(i8 %arg1, i8 %arg2) { |
| %ret = mul i8 %arg1, %arg2 |
| ret i8 %ret |
| } |
| |
| define i16 @test_mul_i16(i16 %arg1, i16 %arg2) { |
| %ret = mul i16 %arg1, %arg2 |
| ret i16 %ret |
| } |
| |
| define i27 @test_mul_i27(i27 %arg1, i27 %arg2) { |
| %ret = mul i27 %arg1, %arg2 |
| ret i27 %ret |
| } |
| |
| define i32 @test_mul_i32(i32 %arg1, i32 %arg2) { |
| %ret = mul i32 %arg1, %arg2 |
| ret i32 %ret |
| } |
| |
| define i42 @test_mul_i42(i42 %arg1, i42 %arg2) { |
| %ret = mul i42 %arg1, %arg2 |
| ret i42 %ret |
| } |
| |
| define i64 @test_mul_i64(i64 %arg1, i64 %arg2) { |
| %ret = mul i64 %arg1, %arg2 |
| ret i64 %ret |
| } |
| ... |
| --- |
| name: test_mul_i1 |
| alignment: 16 |
| legalized: false |
| regBankSelected: false |
| registers: |
| - { id: 0, class: _, preferred-register: '' } |
| - { id: 1, class: _, preferred-register: '' } |
| - { id: 2, class: _, preferred-register: '' } |
| body: | |
| bb.1 (%ir-block.0): |
| |
| ; CHECK-LABEL: name: test_mul_i1 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edx |
| ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32) |
| ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32) |
| ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s8) = G_MUL [[TRUNC]], [[TRUNC1]] |
| ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(p0) = G_IMPLICIT_DEF |
| ; CHECK-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1 |
| ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s8) = G_AND [[MUL]], [[C]] |
| ; CHECK-NEXT: G_STORE [[AND]](s8), [[DEF]](p0) :: (store (s1)) |
| ; CHECK-NEXT: RET 0 |
| %0(s32) = COPY $edx |
| %1(s1) = G_TRUNC %0(s32) |
| %2(s1) = G_MUL %1, %1 |
| %3:_(p0) = G_IMPLICIT_DEF |
| G_STORE %2, %3 :: (store (s1)) |
| RET 0 |
| ... |
| --- |
| name: test_mul_i8 |
| alignment: 16 |
| legalized: false |
| regBankSelected: false |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| - { id: 2, class: _ } |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi, $esi |
| |
| ; CHECK-LABEL: name: test_mul_i8 |
| ; CHECK: liveins: $edi, $esi |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dl |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s8) = COPY $sil |
| ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s8) = G_MUL [[COPY]], [[COPY1]] |
| ; CHECK-NEXT: $al = COPY [[MUL]](s8) |
| ; CHECK-NEXT: RET 0, implicit $al |
| %0(s8) = COPY $dl |
| %1(s8) = COPY $sil |
| %2(s8) = G_MUL %0, %1 |
| $al = COPY %2(s8) |
| RET 0, implicit $al |
| ... |
| --- |
| name: test_mul_i16 |
| alignment: 16 |
| legalized: false |
| regBankSelected: false |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| - { id: 2, class: _ } |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi, $esi |
| |
| ; CHECK-LABEL: name: test_mul_i16 |
| ; CHECK: liveins: $edi, $esi |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $di |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY $si |
| ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s16) = G_MUL [[COPY]], [[COPY1]] |
| ; CHECK-NEXT: $ax = COPY [[MUL]](s16) |
| ; CHECK-NEXT: RET 0, implicit $ax |
| %0(s16) = COPY $di |
| %1(s16) = COPY $si |
| %2(s16) = G_MUL %0, %1 |
| $ax = COPY %2(s16) |
| RET 0, implicit $ax |
| ... |
| --- |
| name: test_mul_i27 |
| alignment: 16 |
| legalized: false |
| regBankSelected: false |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| - { id: 2, class: _ } |
| body: | |
| bb.1 (%ir-block.0): |
| |
| ; |
| ; |
| ; CHECK-LABEL: name: test_mul_i27 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edx |
| ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY]], [[COPY]] |
| ; CHECK-NEXT: $eax = COPY [[MUL]](s32) |
| ; CHECK-NEXT: RET 0 |
| %0(s32) = COPY $edx |
| %1(s27) = G_TRUNC %0(s32) |
| %2(s27) = G_MUL %1, %1 |
| %3:_(s32) = G_ANYEXT %2 |
| $eax = COPY %3 |
| RET 0 |
| ... |
| --- |
| |
| name: test_mul_i32 |
| alignment: 16 |
| legalized: false |
| regBankSelected: false |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| - { id: 2, class: _ } |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi, $esi |
| |
| ; CHECK-LABEL: name: test_mul_i32 |
| ; CHECK: liveins: $edi, $esi |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $edi |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi |
| ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY]], [[COPY1]] |
| ; CHECK-NEXT: $eax = COPY [[MUL]](s32) |
| ; CHECK-NEXT: RET 0, implicit $eax |
| %0(s32) = COPY $edi |
| %1(s32) = COPY $esi |
| %2(s32) = G_MUL %0, %1 |
| $eax = COPY %2(s32) |
| RET 0, implicit $eax |
| ... |
| --- |
| name: test_mul_i42 |
| alignment: 16 |
| legalized: false |
| regBankSelected: false |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| - { id: 2, class: _ } |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $rdi, $rsi |
| |
| ; X64-LABEL: name: test_mul_i42 |
| ; X64: liveins: $rdi, $rsi |
| ; X64-NEXT: {{ $}} |
| ; X64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $rdx |
| ; X64-NEXT: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[COPY]], [[COPY]] |
| ; X64-NEXT: $rax = COPY [[MUL]](s64) |
| ; X64-NEXT: RET 0 |
| ; X86-LABEL: name: test_mul_i42 |
| ; X86: liveins: $rdi, $rsi |
| ; X86-NEXT: {{ $}} |
| ; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $rdx |
| ; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s42) = G_TRUNC [[COPY]](s64) |
| ; X86-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC]](s42) |
| ; X86-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC]](s42) |
| ; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ANYEXT]](s64) |
| ; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ANYEXT1]](s64) |
| ; X86-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[UV]], [[UV2]] |
| ; X86-NEXT: [[MUL1:%[0-9]+]]:_(s32) = G_MUL [[UV1]], [[UV2]] |
| ; X86-NEXT: [[MUL2:%[0-9]+]]:_(s32) = G_MUL [[UV]], [[UV3]] |
| ; X86-NEXT: [[UMULH:%[0-9]+]]:_(s32) = G_UMULH [[UV]], [[UV2]] |
| ; X86-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[MUL1]], [[MUL2]] |
| ; X86-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[UMULH]] |
| ; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[MUL]](s32), [[ADD1]](s32) |
| ; X86-NEXT: [[TRUNC1:%[0-9]+]]:_(s42) = G_TRUNC [[MV]](s64) |
| ; X86-NEXT: [[ANYEXT2:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC1]](s42) |
| ; X86-NEXT: $rax = COPY [[ANYEXT2]](s64) |
| ; X86-NEXT: RET 0 |
| %0(s64) = COPY $rdx |
| %1(s42) = G_TRUNC %0(s64) |
| %2(s42) = G_MUL %1, %1 |
| %3:_(s64) = G_ANYEXT %2 |
| $rax = COPY %3 |
| RET 0 |
| ... |
| --- |
| name: test_mul_i64 |
| alignment: 16 |
| legalized: false |
| regBankSelected: false |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| - { id: 2, class: _ } |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $rdi, $rsi |
| |
| ; X64-LABEL: name: test_mul_i64 |
| ; X64: liveins: $rdi, $rsi |
| ; X64-NEXT: {{ $}} |
| ; X64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi |
| ; X64-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $rsi |
| ; X64-NEXT: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[COPY]], [[COPY1]] |
| ; X64-NEXT: $rax = COPY [[MUL]](s64) |
| ; X64-NEXT: RET 0, implicit $rax |
| ; X86-LABEL: name: test_mul_i64 |
| ; X86: liveins: $rdi, $rsi |
| ; X86-NEXT: {{ $}} |
| ; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi |
| ; X86-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $rsi |
| ; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) |
| ; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s64) |
| ; X86-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[UV]], [[UV2]] |
| ; X86-NEXT: [[MUL1:%[0-9]+]]:_(s32) = G_MUL [[UV1]], [[UV2]] |
| ; X86-NEXT: [[MUL2:%[0-9]+]]:_(s32) = G_MUL [[UV]], [[UV3]] |
| ; X86-NEXT: [[UMULH:%[0-9]+]]:_(s32) = G_UMULH [[UV]], [[UV2]] |
| ; X86-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[MUL1]], [[MUL2]] |
| ; X86-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[UMULH]] |
| ; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[MUL]](s32), [[ADD1]](s32) |
| ; X86-NEXT: $rax = COPY [[MV]](s64) |
| ; X86-NEXT: RET 0, implicit $rax |
| %0(s64) = COPY $rdi |
| %1(s64) = COPY $rsi |
| %2(s64) = G_MUL %0, %1 |
| $rax = COPY %2(s64) |
| RET 0, implicit $rax |
| ... |