| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse2 -show-mc-encoding | FileCheck %s --check-prefix=SSE |
| ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=AVX2 |
| ; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=SKX |
| |
| ; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse2-builtins.c |
| |
| |
| define <16 x i8> @test_x86_sse2_paddus_b(<16 x i8> %a0, <16 x i8> %a1) { |
| ; SSE-LABEL: test_x86_sse2_paddus_b: |
| ; SSE: ## %bb.0: |
| ; SSE-NEXT: paddusb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xdc,0xc1] |
| ; SSE-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; AVX2-LABEL: test_x86_sse2_paddus_b: |
| ; AVX2: ## %bb.0: |
| ; AVX2-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdc,0xc1] |
| ; AVX2-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; SKX-LABEL: test_x86_sse2_paddus_b: |
| ; SKX: ## %bb.0: |
| ; SKX-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xdc,0xc1] |
| ; SKX-NEXT: retl ## encoding: [0xc3] |
| %1 = add <16 x i8> %a0, %a1 |
| %2 = icmp ugt <16 x i8> %a0, %1 |
| %3 = select <16 x i1> %2, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, <16 x i8> %1 |
| ret <16 x i8> %3 |
| } |
| |
| define <8 x i16> @test_x86_sse2_paddus_w(<8 x i16> %a0, <8 x i16> %a1) { |
| ; SSE-LABEL: test_x86_sse2_paddus_w: |
| ; SSE: ## %bb.0: |
| ; SSE-NEXT: paddusw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xdd,0xc1] |
| ; SSE-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; AVX2-LABEL: test_x86_sse2_paddus_w: |
| ; AVX2: ## %bb.0: |
| ; AVX2-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdd,0xc1] |
| ; AVX2-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; SKX-LABEL: test_x86_sse2_paddus_w: |
| ; SKX: ## %bb.0: |
| ; SKX-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xdd,0xc1] |
| ; SKX-NEXT: retl ## encoding: [0xc3] |
| %1 = add <8 x i16> %a0, %a1 |
| %2 = icmp ugt <8 x i16> %a0, %1 |
| %3 = select <8 x i1> %2, <8 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>, <8 x i16> %1 |
| ret <8 x i16> %3 |
| } |
| |
| define <16 x i8> @test_x86_sse2_psubus_b(<16 x i8> %a0, <16 x i8> %a1) { |
| ; SSE-LABEL: test_x86_sse2_psubus_b: |
| ; SSE: ## %bb.0: |
| ; SSE-NEXT: psubusb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xd8,0xc1] |
| ; SSE-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; AVX2-LABEL: test_x86_sse2_psubus_b: |
| ; AVX2: ## %bb.0: |
| ; AVX2-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd8,0xc1] |
| ; AVX2-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; SKX-LABEL: test_x86_sse2_psubus_b: |
| ; SKX: ## %bb.0: |
| ; SKX-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd8,0xc1] |
| ; SKX-NEXT: retl ## encoding: [0xc3] |
| %cmp = icmp ugt <16 x i8> %a0, %a1 |
| %sel = select <16 x i1> %cmp, <16 x i8> %a0, <16 x i8> %a1 |
| %sub = sub <16 x i8> %sel, %a1 |
| ret <16 x i8> %sub |
| } |
| |
| define <8 x i16> @test_x86_sse2_psubus_w(<8 x i16> %a0, <8 x i16> %a1) { |
| ; SSE-LABEL: test_x86_sse2_psubus_w: |
| ; SSE: ## %bb.0: |
| ; SSE-NEXT: psubusw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xd9,0xc1] |
| ; SSE-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; AVX2-LABEL: test_x86_sse2_psubus_w: |
| ; AVX2: ## %bb.0: |
| ; AVX2-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd9,0xc1] |
| ; AVX2-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; SKX-LABEL: test_x86_sse2_psubus_w: |
| ; SKX: ## %bb.0: |
| ; SKX-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd9,0xc1] |
| ; SKX-NEXT: retl ## encoding: [0xc3] |
| %cmp = icmp ugt <8 x i16> %a0, %a1 |
| %sel = select <8 x i1> %cmp, <8 x i16> %a0, <8 x i16> %a1 |
| %sub = sub <8 x i16> %sel, %a1 |
| ret <8 x i16> %sub |
| } |
| |
| define <8 x i8> @test_x86_sse2_paddus_b_64(<8 x i8> %a0, <8 x i8> %a1) { |
| ; SSE-LABEL: test_x86_sse2_paddus_b_64: |
| ; SSE: ## %bb.0: |
| ; SSE-NEXT: paddusb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xdc,0xc1] |
| ; SSE-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; AVX2-LABEL: test_x86_sse2_paddus_b_64: |
| ; AVX2: ## %bb.0: |
| ; AVX2-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdc,0xc1] |
| ; AVX2-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; SKX-LABEL: test_x86_sse2_paddus_b_64: |
| ; SKX: ## %bb.0: |
| ; SKX-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xdc,0xc1] |
| ; SKX-NEXT: retl ## encoding: [0xc3] |
| %1 = add <8 x i8> %a0, %a1 |
| %2 = icmp ugt <8 x i8> %a0, %1 |
| %3 = select <8 x i1> %2, <8 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, <8 x i8> %1 |
| ret <8 x i8> %3 |
| } |
| |
| define <4 x i16> @test_x86_sse2_paddus_w_64(<4 x i16> %a0, <4 x i16> %a1) { |
| ; SSE-LABEL: test_x86_sse2_paddus_w_64: |
| ; SSE: ## %bb.0: |
| ; SSE-NEXT: paddusw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xdd,0xc1] |
| ; SSE-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; AVX2-LABEL: test_x86_sse2_paddus_w_64: |
| ; AVX2: ## %bb.0: |
| ; AVX2-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdd,0xc1] |
| ; AVX2-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; SKX-LABEL: test_x86_sse2_paddus_w_64: |
| ; SKX: ## %bb.0: |
| ; SKX-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xdd,0xc1] |
| ; SKX-NEXT: retl ## encoding: [0xc3] |
| %1 = add <4 x i16> %a0, %a1 |
| %2 = icmp ugt <4 x i16> %a0, %1 |
| %3 = select <4 x i1> %2, <4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>, <4 x i16> %1 |
| ret <4 x i16> %3 |
| } |
| |
| define <8 x i8> @test_x86_sse2_psubus_b_64(<8 x i8> %a0, <8 x i8> %a1) { |
| ; SSE-LABEL: test_x86_sse2_psubus_b_64: |
| ; SSE: ## %bb.0: |
| ; SSE-NEXT: psubusb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xd8,0xc1] |
| ; SSE-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; AVX2-LABEL: test_x86_sse2_psubus_b_64: |
| ; AVX2: ## %bb.0: |
| ; AVX2-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd8,0xc1] |
| ; AVX2-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; SKX-LABEL: test_x86_sse2_psubus_b_64: |
| ; SKX: ## %bb.0: |
| ; SKX-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd8,0xc1] |
| ; SKX-NEXT: retl ## encoding: [0xc3] |
| %cmp = icmp ugt <8 x i8> %a0, %a1 |
| %sel = select <8 x i1> %cmp, <8 x i8> %a0, <8 x i8> %a1 |
| %sub = sub <8 x i8> %sel, %a1 |
| ret <8 x i8> %sub |
| } |
| |
| define <4 x i16> @test_x86_sse2_psubus_w_64(<4 x i16> %a0, <4 x i16> %a1) { |
| ; SSE-LABEL: test_x86_sse2_psubus_w_64: |
| ; SSE: ## %bb.0: |
| ; SSE-NEXT: psubusw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xd9,0xc1] |
| ; SSE-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; AVX2-LABEL: test_x86_sse2_psubus_w_64: |
| ; AVX2: ## %bb.0: |
| ; AVX2-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd9,0xc1] |
| ; AVX2-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; SKX-LABEL: test_x86_sse2_psubus_w_64: |
| ; SKX: ## %bb.0: |
| ; SKX-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd9,0xc1] |
| ; SKX-NEXT: retl ## encoding: [0xc3] |
| %cmp = icmp ugt <4 x i16> %a0, %a1 |
| %sel = select <4 x i1> %cmp, <4 x i16> %a0, <4 x i16> %a1 |
| %sub = sub <4 x i16> %sel, %a1 |
| ret <4 x i16> %sub |
| } |
| |
| ; This test has a normal add and a saturating add. |
| ; FIXME: This should be an addw and a addusw, but a bad canonicalization makes this not work. |
| define <8 x i16> @add_addusw(<8 x i16> %x, <8 x i16> %y, <8 x i16> %z) { |
| ; SSE-LABEL: add_addusw: |
| ; SSE: ## %bb.0: |
| ; SSE-NEXT: paddw %xmm2, %xmm1 ## encoding: [0x66,0x0f,0xfd,0xca] |
| ; SSE-NEXT: paddusw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xdd,0xc1] |
| ; SSE-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; AVX2-LABEL: add_addusw: |
| ; AVX2: ## %bb.0: |
| ; AVX2-NEXT: vpaddw %xmm2, %xmm1, %xmm1 ## encoding: [0xc5,0xf1,0xfd,0xca] |
| ; AVX2-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdd,0xc1] |
| ; AVX2-NEXT: retl ## encoding: [0xc3] |
| ; |
| ; SKX-LABEL: add_addusw: |
| ; SKX: ## %bb.0: |
| ; SKX-NEXT: vpaddw %xmm2, %xmm1, %xmm1 ## EVEX TO VEX Compression encoding: [0xc5,0xf1,0xfd,0xca] |
| ; SKX-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xdd,0xc1] |
| ; SKX-NEXT: retl ## encoding: [0xc3] |
| %a = add <8 x i16> %y, %z |
| %b = add <8 x i16> %x, %a |
| %c = icmp ugt <8 x i16> %a, %b |
| %res = select <8 x i1> %c, <8 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>, <8 x i16> %b |
| ret <8 x i16> %res |
| } |