| # RUN: llc -march=amdgcn -mcpu=gfx908 -run-pass machine-scheduler -amdgpu-disable-unclustred-high-rp-reschedule %s -o - -debug-only=machine-scheduler 2>&1 | FileCheck -check-prefix=DEBUG %s |
| # RUN: llc -march=amdgcn -mcpu=gfx908 -run-pass=machine-scheduler -amdgpu-disable-unclustred-high-rp-reschedule -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX908 %s |
| # REQUIRES: asserts |
| |
| --- |
| name: test_occ_10_max_occ_no_sink |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_10_max_occ_no_sink |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: S_NOP 0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %22, implicit %23 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| S_NOP 0 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22, implicit %23 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_one_block_high_rp_livethrough |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_one_block_high_rp_livethrough |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %24 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %22 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %24 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %23 |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_one_block_high_rp_use_in_high_rp_block |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_one_block_high_rp_use_in_high_rp_block |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %24 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %23 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %22 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %24 |
| S_NOP 0, implicit %23 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_one_block_high_rp_minimum_sinking |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_one_block_high_rp_minimum_sinking |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %24 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %22, implicit %23 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %24 |
| S_NOP 0, implicit %22, implicit %23 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_two_block_high_rp |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_two_block_high_rp |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %24 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %23 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: S_NOP 0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: successors: %bb.4(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %26 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %25 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.4: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %22 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %24 |
| S_NOP 0, implicit %23 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| successors: %bb.3 |
| |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode |
| S_NOP 0 |
| |
| bb.3: |
| ; predecessors: %bb.2 |
| successors: %bb.4 |
| |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %26 |
| S_NOP 0, implicit %25 |
| |
| bb.4: |
| ; predcessors: %bb.3 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_two_block_high_rp_minimum_sinking |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_two_block_high_rp_minimum_sinking |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %24 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %23, implicit %22 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: successors: %bb.4(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %27 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %25, implicit %26 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.4: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %24 |
| S_NOP 0, implicit %23, implicit %22 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| successors: %bb.3 |
| |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode |
| S_NOP 0 |
| |
| bb.3: |
| ; predecessors: %bb.2 |
| successors: %bb.4 |
| |
| %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %27 |
| S_NOP 0, implicit %25, implicit %26 |
| |
| bb.4: |
| ; predcessors: %bb.3 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_high_rp_in_loop |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_high_rp_in_loop |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: liveins: $vgpr0, $sgpr0_sgpr1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 |
| ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: undef %4.sub1:sreg_64 = S_MOV_B32 0 |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec |
| ; GFX908-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc |
| ; GFX908-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]] |
| ; GFX908-NEXT: S_CBRANCH_EXECZ %bb.3, implicit $exec |
| ; GFX908-NEXT: S_BRANCH %bb.2 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %31 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: successors: %bb.5(0x04000000), %bb.4(0x7c000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc |
| ; GFX908-NEXT: S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc |
| ; GFX908-NEXT: S_CBRANCH_SCC0 %bb.5, implicit killed $scc |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.4: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %28 |
| ; GFX908-NEXT: S_BRANCH %bb.1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.5: |
| ; GFX908-NEXT: S_NOP 0, implicit %5, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %16 |
| ; GFX908-NEXT: S_NOP 0, implicit %7, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %18 |
| ; GFX908-NEXT: S_NOP 0, implicit %9, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %20 |
| ; GFX908-NEXT: S_NOP 0, implicit %11, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %22 |
| ; GFX908-NEXT: S_NOP 0, implicit %13, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %24 |
| ; GFX908-NEXT: S_NOP 0, implicit %25, implicit %26 |
| ; GFX908-NEXT: S_NOP 0, implicit %27 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| liveins: $vgpr0, $sgpr0_sgpr1 |
| |
| %1:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| %2:vgpr_32(s32) = COPY $vgpr0 |
| %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec |
| undef %5.sub1:sreg_64 = S_MOV_B32 0 |
| %5.sub0:sreg_64 = COPY %3.sub1 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, |
| |
| bb.1: |
| successors: %bb.2, %bb.3 |
| |
| %6:sreg_64 = COPY $exec, implicit-def $exec |
| %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc |
| $exec = S_MOV_B64_term %7 |
| S_CBRANCH_EXECZ %bb.3, implicit $exec |
| S_BRANCH %bb.2 |
| |
| bb.2: |
| %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %34 |
| |
| |
| bb.3: |
| successors: %bb.4(0x04000000), %bb.5(0x7c000000) |
| |
| $exec = S_OR_B64 $exec, %6, implicit-def $scc |
| %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc |
| S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc |
| S_CBRANCH_SCC0 %bb.4, implicit killed $scc |
| |
| bb.5: |
| S_NOP 0, implicit %33 |
| S_BRANCH %bb.1 |
| |
| bb.4: |
| S_NOP 0, implicit %10, implicit %20 |
| S_NOP 0, implicit %11, implicit %21 |
| S_NOP 0, implicit %12, implicit %22 |
| S_NOP 0, implicit %13, implicit %23 |
| S_NOP 0, implicit %14, implicit %24 |
| S_NOP 0, implicit %15, implicit %25 |
| S_NOP 0, implicit %16, implicit %26 |
| S_NOP 0, implicit %17, implicit %27 |
| S_NOP 0, implicit %18, implicit %28 |
| S_NOP 0, implicit %19, implicit %29 |
| S_NOP 0, implicit %30, implicit %31 |
| S_NOP 0, implicit %32 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_no_sink_undef_subreg |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_no_sink_undef_subreg |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: undef %23.sub0:vreg_64 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %23.sub1:vreg_64 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %23 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %22 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| undef %23.sub0:vreg_64 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %23.sub1:vreg_64 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %23 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_no_sink_undef_multiple_subregs |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_no_sink_undef_multiple_subregs |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: undef %21.sub0:vreg_128 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %21.sub1:vreg_128 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21.sub2:vreg_128 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21.sub3:vreg_128 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %21 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| undef %21.sub0:vreg_128 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %21.sub1:vreg_128 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %21.sub2:vreg_128 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| %21.sub3:vreg_128 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %21 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_sink_vgpr_regs_gives_8_occ_not_limited_by_sgprs |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_sink_vgpr_regs_gives_8_occ_not_limited_by_sgprs |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: liveins: $vgpr0, $sgpr0_sgpr1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 |
| ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| ; GFX908-NEXT: undef %4.sub1:sreg_64 = S_MOV_B32 0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 0 |
| ; GFX908-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sgpr_32 = S_MOV_B32 1 |
| ; GFX908-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sgpr_32 = S_MOV_B32 2 |
| ; GFX908-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sgpr_32 = S_MOV_B32 3 |
| ; GFX908-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sgpr_32 = S_MOV_B32 4 |
| ; GFX908-NEXT: [[S_MOV_B32_5:%[0-9]+]]:sgpr_32 = S_MOV_B32 5 |
| ; GFX908-NEXT: [[S_MOV_B32_6:%[0-9]+]]:sgpr_32 = S_MOV_B32 6 |
| ; GFX908-NEXT: [[S_MOV_B32_7:%[0-9]+]]:sgpr_32 = S_MOV_B32 7 |
| ; GFX908-NEXT: [[S_MOV_B32_8:%[0-9]+]]:sgpr_32 = S_MOV_B32 8 |
| ; GFX908-NEXT: [[S_MOV_B32_9:%[0-9]+]]:sgpr_32 = S_MOV_B32 9 |
| ; GFX908-NEXT: [[S_MOV_B32_10:%[0-9]+]]:sgpr_32 = S_MOV_B32 10 |
| ; GFX908-NEXT: [[S_MOV_B32_11:%[0-9]+]]:sgpr_32 = S_MOV_B32 11 |
| ; GFX908-NEXT: [[S_MOV_B32_12:%[0-9]+]]:sgpr_32 = S_MOV_B32 12 |
| ; GFX908-NEXT: [[S_MOV_B32_13:%[0-9]+]]:sgpr_32 = S_MOV_B32 13 |
| ; GFX908-NEXT: [[S_MOV_B32_14:%[0-9]+]]:sgpr_32 = S_MOV_B32 14 |
| ; GFX908-NEXT: [[S_MOV_B32_15:%[0-9]+]]:sgpr_32 = S_MOV_B32 15 |
| ; GFX908-NEXT: [[S_MOV_B32_16:%[0-9]+]]:sgpr_32 = S_MOV_B32 16 |
| ; GFX908-NEXT: [[S_MOV_B32_17:%[0-9]+]]:sgpr_32 = S_MOV_B32 17 |
| ; GFX908-NEXT: [[S_MOV_B32_18:%[0-9]+]]:sgpr_32 = S_MOV_B32 18 |
| ; GFX908-NEXT: [[S_MOV_B32_19:%[0-9]+]]:sgpr_32 = S_MOV_B32 19 |
| ; GFX908-NEXT: [[S_MOV_B32_20:%[0-9]+]]:sgpr_32 = S_MOV_B32 20 |
| ; GFX908-NEXT: [[S_MOV_B32_21:%[0-9]+]]:sgpr_32 = S_MOV_B32 21 |
| ; GFX908-NEXT: [[S_MOV_B32_22:%[0-9]+]]:sgpr_32 = S_MOV_B32 22 |
| ; GFX908-NEXT: [[S_MOV_B32_23:%[0-9]+]]:sgpr_32 = S_MOV_B32 23 |
| ; GFX908-NEXT: [[S_MOV_B32_24:%[0-9]+]]:sgpr_32 = S_MOV_B32 24 |
| ; GFX908-NEXT: [[S_MOV_B32_25:%[0-9]+]]:sgpr_32 = S_MOV_B32 25 |
| ; GFX908-NEXT: [[S_MOV_B32_26:%[0-9]+]]:sgpr_32 = S_MOV_B32 26 |
| ; GFX908-NEXT: [[S_MOV_B32_27:%[0-9]+]]:sgpr_32 = S_MOV_B32 27 |
| ; GFX908-NEXT: [[S_MOV_B32_28:%[0-9]+]]:sgpr_32 = S_MOV_B32 28 |
| ; GFX908-NEXT: [[S_MOV_B32_29:%[0-9]+]]:sgpr_32 = S_MOV_B32 29 |
| ; GFX908-NEXT: [[S_MOV_B32_30:%[0-9]+]]:sgpr_32 = S_MOV_B32 30 |
| ; GFX908-NEXT: [[S_MOV_B32_31:%[0-9]+]]:sgpr_32 = S_MOV_B32 31 |
| ; GFX908-NEXT: [[S_MOV_B32_32:%[0-9]+]]:sgpr_32 = S_MOV_B32 32 |
| ; GFX908-NEXT: [[S_MOV_B32_33:%[0-9]+]]:sgpr_32 = S_MOV_B32 33 |
| ; GFX908-NEXT: [[S_MOV_B32_34:%[0-9]+]]:sgpr_32 = S_MOV_B32 34 |
| ; GFX908-NEXT: [[S_MOV_B32_35:%[0-9]+]]:sgpr_32 = S_MOV_B32 35 |
| ; GFX908-NEXT: [[S_MOV_B32_36:%[0-9]+]]:sgpr_32 = S_MOV_B32 36 |
| ; GFX908-NEXT: [[S_MOV_B32_37:%[0-9]+]]:sgpr_32 = S_MOV_B32 37 |
| ; GFX908-NEXT: [[S_MOV_B32_38:%[0-9]+]]:sgpr_32 = S_MOV_B32 38 |
| ; GFX908-NEXT: [[S_MOV_B32_39:%[0-9]+]]:sgpr_32 = S_MOV_B32 39 |
| ; GFX908-NEXT: [[S_MOV_B32_40:%[0-9]+]]:sgpr_32 = S_MOV_B32 40 |
| ; GFX908-NEXT: [[S_MOV_B32_41:%[0-9]+]]:sgpr_32 = S_MOV_B32 41 |
| ; GFX908-NEXT: [[S_MOV_B32_42:%[0-9]+]]:sgpr_32 = S_MOV_B32 42 |
| ; GFX908-NEXT: [[S_MOV_B32_43:%[0-9]+]]:sgpr_32 = S_MOV_B32 43 |
| ; GFX908-NEXT: [[S_MOV_B32_44:%[0-9]+]]:sgpr_32 = S_MOV_B32 44 |
| ; GFX908-NEXT: [[S_MOV_B32_45:%[0-9]+]]:sgpr_32 = S_MOV_B32 45 |
| ; GFX908-NEXT: [[S_MOV_B32_46:%[0-9]+]]:sgpr_32 = S_MOV_B32 46 |
| ; GFX908-NEXT: [[S_MOV_B32_47:%[0-9]+]]:sgpr_32 = S_MOV_B32 47 |
| ; GFX908-NEXT: [[S_MOV_B32_48:%[0-9]+]]:sgpr_32 = S_MOV_B32 48 |
| ; GFX908-NEXT: [[S_MOV_B32_49:%[0-9]+]]:sgpr_32 = S_MOV_B32 49 |
| ; GFX908-NEXT: [[S_MOV_B32_50:%[0-9]+]]:sgpr_32 = S_MOV_B32 50 |
| ; GFX908-NEXT: [[S_MOV_B32_51:%[0-9]+]]:sgpr_32 = S_MOV_B32 51 |
| ; GFX908-NEXT: [[S_MOV_B32_52:%[0-9]+]]:sgpr_32 = S_MOV_B32 52 |
| ; GFX908-NEXT: [[S_MOV_B32_53:%[0-9]+]]:sgpr_32 = S_MOV_B32 53 |
| ; GFX908-NEXT: [[S_MOV_B32_54:%[0-9]+]]:sgpr_32 = S_MOV_B32 54 |
| ; GFX908-NEXT: [[S_MOV_B32_55:%[0-9]+]]:sgpr_32 = S_MOV_B32 55 |
| ; GFX908-NEXT: [[S_MOV_B32_56:%[0-9]+]]:sgpr_32 = S_MOV_B32 56 |
| ; GFX908-NEXT: [[S_MOV_B32_57:%[0-9]+]]:sgpr_32 = S_MOV_B32 57 |
| ; GFX908-NEXT: [[S_MOV_B32_58:%[0-9]+]]:sgpr_32 = S_MOV_B32 58 |
| ; GFX908-NEXT: [[S_MOV_B32_59:%[0-9]+]]:sgpr_32 = S_MOV_B32 59 |
| ; GFX908-NEXT: [[S_MOV_B32_60:%[0-9]+]]:sgpr_32 = S_MOV_B32 60 |
| ; GFX908-NEXT: [[S_MOV_B32_61:%[0-9]+]]:sgpr_32 = S_MOV_B32 61 |
| ; GFX908-NEXT: [[S_MOV_B32_62:%[0-9]+]]:sgpr_32 = S_MOV_B32 62 |
| ; GFX908-NEXT: [[S_MOV_B32_63:%[0-9]+]]:sgpr_32 = S_MOV_B32 63 |
| ; GFX908-NEXT: [[S_MOV_B32_64:%[0-9]+]]:sgpr_32 = S_MOV_B32 64 |
| ; GFX908-NEXT: [[S_MOV_B32_65:%[0-9]+]]:sgpr_32 = S_MOV_B32 65 |
| ; GFX908-NEXT: [[S_MOV_B32_66:%[0-9]+]]:sgpr_32 = S_MOV_B32 66 |
| ; GFX908-NEXT: [[S_MOV_B32_67:%[0-9]+]]:sgpr_32 = S_MOV_B32 67 |
| ; GFX908-NEXT: [[S_MOV_B32_68:%[0-9]+]]:sgpr_32 = S_MOV_B32 68 |
| ; GFX908-NEXT: [[S_MOV_B32_69:%[0-9]+]]:sgpr_32 = S_MOV_B32 69 |
| ; GFX908-NEXT: [[S_MOV_B32_70:%[0-9]+]]:sgpr_32 = S_MOV_B32 70 |
| ; GFX908-NEXT: [[S_MOV_B32_71:%[0-9]+]]:sgpr_32 = S_MOV_B32 71 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[S_MOV_B32_72:%[0-9]+]]:sgpr_32 = S_MOV_B32 72 |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[S_MOV_B32_73:%[0-9]+]]:sgpr_32 = S_MOV_B32 73 |
| ; GFX908-NEXT: %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[S_MOV_B32_74:%[0-9]+]]:sgpr_32 = S_MOV_B32 74 |
| ; GFX908-NEXT: %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[S_MOV_B32_75:%[0-9]+]]:sgpr_32 = S_MOV_B32 75 |
| ; GFX908-NEXT: %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[S_MOV_B32_76:%[0-9]+]]:sgpr_32 = S_MOV_B32 76 |
| ; GFX908-NEXT: %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[S_MOV_B32_77:%[0-9]+]]:sgpr_32 = S_MOV_B32 77 |
| ; GFX908-NEXT: %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[S_MOV_B32_78:%[0-9]+]]:sgpr_32 = S_MOV_B32 78 |
| ; GFX908-NEXT: [[S_MOV_B32_79:%[0-9]+]]:sgpr_32 = S_MOV_B32 79 |
| ; GFX908-NEXT: [[S_MOV_B32_80:%[0-9]+]]:sgpr_32 = S_MOV_B32 80 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec |
| ; GFX908-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc |
| ; GFX908-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]] |
| ; GFX908-NEXT: S_CBRANCH_EXECZ %bb.3, implicit $exec |
| ; GFX908-NEXT: S_BRANCH %bb.2 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %116:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %116 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: successors: %bb.5(0x04000000), %bb.4(0x7c000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %32 |
| ; GFX908-NEXT: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc |
| ; GFX908-NEXT: S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc |
| ; GFX908-NEXT: S_CBRANCH_SCC0 %bb.5, implicit killed $scc |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.4: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: S_BRANCH %bb.1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.5: |
| ; GFX908-NEXT: S_NOP 0, implicit %5, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %16 |
| ; GFX908-NEXT: S_NOP 0, implicit %7, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %18 |
| ; GFX908-NEXT: S_NOP 0, implicit %9, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %20 |
| ; GFX908-NEXT: S_NOP 0, implicit %11, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %22 |
| ; GFX908-NEXT: S_NOP 0, implicit %13, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %24 |
| ; GFX908-NEXT: S_NOP 0, implicit %25, implicit %26 |
| ; GFX908-NEXT: S_NOP 0, implicit %27, implicit %28 |
| ; GFX908-NEXT: S_NOP 0, implicit %29, implicit %30 |
| ; GFX908-NEXT: S_NOP 0, implicit %31 |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_]], implicit [[S_MOV_B32_1]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_2]], implicit [[S_MOV_B32_3]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_4]], implicit [[S_MOV_B32_5]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_6]], implicit [[S_MOV_B32_7]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_8]], implicit [[S_MOV_B32_9]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_10]], implicit [[S_MOV_B32_11]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_12]], implicit [[S_MOV_B32_13]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_14]], implicit [[S_MOV_B32_15]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_16]], implicit [[S_MOV_B32_17]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_18]], implicit [[S_MOV_B32_19]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_20]], implicit [[S_MOV_B32_21]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_22]], implicit [[S_MOV_B32_23]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_24]], implicit [[S_MOV_B32_25]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_26]], implicit [[S_MOV_B32_27]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_28]], implicit [[S_MOV_B32_29]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_30]], implicit [[S_MOV_B32_31]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_32]], implicit [[S_MOV_B32_33]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_34]], implicit [[S_MOV_B32_35]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_36]], implicit [[S_MOV_B32_37]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_38]], implicit [[S_MOV_B32_39]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_40]], implicit [[S_MOV_B32_41]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_42]], implicit [[S_MOV_B32_43]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_44]], implicit [[S_MOV_B32_45]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_46]], implicit [[S_MOV_B32_47]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_48]], implicit [[S_MOV_B32_49]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_50]], implicit [[S_MOV_B32_51]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_52]], implicit [[S_MOV_B32_53]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_54]], implicit [[S_MOV_B32_55]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_56]], implicit [[S_MOV_B32_57]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_58]], implicit [[S_MOV_B32_59]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_60]], implicit [[S_MOV_B32_61]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_62]], implicit [[S_MOV_B32_63]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_64]], implicit [[S_MOV_B32_65]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_66]], implicit [[S_MOV_B32_67]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_68]], implicit [[S_MOV_B32_69]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_70]], implicit [[S_MOV_B32_71]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_72]], implicit [[S_MOV_B32_73]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_74]], implicit [[S_MOV_B32_75]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_76]], implicit [[S_MOV_B32_77]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_78]], implicit [[S_MOV_B32_79]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_80]] |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| liveins: $vgpr0, $sgpr0_sgpr1 |
| |
| %1:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| %2:vgpr_32(s32) = COPY $vgpr0 |
| %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec |
| undef %5.sub1:sreg_64 = S_MOV_B32 0 |
| %5.sub0:sreg_64 = COPY %3.sub1 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| %37:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode |
| |
| %100:sgpr_32 = S_MOV_B32 0 |
| %101:sgpr_32 = S_MOV_B32 1 |
| %102:sgpr_32 = S_MOV_B32 2 |
| %103:sgpr_32 = S_MOV_B32 3 |
| %104:sgpr_32 = S_MOV_B32 4 |
| %105:sgpr_32 = S_MOV_B32 5 |
| %106:sgpr_32 = S_MOV_B32 6 |
| %107:sgpr_32 = S_MOV_B32 7 |
| %108:sgpr_32 = S_MOV_B32 8 |
| %109:sgpr_32 = S_MOV_B32 9 |
| %110:sgpr_32 = S_MOV_B32 10 |
| %111:sgpr_32 = S_MOV_B32 11 |
| %112:sgpr_32 = S_MOV_B32 12 |
| %113:sgpr_32 = S_MOV_B32 13 |
| %114:sgpr_32 = S_MOV_B32 14 |
| %115:sgpr_32 = S_MOV_B32 15 |
| %116:sgpr_32 = S_MOV_B32 16 |
| %117:sgpr_32 = S_MOV_B32 17 |
| %118:sgpr_32 = S_MOV_B32 18 |
| %119:sgpr_32 = S_MOV_B32 19 |
| %120:sgpr_32 = S_MOV_B32 20 |
| %121:sgpr_32 = S_MOV_B32 21 |
| %122:sgpr_32 = S_MOV_B32 22 |
| %123:sgpr_32 = S_MOV_B32 23 |
| %124:sgpr_32 = S_MOV_B32 24 |
| %125:sgpr_32 = S_MOV_B32 25 |
| %126:sgpr_32 = S_MOV_B32 26 |
| %127:sgpr_32 = S_MOV_B32 27 |
| %128:sgpr_32 = S_MOV_B32 28 |
| %129:sgpr_32 = S_MOV_B32 29 |
| %130:sgpr_32 = S_MOV_B32 30 |
| %131:sgpr_32 = S_MOV_B32 31 |
| %132:sgpr_32 = S_MOV_B32 32 |
| %133:sgpr_32 = S_MOV_B32 33 |
| %134:sgpr_32 = S_MOV_B32 34 |
| %135:sgpr_32 = S_MOV_B32 35 |
| %136:sgpr_32 = S_MOV_B32 36 |
| %137:sgpr_32 = S_MOV_B32 37 |
| %138:sgpr_32 = S_MOV_B32 38 |
| %139:sgpr_32 = S_MOV_B32 39 |
| %140:sgpr_32 = S_MOV_B32 40 |
| %141:sgpr_32 = S_MOV_B32 41 |
| %142:sgpr_32 = S_MOV_B32 42 |
| %143:sgpr_32 = S_MOV_B32 43 |
| %144:sgpr_32 = S_MOV_B32 44 |
| %145:sgpr_32 = S_MOV_B32 45 |
| %146:sgpr_32 = S_MOV_B32 46 |
| %147:sgpr_32 = S_MOV_B32 47 |
| %148:sgpr_32 = S_MOV_B32 48 |
| %149:sgpr_32 = S_MOV_B32 49 |
| %150:sgpr_32 = S_MOV_B32 50 |
| %151:sgpr_32 = S_MOV_B32 51 |
| %152:sgpr_32 = S_MOV_B32 52 |
| %153:sgpr_32 = S_MOV_B32 53 |
| %154:sgpr_32 = S_MOV_B32 54 |
| %155:sgpr_32 = S_MOV_B32 55 |
| %156:sgpr_32 = S_MOV_B32 56 |
| %157:sgpr_32 = S_MOV_B32 57 |
| %158:sgpr_32 = S_MOV_B32 58 |
| %159:sgpr_32 = S_MOV_B32 59 |
| %160:sgpr_32 = S_MOV_B32 60 |
| %161:sgpr_32 = S_MOV_B32 61 |
| %162:sgpr_32 = S_MOV_B32 62 |
| %163:sgpr_32 = S_MOV_B32 63 |
| %164:sgpr_32 = S_MOV_B32 64 |
| %165:sgpr_32 = S_MOV_B32 65 |
| %166:sgpr_32 = S_MOV_B32 66 |
| %167:sgpr_32 = S_MOV_B32 67 |
| %168:sgpr_32 = S_MOV_B32 68 |
| %169:sgpr_32 = S_MOV_B32 69 |
| %170:sgpr_32 = S_MOV_B32 70 |
| %171:sgpr_32 = S_MOV_B32 71 |
| %172:sgpr_32 = S_MOV_B32 72 |
| %173:sgpr_32 = S_MOV_B32 73 |
| %174:sgpr_32 = S_MOV_B32 74 |
| %175:sgpr_32 = S_MOV_B32 75 |
| %176:sgpr_32 = S_MOV_B32 76 |
| %177:sgpr_32 = S_MOV_B32 77 |
| %178:sgpr_32 = S_MOV_B32 78 |
| %179:sgpr_32 = S_MOV_B32 79 |
| %180:sgpr_32 = S_MOV_B32 80 |
| |
| bb.1: |
| successors: %bb.2, %bb.3 |
| |
| %6:sreg_64 = COPY $exec, implicit-def $exec |
| %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc |
| $exec = S_MOV_B64_term %7 |
| S_CBRANCH_EXECZ %bb.3, implicit $exec |
| S_BRANCH %bb.2 |
| |
| bb.2: |
| %38:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %38 |
| |
| bb.3: |
| successors: %bb.4(0x04000000), %bb.5(0x7c000000) |
| |
| S_NOP 0, implicit %37 |
| $exec = S_OR_B64 $exec, %6, implicit-def $scc |
| %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc |
| S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc |
| S_CBRANCH_SCC0 %bb.4, implicit killed $scc |
| |
| bb.5: |
| S_BRANCH %bb.1 |
| |
| bb.4: |
| S_NOP 0, implicit %10, implicit %20 |
| S_NOP 0, implicit %11, implicit %21 |
| S_NOP 0, implicit %12, implicit %22 |
| S_NOP 0, implicit %13, implicit %23 |
| S_NOP 0, implicit %14, implicit %24 |
| S_NOP 0, implicit %15, implicit %25 |
| S_NOP 0, implicit %16, implicit %26 |
| S_NOP 0, implicit %17, implicit %27 |
| S_NOP 0, implicit %18, implicit %28 |
| S_NOP 0, implicit %19, implicit %29 |
| S_NOP 0, implicit %30, implicit %31 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %34, implicit %35 |
| S_NOP 0, implicit %36 |
| |
| S_NOP 0, implicit %100, implicit %101 |
| S_NOP 0, implicit %102, implicit %103 |
| S_NOP 0, implicit %104, implicit %105 |
| S_NOP 0, implicit %106, implicit %107 |
| S_NOP 0, implicit %108, implicit %109 |
| S_NOP 0, implicit %110, implicit %111 |
| S_NOP 0, implicit %112, implicit %113 |
| S_NOP 0, implicit %114, implicit %115 |
| S_NOP 0, implicit %116, implicit %117 |
| S_NOP 0, implicit %118, implicit %119 |
| S_NOP 0, implicit %120, implicit %121 |
| S_NOP 0, implicit %122, implicit %123 |
| S_NOP 0, implicit %124, implicit %125 |
| S_NOP 0, implicit %126, implicit %127 |
| S_NOP 0, implicit %128, implicit %129 |
| S_NOP 0, implicit %130, implicit %131 |
| S_NOP 0, implicit %132, implicit %133 |
| S_NOP 0, implicit %134, implicit %135 |
| S_NOP 0, implicit %136, implicit %137 |
| S_NOP 0, implicit %138, implicit %139 |
| S_NOP 0, implicit %140, implicit %141 |
| S_NOP 0, implicit %142, implicit %143 |
| S_NOP 0, implicit %144, implicit %145 |
| S_NOP 0, implicit %146, implicit %147 |
| S_NOP 0, implicit %148, implicit %149 |
| S_NOP 0, implicit %150, implicit %151 |
| S_NOP 0, implicit %152, implicit %153 |
| S_NOP 0, implicit %154, implicit %155 |
| S_NOP 0, implicit %156, implicit %157 |
| S_NOP 0, implicit %158, implicit %159 |
| S_NOP 0, implicit %160, implicit %161 |
| S_NOP 0, implicit %162, implicit %163 |
| S_NOP 0, implicit %164, implicit %165 |
| S_NOP 0, implicit %166, implicit %167 |
| S_NOP 0, implicit %168, implicit %169 |
| S_NOP 0, implicit %170, implicit %171 |
| S_NOP 0, implicit %172, implicit %173 |
| S_NOP 0, implicit %174, implicit %175 |
| S_NOP 0, implicit %176, implicit %177 |
| S_NOP 0, implicit %178, implicit %179 |
| S_NOP 0, implicit %180 |
| |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_no_sink_26vgprs_but_only_one_sinkable |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_no_sink_26vgprs_but_only_one_sinkable |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %24, implicit %25 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: S_NOP 0, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %22 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %24, implicit %25 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %23 |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_no_sink_limited_by_sgprs |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_no_sink_limited_by_sgprs |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: liveins: $vgpr0, $sgpr0_sgpr1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 |
| ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| ; GFX908-NEXT: undef %4.sub1:sreg_64 = S_MOV_B32 0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 0 |
| ; GFX908-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sgpr_32 = S_MOV_B32 1 |
| ; GFX908-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sgpr_32 = S_MOV_B32 2 |
| ; GFX908-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sgpr_32 = S_MOV_B32 3 |
| ; GFX908-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sgpr_32 = S_MOV_B32 4 |
| ; GFX908-NEXT: [[S_MOV_B32_5:%[0-9]+]]:sgpr_32 = S_MOV_B32 5 |
| ; GFX908-NEXT: [[S_MOV_B32_6:%[0-9]+]]:sgpr_32 = S_MOV_B32 6 |
| ; GFX908-NEXT: [[S_MOV_B32_7:%[0-9]+]]:sgpr_32 = S_MOV_B32 7 |
| ; GFX908-NEXT: [[S_MOV_B32_8:%[0-9]+]]:sgpr_32 = S_MOV_B32 8 |
| ; GFX908-NEXT: [[S_MOV_B32_9:%[0-9]+]]:sgpr_32 = S_MOV_B32 9 |
| ; GFX908-NEXT: [[S_MOV_B32_10:%[0-9]+]]:sgpr_32 = S_MOV_B32 10 |
| ; GFX908-NEXT: [[S_MOV_B32_11:%[0-9]+]]:sgpr_32 = S_MOV_B32 11 |
| ; GFX908-NEXT: [[S_MOV_B32_12:%[0-9]+]]:sgpr_32 = S_MOV_B32 12 |
| ; GFX908-NEXT: [[S_MOV_B32_13:%[0-9]+]]:sgpr_32 = S_MOV_B32 13 |
| ; GFX908-NEXT: [[S_MOV_B32_14:%[0-9]+]]:sgpr_32 = S_MOV_B32 14 |
| ; GFX908-NEXT: [[S_MOV_B32_15:%[0-9]+]]:sgpr_32 = S_MOV_B32 15 |
| ; GFX908-NEXT: [[S_MOV_B32_16:%[0-9]+]]:sgpr_32 = S_MOV_B32 16 |
| ; GFX908-NEXT: [[S_MOV_B32_17:%[0-9]+]]:sgpr_32 = S_MOV_B32 17 |
| ; GFX908-NEXT: [[S_MOV_B32_18:%[0-9]+]]:sgpr_32 = S_MOV_B32 18 |
| ; GFX908-NEXT: [[S_MOV_B32_19:%[0-9]+]]:sgpr_32 = S_MOV_B32 19 |
| ; GFX908-NEXT: [[S_MOV_B32_20:%[0-9]+]]:sgpr_32 = S_MOV_B32 20 |
| ; GFX908-NEXT: [[S_MOV_B32_21:%[0-9]+]]:sgpr_32 = S_MOV_B32 21 |
| ; GFX908-NEXT: [[S_MOV_B32_22:%[0-9]+]]:sgpr_32 = S_MOV_B32 22 |
| ; GFX908-NEXT: [[S_MOV_B32_23:%[0-9]+]]:sgpr_32 = S_MOV_B32 23 |
| ; GFX908-NEXT: [[S_MOV_B32_24:%[0-9]+]]:sgpr_32 = S_MOV_B32 24 |
| ; GFX908-NEXT: [[S_MOV_B32_25:%[0-9]+]]:sgpr_32 = S_MOV_B32 25 |
| ; GFX908-NEXT: [[S_MOV_B32_26:%[0-9]+]]:sgpr_32 = S_MOV_B32 26 |
| ; GFX908-NEXT: [[S_MOV_B32_27:%[0-9]+]]:sgpr_32 = S_MOV_B32 27 |
| ; GFX908-NEXT: [[S_MOV_B32_28:%[0-9]+]]:sgpr_32 = S_MOV_B32 28 |
| ; GFX908-NEXT: [[S_MOV_B32_29:%[0-9]+]]:sgpr_32 = S_MOV_B32 29 |
| ; GFX908-NEXT: [[S_MOV_B32_30:%[0-9]+]]:sgpr_32 = S_MOV_B32 30 |
| ; GFX908-NEXT: [[S_MOV_B32_31:%[0-9]+]]:sgpr_32 = S_MOV_B32 31 |
| ; GFX908-NEXT: [[S_MOV_B32_32:%[0-9]+]]:sgpr_32 = S_MOV_B32 32 |
| ; GFX908-NEXT: [[S_MOV_B32_33:%[0-9]+]]:sgpr_32 = S_MOV_B32 33 |
| ; GFX908-NEXT: [[S_MOV_B32_34:%[0-9]+]]:sgpr_32 = S_MOV_B32 34 |
| ; GFX908-NEXT: [[S_MOV_B32_35:%[0-9]+]]:sgpr_32 = S_MOV_B32 35 |
| ; GFX908-NEXT: [[S_MOV_B32_36:%[0-9]+]]:sgpr_32 = S_MOV_B32 36 |
| ; GFX908-NEXT: [[S_MOV_B32_37:%[0-9]+]]:sgpr_32 = S_MOV_B32 37 |
| ; GFX908-NEXT: [[S_MOV_B32_38:%[0-9]+]]:sgpr_32 = S_MOV_B32 38 |
| ; GFX908-NEXT: [[S_MOV_B32_39:%[0-9]+]]:sgpr_32 = S_MOV_B32 39 |
| ; GFX908-NEXT: [[S_MOV_B32_40:%[0-9]+]]:sgpr_32 = S_MOV_B32 40 |
| ; GFX908-NEXT: [[S_MOV_B32_41:%[0-9]+]]:sgpr_32 = S_MOV_B32 41 |
| ; GFX908-NEXT: [[S_MOV_B32_42:%[0-9]+]]:sgpr_32 = S_MOV_B32 42 |
| ; GFX908-NEXT: [[S_MOV_B32_43:%[0-9]+]]:sgpr_32 = S_MOV_B32 43 |
| ; GFX908-NEXT: [[S_MOV_B32_44:%[0-9]+]]:sgpr_32 = S_MOV_B32 44 |
| ; GFX908-NEXT: [[S_MOV_B32_45:%[0-9]+]]:sgpr_32 = S_MOV_B32 45 |
| ; GFX908-NEXT: [[S_MOV_B32_46:%[0-9]+]]:sgpr_32 = S_MOV_B32 46 |
| ; GFX908-NEXT: [[S_MOV_B32_47:%[0-9]+]]:sgpr_32 = S_MOV_B32 47 |
| ; GFX908-NEXT: [[S_MOV_B32_48:%[0-9]+]]:sgpr_32 = S_MOV_B32 48 |
| ; GFX908-NEXT: [[S_MOV_B32_49:%[0-9]+]]:sgpr_32 = S_MOV_B32 49 |
| ; GFX908-NEXT: [[S_MOV_B32_50:%[0-9]+]]:sgpr_32 = S_MOV_B32 50 |
| ; GFX908-NEXT: [[S_MOV_B32_51:%[0-9]+]]:sgpr_32 = S_MOV_B32 51 |
| ; GFX908-NEXT: [[S_MOV_B32_52:%[0-9]+]]:sgpr_32 = S_MOV_B32 52 |
| ; GFX908-NEXT: [[S_MOV_B32_53:%[0-9]+]]:sgpr_32 = S_MOV_B32 53 |
| ; GFX908-NEXT: [[S_MOV_B32_54:%[0-9]+]]:sgpr_32 = S_MOV_B32 54 |
| ; GFX908-NEXT: [[S_MOV_B32_55:%[0-9]+]]:sgpr_32 = S_MOV_B32 55 |
| ; GFX908-NEXT: [[S_MOV_B32_56:%[0-9]+]]:sgpr_32 = S_MOV_B32 56 |
| ; GFX908-NEXT: [[S_MOV_B32_57:%[0-9]+]]:sgpr_32 = S_MOV_B32 57 |
| ; GFX908-NEXT: [[S_MOV_B32_58:%[0-9]+]]:sgpr_32 = S_MOV_B32 58 |
| ; GFX908-NEXT: [[S_MOV_B32_59:%[0-9]+]]:sgpr_32 = S_MOV_B32 59 |
| ; GFX908-NEXT: [[S_MOV_B32_60:%[0-9]+]]:sgpr_32 = S_MOV_B32 60 |
| ; GFX908-NEXT: [[S_MOV_B32_61:%[0-9]+]]:sgpr_32 = S_MOV_B32 61 |
| ; GFX908-NEXT: [[S_MOV_B32_62:%[0-9]+]]:sgpr_32 = S_MOV_B32 62 |
| ; GFX908-NEXT: [[S_MOV_B32_63:%[0-9]+]]:sgpr_32 = S_MOV_B32 63 |
| ; GFX908-NEXT: [[S_MOV_B32_64:%[0-9]+]]:sgpr_32 = S_MOV_B32 64 |
| ; GFX908-NEXT: [[S_MOV_B32_65:%[0-9]+]]:sgpr_32 = S_MOV_B32 65 |
| ; GFX908-NEXT: [[S_MOV_B32_66:%[0-9]+]]:sgpr_32 = S_MOV_B32 66 |
| ; GFX908-NEXT: [[S_MOV_B32_67:%[0-9]+]]:sgpr_32 = S_MOV_B32 67 |
| ; GFX908-NEXT: [[S_MOV_B32_68:%[0-9]+]]:sgpr_32 = S_MOV_B32 68 |
| ; GFX908-NEXT: [[S_MOV_B32_69:%[0-9]+]]:sgpr_32 = S_MOV_B32 69 |
| ; GFX908-NEXT: [[S_MOV_B32_70:%[0-9]+]]:sgpr_32 = S_MOV_B32 70 |
| ; GFX908-NEXT: [[S_MOV_B32_71:%[0-9]+]]:sgpr_32 = S_MOV_B32 71 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: [[S_MOV_B32_72:%[0-9]+]]:sgpr_32 = S_MOV_B32 72 |
| ; GFX908-NEXT: [[S_MOV_B32_73:%[0-9]+]]:sgpr_32 = S_MOV_B32 73 |
| ; GFX908-NEXT: [[S_MOV_B32_74:%[0-9]+]]:sgpr_32 = S_MOV_B32 74 |
| ; GFX908-NEXT: [[S_MOV_B32_75:%[0-9]+]]:sgpr_32 = S_MOV_B32 75 |
| ; GFX908-NEXT: [[S_MOV_B32_76:%[0-9]+]]:sgpr_32 = S_MOV_B32 76 |
| ; GFX908-NEXT: [[S_MOV_B32_77:%[0-9]+]]:sgpr_32 = S_MOV_B32 77 |
| ; GFX908-NEXT: [[S_MOV_B32_78:%[0-9]+]]:sgpr_32 = S_MOV_B32 78 |
| ; GFX908-NEXT: [[S_MOV_B32_79:%[0-9]+]]:sgpr_32 = S_MOV_B32 79 |
| ; GFX908-NEXT: [[S_MOV_B32_80:%[0-9]+]]:sgpr_32 = S_MOV_B32 80 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec |
| ; GFX908-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc |
| ; GFX908-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]] |
| ; GFX908-NEXT: S_CBRANCH_EXECZ %bb.3, implicit $exec |
| ; GFX908-NEXT: S_BRANCH %bb.2 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec |
| ; GFX908-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_]] |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: successors: %bb.5(0x04000000), %bb.4(0x7c000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: S_NOP 0, implicit %28 |
| ; GFX908-NEXT: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc |
| ; GFX908-NEXT: S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc |
| ; GFX908-NEXT: S_CBRANCH_SCC0 %bb.5, implicit killed $scc |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.4: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: S_BRANCH %bb.1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.5: |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_]], implicit [[S_MOV_B32_1]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_2]], implicit [[S_MOV_B32_3]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_4]], implicit [[S_MOV_B32_5]] |
| ; GFX908-NEXT: S_NOP 0, implicit %5, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %16 |
| ; GFX908-NEXT: S_NOP 0, implicit %7, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %18 |
| ; GFX908-NEXT: S_NOP 0, implicit %9, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %20 |
| ; GFX908-NEXT: S_NOP 0, implicit %11, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %22 |
| ; GFX908-NEXT: S_NOP 0, implicit %13, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %24 |
| ; GFX908-NEXT: S_NOP 0, implicit %25, implicit %26 |
| ; GFX908-NEXT: S_NOP 0, implicit %27 |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_6]], implicit [[S_MOV_B32_7]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_8]], implicit [[S_MOV_B32_9]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_10]], implicit [[S_MOV_B32_11]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_12]], implicit [[S_MOV_B32_13]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_14]], implicit [[S_MOV_B32_15]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_16]], implicit [[S_MOV_B32_17]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_18]], implicit [[S_MOV_B32_19]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_20]], implicit [[S_MOV_B32_21]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_22]], implicit [[S_MOV_B32_23]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_24]], implicit [[S_MOV_B32_25]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_26]], implicit [[S_MOV_B32_27]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_28]], implicit [[S_MOV_B32_29]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_30]], implicit [[S_MOV_B32_31]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_32]], implicit [[S_MOV_B32_33]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_34]], implicit [[S_MOV_B32_35]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_36]], implicit [[S_MOV_B32_37]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_38]], implicit [[S_MOV_B32_39]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_40]], implicit [[S_MOV_B32_41]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_42]], implicit [[S_MOV_B32_43]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_44]], implicit [[S_MOV_B32_45]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_46]], implicit [[S_MOV_B32_47]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_48]], implicit [[S_MOV_B32_49]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_50]], implicit [[S_MOV_B32_51]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_52]], implicit [[S_MOV_B32_53]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_54]], implicit [[S_MOV_B32_55]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_56]], implicit [[S_MOV_B32_57]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_58]], implicit [[S_MOV_B32_59]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_60]], implicit [[S_MOV_B32_61]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_62]], implicit [[S_MOV_B32_63]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_64]], implicit [[S_MOV_B32_65]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_66]], implicit [[S_MOV_B32_67]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_68]], implicit [[S_MOV_B32_69]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_70]], implicit [[S_MOV_B32_71]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_72]], implicit [[S_MOV_B32_73]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_74]], implicit [[S_MOV_B32_75]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_76]], implicit [[S_MOV_B32_77]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_78]], implicit [[S_MOV_B32_79]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_80]] |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| liveins: $vgpr0, $sgpr0_sgpr1 |
| |
| %1:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| %2:vgpr_32(s32) = COPY $vgpr0 |
| %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec |
| undef %5.sub1:sreg_64 = S_MOV_B32 0 |
| %5.sub0:sreg_64 = COPY %3.sub1 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| %100:sgpr_32 = S_MOV_B32 0 |
| %101:sgpr_32 = S_MOV_B32 1 |
| %102:sgpr_32 = S_MOV_B32 2 |
| %103:sgpr_32 = S_MOV_B32 3 |
| %104:sgpr_32 = S_MOV_B32 4 |
| %105:sgpr_32 = S_MOV_B32 5 |
| %106:sgpr_32 = S_MOV_B32 6 |
| %107:sgpr_32 = S_MOV_B32 7 |
| %108:sgpr_32 = S_MOV_B32 8 |
| %109:sgpr_32 = S_MOV_B32 9 |
| %110:sgpr_32 = S_MOV_B32 10 |
| %111:sgpr_32 = S_MOV_B32 11 |
| %112:sgpr_32 = S_MOV_B32 12 |
| %113:sgpr_32 = S_MOV_B32 13 |
| %114:sgpr_32 = S_MOV_B32 14 |
| %115:sgpr_32 = S_MOV_B32 15 |
| %116:sgpr_32 = S_MOV_B32 16 |
| %117:sgpr_32 = S_MOV_B32 17 |
| %118:sgpr_32 = S_MOV_B32 18 |
| %119:sgpr_32 = S_MOV_B32 19 |
| %120:sgpr_32 = S_MOV_B32 20 |
| %121:sgpr_32 = S_MOV_B32 21 |
| %122:sgpr_32 = S_MOV_B32 22 |
| %123:sgpr_32 = S_MOV_B32 23 |
| %124:sgpr_32 = S_MOV_B32 24 |
| %125:sgpr_32 = S_MOV_B32 25 |
| %126:sgpr_32 = S_MOV_B32 26 |
| %127:sgpr_32 = S_MOV_B32 27 |
| %128:sgpr_32 = S_MOV_B32 28 |
| %129:sgpr_32 = S_MOV_B32 29 |
| %130:sgpr_32 = S_MOV_B32 30 |
| %131:sgpr_32 = S_MOV_B32 31 |
| %132:sgpr_32 = S_MOV_B32 32 |
| %133:sgpr_32 = S_MOV_B32 33 |
| %134:sgpr_32 = S_MOV_B32 34 |
| %135:sgpr_32 = S_MOV_B32 35 |
| %136:sgpr_32 = S_MOV_B32 36 |
| %137:sgpr_32 = S_MOV_B32 37 |
| %138:sgpr_32 = S_MOV_B32 38 |
| %139:sgpr_32 = S_MOV_B32 39 |
| %140:sgpr_32 = S_MOV_B32 40 |
| %141:sgpr_32 = S_MOV_B32 41 |
| %142:sgpr_32 = S_MOV_B32 42 |
| %143:sgpr_32 = S_MOV_B32 43 |
| %144:sgpr_32 = S_MOV_B32 44 |
| %145:sgpr_32 = S_MOV_B32 45 |
| %146:sgpr_32 = S_MOV_B32 46 |
| %147:sgpr_32 = S_MOV_B32 47 |
| %148:sgpr_32 = S_MOV_B32 48 |
| %149:sgpr_32 = S_MOV_B32 49 |
| %150:sgpr_32 = S_MOV_B32 50 |
| %151:sgpr_32 = S_MOV_B32 51 |
| %152:sgpr_32 = S_MOV_B32 52 |
| %153:sgpr_32 = S_MOV_B32 53 |
| %154:sgpr_32 = S_MOV_B32 54 |
| %155:sgpr_32 = S_MOV_B32 55 |
| %156:sgpr_32 = S_MOV_B32 56 |
| %157:sgpr_32 = S_MOV_B32 57 |
| %158:sgpr_32 = S_MOV_B32 58 |
| %159:sgpr_32 = S_MOV_B32 59 |
| %160:sgpr_32 = S_MOV_B32 60 |
| %161:sgpr_32 = S_MOV_B32 61 |
| %162:sgpr_32 = S_MOV_B32 62 |
| %163:sgpr_32 = S_MOV_B32 63 |
| %164:sgpr_32 = S_MOV_B32 64 |
| %165:sgpr_32 = S_MOV_B32 65 |
| %166:sgpr_32 = S_MOV_B32 66 |
| %167:sgpr_32 = S_MOV_B32 67 |
| %168:sgpr_32 = S_MOV_B32 68 |
| %169:sgpr_32 = S_MOV_B32 69 |
| %170:sgpr_32 = S_MOV_B32 70 |
| %171:sgpr_32 = S_MOV_B32 71 |
| %172:sgpr_32 = S_MOV_B32 72 |
| %173:sgpr_32 = S_MOV_B32 73 |
| %174:sgpr_32 = S_MOV_B32 74 |
| %175:sgpr_32 = S_MOV_B32 75 |
| %176:sgpr_32 = S_MOV_B32 76 |
| %177:sgpr_32 = S_MOV_B32 77 |
| %178:sgpr_32 = S_MOV_B32 78 |
| %179:sgpr_32 = S_MOV_B32 79 |
| %180:sgpr_32 = S_MOV_B32 80 |
| |
| bb.1: |
| successors: %bb.2, %bb.3 |
| |
| %6:sreg_64 = COPY $exec, implicit-def $exec |
| %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc |
| $exec = S_MOV_B64_term %7 |
| S_CBRANCH_EXECZ %bb.3, implicit $exec |
| S_BRANCH %bb.2 |
| |
| bb.2: |
| %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec |
| S_NOP 0, implicit %34 |
| |
| bb.3: |
| successors: %bb.4(0x04000000), %bb.5(0x7c000000) |
| |
| S_NOP 0, implicit %33 |
| $exec = S_OR_B64 $exec, %6, implicit-def $scc |
| %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc |
| S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc |
| S_CBRANCH_SCC0 %bb.4, implicit killed $scc |
| |
| bb.5: |
| S_BRANCH %bb.1 |
| |
| bb.4: |
| S_NOP 0, implicit %10, implicit %20 |
| S_NOP 0, implicit %11, implicit %21 |
| S_NOP 0, implicit %12, implicit %22 |
| S_NOP 0, implicit %13, implicit %23 |
| S_NOP 0, implicit %14, implicit %24 |
| S_NOP 0, implicit %15, implicit %25 |
| S_NOP 0, implicit %16, implicit %26 |
| S_NOP 0, implicit %17, implicit %27 |
| S_NOP 0, implicit %18, implicit %28 |
| S_NOP 0, implicit %19, implicit %29 |
| S_NOP 0, implicit %30, implicit %31 |
| S_NOP 0, implicit %32 |
| |
| S_NOP 0, implicit %100, implicit %101 |
| S_NOP 0, implicit %102, implicit %103 |
| S_NOP 0, implicit %104, implicit %105 |
| S_NOP 0, implicit %106, implicit %107 |
| S_NOP 0, implicit %108, implicit %109 |
| S_NOP 0, implicit %110, implicit %111 |
| S_NOP 0, implicit %112, implicit %113 |
| S_NOP 0, implicit %114, implicit %115 |
| S_NOP 0, implicit %116, implicit %117 |
| S_NOP 0, implicit %118, implicit %119 |
| S_NOP 0, implicit %120, implicit %121 |
| S_NOP 0, implicit %122, implicit %123 |
| S_NOP 0, implicit %124, implicit %125 |
| S_NOP 0, implicit %126, implicit %127 |
| S_NOP 0, implicit %128, implicit %129 |
| S_NOP 0, implicit %130, implicit %131 |
| S_NOP 0, implicit %132, implicit %133 |
| S_NOP 0, implicit %134, implicit %135 |
| S_NOP 0, implicit %136, implicit %137 |
| S_NOP 0, implicit %138, implicit %139 |
| S_NOP 0, implicit %140, implicit %141 |
| S_NOP 0, implicit %142, implicit %143 |
| S_NOP 0, implicit %144, implicit %145 |
| S_NOP 0, implicit %146, implicit %147 |
| S_NOP 0, implicit %148, implicit %149 |
| S_NOP 0, implicit %150, implicit %151 |
| S_NOP 0, implicit %152, implicit %153 |
| S_NOP 0, implicit %154, implicit %155 |
| S_NOP 0, implicit %156, implicit %157 |
| S_NOP 0, implicit %158, implicit %159 |
| S_NOP 0, implicit %160, implicit %161 |
| S_NOP 0, implicit %162, implicit %163 |
| S_NOP 0, implicit %164, implicit %165 |
| S_NOP 0, implicit %166, implicit %167 |
| S_NOP 0, implicit %168, implicit %169 |
| S_NOP 0, implicit %170, implicit %171 |
| S_NOP 0, implicit %172, implicit %173 |
| S_NOP 0, implicit %174, implicit %175 |
| S_NOP 0, implicit %176, implicit %177 |
| S_NOP 0, implicit %178, implicit %179 |
| S_NOP 0, implicit %180 |
| |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_8_no_sink_limited_by_sgprs |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_8_no_sink_limited_by_sgprs |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: liveins: $vgpr0, $sgpr0_sgpr1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 |
| ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| ; GFX908-NEXT: undef %4.sub1:sreg_64 = S_MOV_B32 0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 0 |
| ; GFX908-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sgpr_32 = S_MOV_B32 1 |
| ; GFX908-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sgpr_32 = S_MOV_B32 2 |
| ; GFX908-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sgpr_32 = S_MOV_B32 3 |
| ; GFX908-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sgpr_32 = S_MOV_B32 4 |
| ; GFX908-NEXT: [[S_MOV_B32_5:%[0-9]+]]:sgpr_32 = S_MOV_B32 5 |
| ; GFX908-NEXT: [[S_MOV_B32_6:%[0-9]+]]:sgpr_32 = S_MOV_B32 6 |
| ; GFX908-NEXT: [[S_MOV_B32_7:%[0-9]+]]:sgpr_32 = S_MOV_B32 7 |
| ; GFX908-NEXT: [[S_MOV_B32_8:%[0-9]+]]:sgpr_32 = S_MOV_B32 8 |
| ; GFX908-NEXT: [[S_MOV_B32_9:%[0-9]+]]:sgpr_32 = S_MOV_B32 9 |
| ; GFX908-NEXT: [[S_MOV_B32_10:%[0-9]+]]:sgpr_32 = S_MOV_B32 10 |
| ; GFX908-NEXT: [[S_MOV_B32_11:%[0-9]+]]:sgpr_32 = S_MOV_B32 11 |
| ; GFX908-NEXT: [[S_MOV_B32_12:%[0-9]+]]:sgpr_32 = S_MOV_B32 12 |
| ; GFX908-NEXT: [[S_MOV_B32_13:%[0-9]+]]:sgpr_32 = S_MOV_B32 13 |
| ; GFX908-NEXT: [[S_MOV_B32_14:%[0-9]+]]:sgpr_32 = S_MOV_B32 14 |
| ; GFX908-NEXT: [[S_MOV_B32_15:%[0-9]+]]:sgpr_32 = S_MOV_B32 15 |
| ; GFX908-NEXT: [[S_MOV_B32_16:%[0-9]+]]:sgpr_32 = S_MOV_B32 16 |
| ; GFX908-NEXT: [[S_MOV_B32_17:%[0-9]+]]:sgpr_32 = S_MOV_B32 17 |
| ; GFX908-NEXT: [[S_MOV_B32_18:%[0-9]+]]:sgpr_32 = S_MOV_B32 18 |
| ; GFX908-NEXT: [[S_MOV_B32_19:%[0-9]+]]:sgpr_32 = S_MOV_B32 19 |
| ; GFX908-NEXT: [[S_MOV_B32_20:%[0-9]+]]:sgpr_32 = S_MOV_B32 20 |
| ; GFX908-NEXT: [[S_MOV_B32_21:%[0-9]+]]:sgpr_32 = S_MOV_B32 21 |
| ; GFX908-NEXT: [[S_MOV_B32_22:%[0-9]+]]:sgpr_32 = S_MOV_B32 22 |
| ; GFX908-NEXT: [[S_MOV_B32_23:%[0-9]+]]:sgpr_32 = S_MOV_B32 23 |
| ; GFX908-NEXT: [[S_MOV_B32_24:%[0-9]+]]:sgpr_32 = S_MOV_B32 24 |
| ; GFX908-NEXT: [[S_MOV_B32_25:%[0-9]+]]:sgpr_32 = S_MOV_B32 25 |
| ; GFX908-NEXT: [[S_MOV_B32_26:%[0-9]+]]:sgpr_32 = S_MOV_B32 26 |
| ; GFX908-NEXT: [[S_MOV_B32_27:%[0-9]+]]:sgpr_32 = S_MOV_B32 27 |
| ; GFX908-NEXT: [[S_MOV_B32_28:%[0-9]+]]:sgpr_32 = S_MOV_B32 28 |
| ; GFX908-NEXT: [[S_MOV_B32_29:%[0-9]+]]:sgpr_32 = S_MOV_B32 29 |
| ; GFX908-NEXT: [[S_MOV_B32_30:%[0-9]+]]:sgpr_32 = S_MOV_B32 30 |
| ; GFX908-NEXT: [[S_MOV_B32_31:%[0-9]+]]:sgpr_32 = S_MOV_B32 31 |
| ; GFX908-NEXT: [[S_MOV_B32_32:%[0-9]+]]:sgpr_32 = S_MOV_B32 32 |
| ; GFX908-NEXT: [[S_MOV_B32_33:%[0-9]+]]:sgpr_32 = S_MOV_B32 33 |
| ; GFX908-NEXT: [[S_MOV_B32_34:%[0-9]+]]:sgpr_32 = S_MOV_B32 34 |
| ; GFX908-NEXT: [[S_MOV_B32_35:%[0-9]+]]:sgpr_32 = S_MOV_B32 35 |
| ; GFX908-NEXT: [[S_MOV_B32_36:%[0-9]+]]:sgpr_32 = S_MOV_B32 36 |
| ; GFX908-NEXT: [[S_MOV_B32_37:%[0-9]+]]:sgpr_32 = S_MOV_B32 37 |
| ; GFX908-NEXT: [[S_MOV_B32_38:%[0-9]+]]:sgpr_32 = S_MOV_B32 38 |
| ; GFX908-NEXT: [[S_MOV_B32_39:%[0-9]+]]:sgpr_32 = S_MOV_B32 39 |
| ; GFX908-NEXT: [[S_MOV_B32_40:%[0-9]+]]:sgpr_32 = S_MOV_B32 40 |
| ; GFX908-NEXT: [[S_MOV_B32_41:%[0-9]+]]:sgpr_32 = S_MOV_B32 41 |
| ; GFX908-NEXT: [[S_MOV_B32_42:%[0-9]+]]:sgpr_32 = S_MOV_B32 42 |
| ; GFX908-NEXT: [[S_MOV_B32_43:%[0-9]+]]:sgpr_32 = S_MOV_B32 43 |
| ; GFX908-NEXT: [[S_MOV_B32_44:%[0-9]+]]:sgpr_32 = S_MOV_B32 44 |
| ; GFX908-NEXT: [[S_MOV_B32_45:%[0-9]+]]:sgpr_32 = S_MOV_B32 45 |
| ; GFX908-NEXT: [[S_MOV_B32_46:%[0-9]+]]:sgpr_32 = S_MOV_B32 46 |
| ; GFX908-NEXT: [[S_MOV_B32_47:%[0-9]+]]:sgpr_32 = S_MOV_B32 47 |
| ; GFX908-NEXT: [[S_MOV_B32_48:%[0-9]+]]:sgpr_32 = S_MOV_B32 48 |
| ; GFX908-NEXT: [[S_MOV_B32_49:%[0-9]+]]:sgpr_32 = S_MOV_B32 49 |
| ; GFX908-NEXT: [[S_MOV_B32_50:%[0-9]+]]:sgpr_32 = S_MOV_B32 50 |
| ; GFX908-NEXT: [[S_MOV_B32_51:%[0-9]+]]:sgpr_32 = S_MOV_B32 51 |
| ; GFX908-NEXT: [[S_MOV_B32_52:%[0-9]+]]:sgpr_32 = S_MOV_B32 52 |
| ; GFX908-NEXT: [[S_MOV_B32_53:%[0-9]+]]:sgpr_32 = S_MOV_B32 53 |
| ; GFX908-NEXT: [[S_MOV_B32_54:%[0-9]+]]:sgpr_32 = S_MOV_B32 54 |
| ; GFX908-NEXT: [[S_MOV_B32_55:%[0-9]+]]:sgpr_32 = S_MOV_B32 55 |
| ; GFX908-NEXT: [[S_MOV_B32_56:%[0-9]+]]:sgpr_32 = S_MOV_B32 56 |
| ; GFX908-NEXT: [[S_MOV_B32_57:%[0-9]+]]:sgpr_32 = S_MOV_B32 57 |
| ; GFX908-NEXT: [[S_MOV_B32_58:%[0-9]+]]:sgpr_32 = S_MOV_B32 58 |
| ; GFX908-NEXT: [[S_MOV_B32_59:%[0-9]+]]:sgpr_32 = S_MOV_B32 59 |
| ; GFX908-NEXT: [[S_MOV_B32_60:%[0-9]+]]:sgpr_32 = S_MOV_B32 60 |
| ; GFX908-NEXT: [[S_MOV_B32_61:%[0-9]+]]:sgpr_32 = S_MOV_B32 61 |
| ; GFX908-NEXT: [[S_MOV_B32_62:%[0-9]+]]:sgpr_32 = S_MOV_B32 62 |
| ; GFX908-NEXT: [[S_MOV_B32_63:%[0-9]+]]:sgpr_32 = S_MOV_B32 63 |
| ; GFX908-NEXT: [[S_MOV_B32_64:%[0-9]+]]:sgpr_32 = S_MOV_B32 64 |
| ; GFX908-NEXT: [[S_MOV_B32_65:%[0-9]+]]:sgpr_32 = S_MOV_B32 65 |
| ; GFX908-NEXT: [[S_MOV_B32_66:%[0-9]+]]:sgpr_32 = S_MOV_B32 66 |
| ; GFX908-NEXT: [[S_MOV_B32_67:%[0-9]+]]:sgpr_32 = S_MOV_B32 67 |
| ; GFX908-NEXT: [[S_MOV_B32_68:%[0-9]+]]:sgpr_32 = S_MOV_B32 68 |
| ; GFX908-NEXT: [[S_MOV_B32_69:%[0-9]+]]:sgpr_32 = S_MOV_B32 69 |
| ; GFX908-NEXT: [[S_MOV_B32_70:%[0-9]+]]:sgpr_32 = S_MOV_B32 70 |
| ; GFX908-NEXT: [[S_MOV_B32_71:%[0-9]+]]:sgpr_32 = S_MOV_B32 71 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[S_MOV_B32_72:%[0-9]+]]:sgpr_32 = S_MOV_B32 72 |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[S_MOV_B32_73:%[0-9]+]]:sgpr_32 = S_MOV_B32 73 |
| ; GFX908-NEXT: %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[S_MOV_B32_74:%[0-9]+]]:sgpr_32 = S_MOV_B32 74 |
| ; GFX908-NEXT: %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: [[S_MOV_B32_75:%[0-9]+]]:sgpr_32 = S_MOV_B32 75 |
| ; GFX908-NEXT: [[S_MOV_B32_76:%[0-9]+]]:sgpr_32 = S_MOV_B32 76 |
| ; GFX908-NEXT: [[S_MOV_B32_77:%[0-9]+]]:sgpr_32 = S_MOV_B32 77 |
| ; GFX908-NEXT: [[S_MOV_B32_78:%[0-9]+]]:sgpr_32 = S_MOV_B32 78 |
| ; GFX908-NEXT: [[S_MOV_B32_79:%[0-9]+]]:sgpr_32 = S_MOV_B32 79 |
| ; GFX908-NEXT: [[S_MOV_B32_80:%[0-9]+]]:sgpr_32 = S_MOV_B32 80 |
| ; GFX908-NEXT: [[S_MOV_B32_81:%[0-9]+]]:sgpr_32 = S_MOV_B32 81 |
| ; GFX908-NEXT: [[S_MOV_B32_82:%[0-9]+]]:sgpr_32 = S_MOV_B32 82 |
| ; GFX908-NEXT: [[S_MOV_B32_83:%[0-9]+]]:sgpr_32 = S_MOV_B32 83 |
| ; GFX908-NEXT: [[S_MOV_B32_84:%[0-9]+]]:sgpr_32 = S_MOV_B32 84 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_]], implicit [[S_MOV_B32_1]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_2]], implicit [[S_MOV_B32_3]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_4]], implicit [[S_MOV_B32_5]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_6]], implicit [[S_MOV_B32_7]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_8]], implicit [[S_MOV_B32_9]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_10]], implicit [[S_MOV_B32_11]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_12]], implicit [[S_MOV_B32_13]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_14]], implicit [[S_MOV_B32_15]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_16]], implicit [[S_MOV_B32_17]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_18]], implicit [[S_MOV_B32_19]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_20]], implicit [[S_MOV_B32_21]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_22]], implicit [[S_MOV_B32_23]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_24]], implicit [[S_MOV_B32_25]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_26]], implicit [[S_MOV_B32_27]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_28]], implicit [[S_MOV_B32_29]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_30]], implicit [[S_MOV_B32_31]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_32]], implicit [[S_MOV_B32_33]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_34]], implicit [[S_MOV_B32_35]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_36]], implicit [[S_MOV_B32_37]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_38]], implicit [[S_MOV_B32_39]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_40]], implicit [[S_MOV_B32_41]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_42]], implicit [[S_MOV_B32_43]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_44]], implicit [[S_MOV_B32_45]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_46]], implicit [[S_MOV_B32_47]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_48]], implicit [[S_MOV_B32_49]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_50]], implicit [[S_MOV_B32_51]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_52]], implicit [[S_MOV_B32_53]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_54]], implicit [[S_MOV_B32_55]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_56]], implicit [[S_MOV_B32_57]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_58]], implicit [[S_MOV_B32_59]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_60]], implicit [[S_MOV_B32_61]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_62]], implicit [[S_MOV_B32_63]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_64]], implicit [[S_MOV_B32_65]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_66]], implicit [[S_MOV_B32_67]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_68]], implicit [[S_MOV_B32_69]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_70]], implicit [[S_MOV_B32_71]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_72]], implicit [[S_MOV_B32_73]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_74]], implicit [[S_MOV_B32_75]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_76]], implicit [[S_MOV_B32_77]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_78]], implicit [[S_MOV_B32_79]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_80]], implicit [[S_MOV_B32_81]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_82]], implicit [[S_MOV_B32_83]] |
| ; GFX908-NEXT: S_NOP 0, implicit [[S_MOV_B32_84]] |
| ; GFX908-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec |
| ; GFX908-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc |
| ; GFX908-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]] |
| ; GFX908-NEXT: S_CBRANCH_EXECZ %bb.3, implicit $exec |
| ; GFX908-NEXT: S_BRANCH %bb.2 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %116:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %116 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: successors: %bb.5(0x04000000), %bb.4(0x7c000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: S_NOP 0, implicit %28 |
| ; GFX908-NEXT: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc |
| ; GFX908-NEXT: S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc |
| ; GFX908-NEXT: S_CBRANCH_SCC0 %bb.5, implicit killed $scc |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.4: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: S_BRANCH %bb.1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.5: |
| ; GFX908-NEXT: S_NOP 0, implicit %5, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %16 |
| ; GFX908-NEXT: S_NOP 0, implicit %7, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %18 |
| ; GFX908-NEXT: S_NOP 0, implicit %9, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %20 |
| ; GFX908-NEXT: S_NOP 0, implicit %11, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %22 |
| ; GFX908-NEXT: S_NOP 0, implicit %13, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %24 |
| ; GFX908-NEXT: S_NOP 0, implicit %25, implicit %26 |
| ; GFX908-NEXT: S_NOP 0, implicit %27 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| liveins: $vgpr0, $sgpr0_sgpr1 |
| |
| %1:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| %2:vgpr_32(s32) = COPY $vgpr0 |
| %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec |
| undef %5.sub1:sreg_64 = S_MOV_B32 0 |
| %5.sub0:sreg_64 = COPY %3.sub1 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| %100:sgpr_32 = S_MOV_B32 0 |
| %101:sgpr_32 = S_MOV_B32 1 |
| %102:sgpr_32 = S_MOV_B32 2 |
| %103:sgpr_32 = S_MOV_B32 3 |
| %104:sgpr_32 = S_MOV_B32 4 |
| %105:sgpr_32 = S_MOV_B32 5 |
| %106:sgpr_32 = S_MOV_B32 6 |
| %107:sgpr_32 = S_MOV_B32 7 |
| %108:sgpr_32 = S_MOV_B32 8 |
| %109:sgpr_32 = S_MOV_B32 9 |
| %110:sgpr_32 = S_MOV_B32 10 |
| %111:sgpr_32 = S_MOV_B32 11 |
| %112:sgpr_32 = S_MOV_B32 12 |
| %113:sgpr_32 = S_MOV_B32 13 |
| %114:sgpr_32 = S_MOV_B32 14 |
| %115:sgpr_32 = S_MOV_B32 15 |
| %116:sgpr_32 = S_MOV_B32 16 |
| %117:sgpr_32 = S_MOV_B32 17 |
| %118:sgpr_32 = S_MOV_B32 18 |
| %119:sgpr_32 = S_MOV_B32 19 |
| %120:sgpr_32 = S_MOV_B32 20 |
| %121:sgpr_32 = S_MOV_B32 21 |
| %122:sgpr_32 = S_MOV_B32 22 |
| %123:sgpr_32 = S_MOV_B32 23 |
| %124:sgpr_32 = S_MOV_B32 24 |
| %125:sgpr_32 = S_MOV_B32 25 |
| %126:sgpr_32 = S_MOV_B32 26 |
| %127:sgpr_32 = S_MOV_B32 27 |
| %128:sgpr_32 = S_MOV_B32 28 |
| %129:sgpr_32 = S_MOV_B32 29 |
| %130:sgpr_32 = S_MOV_B32 30 |
| %131:sgpr_32 = S_MOV_B32 31 |
| %132:sgpr_32 = S_MOV_B32 32 |
| %133:sgpr_32 = S_MOV_B32 33 |
| %134:sgpr_32 = S_MOV_B32 34 |
| %135:sgpr_32 = S_MOV_B32 35 |
| %136:sgpr_32 = S_MOV_B32 36 |
| %137:sgpr_32 = S_MOV_B32 37 |
| %138:sgpr_32 = S_MOV_B32 38 |
| %139:sgpr_32 = S_MOV_B32 39 |
| %140:sgpr_32 = S_MOV_B32 40 |
| %141:sgpr_32 = S_MOV_B32 41 |
| %142:sgpr_32 = S_MOV_B32 42 |
| %143:sgpr_32 = S_MOV_B32 43 |
| %144:sgpr_32 = S_MOV_B32 44 |
| %145:sgpr_32 = S_MOV_B32 45 |
| %146:sgpr_32 = S_MOV_B32 46 |
| %147:sgpr_32 = S_MOV_B32 47 |
| %148:sgpr_32 = S_MOV_B32 48 |
| %149:sgpr_32 = S_MOV_B32 49 |
| %150:sgpr_32 = S_MOV_B32 50 |
| %151:sgpr_32 = S_MOV_B32 51 |
| %152:sgpr_32 = S_MOV_B32 52 |
| %153:sgpr_32 = S_MOV_B32 53 |
| %154:sgpr_32 = S_MOV_B32 54 |
| %155:sgpr_32 = S_MOV_B32 55 |
| %156:sgpr_32 = S_MOV_B32 56 |
| %157:sgpr_32 = S_MOV_B32 57 |
| %158:sgpr_32 = S_MOV_B32 58 |
| %159:sgpr_32 = S_MOV_B32 59 |
| %160:sgpr_32 = S_MOV_B32 60 |
| %161:sgpr_32 = S_MOV_B32 61 |
| %162:sgpr_32 = S_MOV_B32 62 |
| %163:sgpr_32 = S_MOV_B32 63 |
| %164:sgpr_32 = S_MOV_B32 64 |
| %165:sgpr_32 = S_MOV_B32 65 |
| %166:sgpr_32 = S_MOV_B32 66 |
| %167:sgpr_32 = S_MOV_B32 67 |
| %168:sgpr_32 = S_MOV_B32 68 |
| %169:sgpr_32 = S_MOV_B32 69 |
| %170:sgpr_32 = S_MOV_B32 70 |
| %171:sgpr_32 = S_MOV_B32 71 |
| %172:sgpr_32 = S_MOV_B32 72 |
| %173:sgpr_32 = S_MOV_B32 73 |
| %174:sgpr_32 = S_MOV_B32 74 |
| %175:sgpr_32 = S_MOV_B32 75 |
| %176:sgpr_32 = S_MOV_B32 76 |
| %177:sgpr_32 = S_MOV_B32 77 |
| %178:sgpr_32 = S_MOV_B32 78 |
| %179:sgpr_32 = S_MOV_B32 79 |
| %180:sgpr_32 = S_MOV_B32 80 |
| %181:sgpr_32 = S_MOV_B32 81 |
| %182:sgpr_32 = S_MOV_B32 82 |
| %183:sgpr_32 = S_MOV_B32 83 |
| %184:sgpr_32 = S_MOV_B32 84 |
| |
| bb.1: |
| successors: %bb.2, %bb.3 |
| |
| S_NOP 0, implicit %100, implicit %101 |
| S_NOP 0, implicit %102, implicit %103 |
| S_NOP 0, implicit %104, implicit %105 |
| S_NOP 0, implicit %106, implicit %107 |
| S_NOP 0, implicit %108, implicit %109 |
| S_NOP 0, implicit %110, implicit %111 |
| S_NOP 0, implicit %112, implicit %113 |
| S_NOP 0, implicit %114, implicit %115 |
| S_NOP 0, implicit %116, implicit %117 |
| S_NOP 0, implicit %118, implicit %119 |
| S_NOP 0, implicit %120, implicit %121 |
| S_NOP 0, implicit %122, implicit %123 |
| S_NOP 0, implicit %124, implicit %125 |
| S_NOP 0, implicit %126, implicit %127 |
| S_NOP 0, implicit %128, implicit %129 |
| S_NOP 0, implicit %130, implicit %131 |
| S_NOP 0, implicit %132, implicit %133 |
| S_NOP 0, implicit %134, implicit %135 |
| S_NOP 0, implicit %136, implicit %137 |
| S_NOP 0, implicit %138, implicit %139 |
| S_NOP 0, implicit %140, implicit %141 |
| S_NOP 0, implicit %142, implicit %143 |
| S_NOP 0, implicit %144, implicit %145 |
| S_NOP 0, implicit %146, implicit %147 |
| S_NOP 0, implicit %148, implicit %149 |
| S_NOP 0, implicit %150, implicit %151 |
| S_NOP 0, implicit %152, implicit %153 |
| S_NOP 0, implicit %154, implicit %155 |
| S_NOP 0, implicit %156, implicit %157 |
| S_NOP 0, implicit %158, implicit %159 |
| S_NOP 0, implicit %160, implicit %161 |
| S_NOP 0, implicit %162, implicit %163 |
| S_NOP 0, implicit %164, implicit %165 |
| S_NOP 0, implicit %166, implicit %167 |
| S_NOP 0, implicit %168, implicit %169 |
| S_NOP 0, implicit %170, implicit %171 |
| S_NOP 0, implicit %172, implicit %173 |
| S_NOP 0, implicit %174, implicit %175 |
| S_NOP 0, implicit %176, implicit %177 |
| S_NOP 0, implicit %178, implicit %179 |
| S_NOP 0, implicit %180, implicit %181 |
| S_NOP 0, implicit %182, implicit %183 |
| S_NOP 0, implicit %184 |
| %6:sreg_64 = COPY $exec, implicit-def $exec |
| %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc |
| $exec = S_MOV_B64_term %7 |
| S_CBRANCH_EXECZ %bb.3, implicit $exec |
| S_BRANCH %bb.2 |
| |
| bb.2: |
| %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %34 |
| |
| bb.3: |
| successors: %bb.4(0x04000000), %bb.5(0x7c000000) |
| |
| S_NOP 0, implicit %33 |
| $exec = S_OR_B64 $exec, %6, implicit-def $scc |
| %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc |
| S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc |
| S_CBRANCH_SCC0 %bb.4, implicit killed $scc |
| |
| bb.5: |
| S_BRANCH %bb.1 |
| |
| bb.4: |
| S_NOP 0, implicit %10, implicit %20 |
| S_NOP 0, implicit %11, implicit %21 |
| S_NOP 0, implicit %12, implicit %22 |
| S_NOP 0, implicit %13, implicit %23 |
| S_NOP 0, implicit %14, implicit %24 |
| S_NOP 0, implicit %15, implicit %25 |
| S_NOP 0, implicit %16, implicit %26 |
| S_NOP 0, implicit %17, implicit %27 |
| S_NOP 0, implicit %18, implicit %28 |
| S_NOP 0, implicit %19, implicit %29 |
| S_NOP 0, implicit %30, implicit %31 |
| S_NOP 0, implicit %32 |
| |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_no_sink_two_blocks_high_rp_but_only_one_improved |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_no_sink_two_blocks_high_rp_but_only_one_improved |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %24 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %23 |
| ; GFX908-NEXT: S_NOP 0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: successors: %bb.4(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %26, implicit %27 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.4: |
| ; GFX908-NEXT: S_NOP 0, implicit %25 |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %22 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %24 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| successors: %bb.3 |
| |
| S_NOP 0, implicit %23 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode |
| S_NOP 0 |
| |
| bb.3: |
| ; predecessors: %bb.2 |
| successors: %bb.4 |
| |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %26, implicit %27 |
| |
| bb.4: |
| ; predcessors: %bb.3 |
| |
| S_NOP 0, implicit %25 |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_no_sink_subreg_all_defs_not_in_use_block |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_no_sink_subreg_all_defs_not_in_use_block |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: undef %21.sub0:vreg_128 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode |
| ; GFX908-NEXT: %21.sub1:vreg_128 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %21.sub2:vreg_128 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21.sub3:vreg_128 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %21 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| undef %21.sub0:vreg_128 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode |
| %21.sub1:vreg_128 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %21.sub2:vreg_128 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| %21.sub3:vreg_128 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %21 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_no_sink_multiple_uses |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_no_sink_multiple_uses |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %24 |
| ; GFX908-NEXT: S_NOP 0, implicit %23 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: S_NOP 0, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %22 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %24 |
| S_NOP 0, implicit %23 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %23 |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_no_sink_multiple_defs_clobber |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_no_sink_multiple_defs_clobber |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: liveins: $vgpr0, $sgpr0_sgpr1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 |
| ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: undef %4.sub1:sreg_64 = S_MOV_B32 0 |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec |
| ; GFX908-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc |
| ; GFX908-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]] |
| ; GFX908-NEXT: S_CBRANCH_EXECZ %bb.3, implicit $exec |
| ; GFX908-NEXT: S_BRANCH %bb.2 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %31 |
| ; GFX908-NEXT: S_NOP 0, implicit %28 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: successors: %bb.5(0x04000000), %bb.4(0x7c000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc |
| ; GFX908-NEXT: S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc |
| ; GFX908-NEXT: S_CBRANCH_SCC0 %bb.5, implicit killed $scc |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.4: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_BRANCH %bb.1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.5: |
| ; GFX908-NEXT: S_NOP 0, implicit %5, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %16 |
| ; GFX908-NEXT: S_NOP 0, implicit %7, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %18 |
| ; GFX908-NEXT: S_NOP 0, implicit %9, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %20 |
| ; GFX908-NEXT: S_NOP 0, implicit %11, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %22 |
| ; GFX908-NEXT: S_NOP 0, implicit %13, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %24 |
| ; GFX908-NEXT: S_NOP 0, implicit %25, implicit %26 |
| ; GFX908-NEXT: S_NOP 0, implicit %27 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| liveins: $vgpr0, $sgpr0_sgpr1 |
| |
| %1:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| %2:vgpr_32(s32) = COPY $vgpr0 |
| %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec |
| undef %5.sub1:sreg_64 = S_MOV_B32 0 |
| %5.sub0:sreg_64 = COPY %3.sub1 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| bb.1: |
| successors: %bb.2, %bb.3 |
| |
| %6:sreg_64 = COPY $exec, implicit-def $exec |
| %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc |
| $exec = S_MOV_B64_term %7 |
| S_CBRANCH_EXECZ %bb.3, implicit $exec |
| S_BRANCH %bb.2 |
| |
| bb.2: |
| %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %34 |
| S_NOP 0, implicit %33 |
| |
| |
| bb.3: |
| successors: %bb.4(0x04000000), %bb.5(0x7c000000) |
| |
| $exec = S_OR_B64 $exec, %6, implicit-def $scc |
| %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc |
| S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc |
| S_CBRANCH_SCC0 %bb.4, implicit killed $scc |
| |
| bb.5: |
| %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode |
| S_BRANCH %bb.1 |
| |
| bb.4: |
| S_NOP 0, implicit %10, implicit %20 |
| S_NOP 0, implicit %11, implicit %21 |
| S_NOP 0, implicit %12, implicit %22 |
| S_NOP 0, implicit %13, implicit %23 |
| S_NOP 0, implicit %14, implicit %24 |
| S_NOP 0, implicit %15, implicit %25 |
| S_NOP 0, implicit %16, implicit %26 |
| S_NOP 0, implicit %17, implicit %27 |
| S_NOP 0, implicit %18, implicit %28 |
| S_NOP 0, implicit %19, implicit %29 |
| S_NOP 0, implicit %30, implicit %31 |
| S_NOP 0, implicit %32 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_8_sink_for_9_occ |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_8_sink_for_9_occ |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: liveins: $vgpr0, $sgpr0_sgpr1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 |
| ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: undef %4.sub1:sreg_64 = S_MOV_B32 0 |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec |
| ; GFX908-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc |
| ; GFX908-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]] |
| ; GFX908-NEXT: S_CBRANCH_EXECZ %bb.3, implicit $exec |
| ; GFX908-NEXT: S_BRANCH %bb.2 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %35 |
| ; GFX908-NEXT: %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %32 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: successors: %bb.5(0x04000000), %bb.4(0x7c000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc |
| ; GFX908-NEXT: S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc |
| ; GFX908-NEXT: S_CBRANCH_SCC0 %bb.5, implicit killed $scc |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.4: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: S_BRANCH %bb.1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.5: |
| ; GFX908-NEXT: S_NOP 0, implicit %5, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %16 |
| ; GFX908-NEXT: S_NOP 0, implicit %7, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %18 |
| ; GFX908-NEXT: S_NOP 0, implicit %9, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %20 |
| ; GFX908-NEXT: S_NOP 0, implicit %11, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %22 |
| ; GFX908-NEXT: S_NOP 0, implicit %13, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %24 |
| ; GFX908-NEXT: S_NOP 0, implicit %25, implicit %26 |
| ; GFX908-NEXT: S_NOP 0, implicit %27, implicit %28 |
| ; GFX908-NEXT: S_NOP 0, implicit %27, implicit %28 |
| ; GFX908-NEXT: S_NOP 0, implicit %29, implicit %30 |
| ; GFX908-NEXT: S_NOP 0, implicit %31 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| liveins: $vgpr0, $sgpr0_sgpr1 |
| |
| %1:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| %2:vgpr_32(s32) = COPY $vgpr0 |
| %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec |
| undef %5.sub1:sreg_64 = S_MOV_B32 0 |
| %5.sub0:sreg_64 = COPY %3.sub1 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| %37:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode |
| |
| bb.1: |
| successors: %bb.2, %bb.3 |
| |
| %6:sreg_64 = COPY $exec, implicit-def $exec |
| %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc |
| $exec = S_MOV_B64_term %7 |
| S_CBRANCH_EXECZ %bb.3, implicit $exec |
| S_BRANCH %bb.2 |
| |
| bb.2: |
| %38:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %38 |
| S_NOP 0, implicit %37 |
| |
| |
| bb.3: |
| successors: %bb.4(0x04000000), %bb.5(0x7c000000) |
| |
| $exec = S_OR_B64 $exec, %6, implicit-def $scc |
| %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc |
| S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc |
| S_CBRANCH_SCC0 %bb.4, implicit killed $scc |
| |
| bb.5: |
| S_BRANCH %bb.1 |
| |
| bb.4: |
| S_NOP 0, implicit %10, implicit %20 |
| S_NOP 0, implicit %11, implicit %21 |
| S_NOP 0, implicit %12, implicit %22 |
| S_NOP 0, implicit %13, implicit %23 |
| S_NOP 0, implicit %14, implicit %24 |
| S_NOP 0, implicit %15, implicit %25 |
| S_NOP 0, implicit %16, implicit %26 |
| S_NOP 0, implicit %17, implicit %27 |
| S_NOP 0, implicit %18, implicit %28 |
| S_NOP 0, implicit %19, implicit %29 |
| S_NOP 0, implicit %30, implicit %31 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %34, implicit %35 |
| S_NOP 0, implicit %36 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_7_sink_for_8_occ |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_7_sink_for_8_occ |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: liveins: $vgpr0, $sgpr0_sgpr1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 |
| ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 29, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 30, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: undef %4.sub1:sreg_64 = S_MOV_B32 0 |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec |
| ; GFX908-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc |
| ; GFX908-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]] |
| ; GFX908-NEXT: S_CBRANCH_EXECZ %bb.3, implicit $exec |
| ; GFX908-NEXT: S_BRANCH %bb.2 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %39:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 32, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %39 |
| ; GFX908-NEXT: %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %36 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: successors: %bb.5(0x04000000), %bb.4(0x7c000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc |
| ; GFX908-NEXT: S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc |
| ; GFX908-NEXT: S_CBRANCH_SCC0 %bb.5, implicit killed $scc |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.4: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: S_BRANCH %bb.1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.5: |
| ; GFX908-NEXT: S_NOP 0, implicit %5, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %16 |
| ; GFX908-NEXT: S_NOP 0, implicit %7, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %18 |
| ; GFX908-NEXT: S_NOP 0, implicit %9, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %20 |
| ; GFX908-NEXT: S_NOP 0, implicit %11, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %22 |
| ; GFX908-NEXT: S_NOP 0, implicit %13, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %24 |
| ; GFX908-NEXT: S_NOP 0, implicit %25, implicit %26 |
| ; GFX908-NEXT: S_NOP 0, implicit %27, implicit %28 |
| ; GFX908-NEXT: S_NOP 0, implicit %27, implicit %28 |
| ; GFX908-NEXT: S_NOP 0, implicit %29, implicit %30 |
| ; GFX908-NEXT: S_NOP 0, implicit %31, implicit %32 |
| ; GFX908-NEXT: S_NOP 0, implicit %33, implicit %34 |
| ; GFX908-NEXT: S_NOP 0, implicit %35 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| liveins: $vgpr0, $sgpr0_sgpr1 |
| |
| %1:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| %2:vgpr_32(s32) = COPY $vgpr0 |
| %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec |
| undef %5.sub1:sreg_64 = S_MOV_B32 0 |
| %5.sub0:sreg_64 = COPY %3.sub1 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| %37:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| %38:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| %39:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 29, implicit $exec, implicit $mode, implicit-def $m0 |
| %40:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 30, implicit $exec, implicit $mode, implicit-def $m0 |
| %41:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode |
| |
| bb.1: |
| successors: %bb.2, %bb.3 |
| |
| %6:sreg_64 = COPY $exec, implicit-def $exec |
| %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc |
| $exec = S_MOV_B64_term %7 |
| S_CBRANCH_EXECZ %bb.3, implicit $exec |
| S_BRANCH %bb.2 |
| |
| bb.2: |
| %42:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 32, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %42 |
| S_NOP 0, implicit %41 |
| |
| |
| bb.3: |
| successors: %bb.4(0x04000000), %bb.5(0x7c000000) |
| |
| $exec = S_OR_B64 $exec, %6, implicit-def $scc |
| %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc |
| S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc |
| S_CBRANCH_SCC0 %bb.4, implicit killed $scc |
| |
| bb.5: |
| S_BRANCH %bb.1 |
| |
| bb.4: |
| S_NOP 0, implicit %10, implicit %20 |
| S_NOP 0, implicit %11, implicit %21 |
| S_NOP 0, implicit %12, implicit %22 |
| S_NOP 0, implicit %13, implicit %23 |
| S_NOP 0, implicit %14, implicit %24 |
| S_NOP 0, implicit %15, implicit %25 |
| S_NOP 0, implicit %16, implicit %26 |
| S_NOP 0, implicit %17, implicit %27 |
| S_NOP 0, implicit %18, implicit %28 |
| S_NOP 0, implicit %19, implicit %29 |
| S_NOP 0, implicit %30, implicit %31 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %34, implicit %35 |
| S_NOP 0, implicit %36, implicit %37 |
| S_NOP 0, implicit %38, implicit %39 |
| S_NOP 0, implicit %40 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_6_sink_for_7_occ |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_6_sink_for_7_occ |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: liveins: $vgpr0, $sgpr0_sgpr1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 |
| ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 29, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 30, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %37:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 32, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %38:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 33, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %39:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 34, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: undef %4.sub1:sreg_64 = S_MOV_B32 0 |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec |
| ; GFX908-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc |
| ; GFX908-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]] |
| ; GFX908-NEXT: S_CBRANCH_EXECZ %bb.3, implicit $exec |
| ; GFX908-NEXT: S_BRANCH %bb.2 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %43:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 36, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %43 |
| ; GFX908-NEXT: %40:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 35, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %40 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: successors: %bb.5(0x04000000), %bb.4(0x7c000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc |
| ; GFX908-NEXT: S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc |
| ; GFX908-NEXT: S_CBRANCH_SCC0 %bb.5, implicit killed $scc |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.4: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: S_BRANCH %bb.1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.5: |
| ; GFX908-NEXT: S_NOP 0, implicit %5, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %16 |
| ; GFX908-NEXT: S_NOP 0, implicit %7, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %18 |
| ; GFX908-NEXT: S_NOP 0, implicit %9, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %20 |
| ; GFX908-NEXT: S_NOP 0, implicit %11, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %22 |
| ; GFX908-NEXT: S_NOP 0, implicit %13, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %24 |
| ; GFX908-NEXT: S_NOP 0, implicit %25, implicit %26 |
| ; GFX908-NEXT: S_NOP 0, implicit %27, implicit %28 |
| ; GFX908-NEXT: S_NOP 0, implicit %27, implicit %28 |
| ; GFX908-NEXT: S_NOP 0, implicit %29, implicit %30 |
| ; GFX908-NEXT: S_NOP 0, implicit %31, implicit %32 |
| ; GFX908-NEXT: S_NOP 0, implicit %33, implicit %34 |
| ; GFX908-NEXT: S_NOP 0, implicit %35, implicit %36 |
| ; GFX908-NEXT: S_NOP 0, implicit %37, implicit %38 |
| ; GFX908-NEXT: S_NOP 0, implicit %39 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| liveins: $vgpr0, $sgpr0_sgpr1 |
| |
| %1:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| %2:vgpr_32(s32) = COPY $vgpr0 |
| %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec |
| undef %5.sub1:sreg_64 = S_MOV_B32 0 |
| %5.sub0:sreg_64 = COPY %3.sub1 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| %37:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| %38:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| %39:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 29, implicit $exec, implicit $mode, implicit-def $m0 |
| %40:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 30, implicit $exec, implicit $mode, implicit-def $m0 |
| %41:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode, implicit-def $m0 |
| %42:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 32, implicit $exec, implicit $mode, implicit-def $m0 |
| %43:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 33, implicit $exec, implicit $mode, implicit-def $m0 |
| %44:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 34, implicit $exec, implicit $mode, implicit-def $m0 |
| %45:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 35, implicit $exec, implicit $mode |
| |
| bb.1: |
| successors: %bb.2, %bb.3 |
| |
| %6:sreg_64 = COPY $exec, implicit-def $exec |
| %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc |
| $exec = S_MOV_B64_term %7 |
| S_CBRANCH_EXECZ %bb.3, implicit $exec |
| S_BRANCH %bb.2 |
| |
| bb.2: |
| %46:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 36, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %46 |
| S_NOP 0, implicit %45 |
| |
| |
| bb.3: |
| successors: %bb.4(0x04000000), %bb.5(0x7c000000) |
| |
| $exec = S_OR_B64 $exec, %6, implicit-def $scc |
| %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc |
| S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc |
| S_CBRANCH_SCC0 %bb.4, implicit killed $scc |
| |
| bb.5: |
| S_BRANCH %bb.1 |
| |
| bb.4: |
| S_NOP 0, implicit %10, implicit %20 |
| S_NOP 0, implicit %11, implicit %21 |
| S_NOP 0, implicit %12, implicit %22 |
| S_NOP 0, implicit %13, implicit %23 |
| S_NOP 0, implicit %14, implicit %24 |
| S_NOP 0, implicit %15, implicit %25 |
| S_NOP 0, implicit %16, implicit %26 |
| S_NOP 0, implicit %17, implicit %27 |
| S_NOP 0, implicit %18, implicit %28 |
| S_NOP 0, implicit %19, implicit %29 |
| S_NOP 0, implicit %30, implicit %31 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %34, implicit %35 |
| S_NOP 0, implicit %36, implicit %37 |
| S_NOP 0, implicit %38, implicit %39 |
| S_NOP 0, implicit %40, implicit %41 |
| S_NOP 0, implicit %42, implicit %43 |
| S_NOP 0, implicit %44 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_5_sink_for_6_occ |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_5_sink_for_6_occ |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 29, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 30, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 32, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 33, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 34, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 35, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 36, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %37:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 37, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %38:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 38, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %40:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 40, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %40 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %39:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 39, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %39 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %10 |
| ; GFX908-NEXT: S_NOP 0, implicit %1, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %12 |
| ; GFX908-NEXT: S_NOP 0, implicit %3, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %14 |
| ; GFX908-NEXT: S_NOP 0, implicit %5, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %16 |
| ; GFX908-NEXT: S_NOP 0, implicit %7, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %18 |
| ; GFX908-NEXT: S_NOP 0, implicit %9, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %22, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %22, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %24, implicit %25 |
| ; GFX908-NEXT: S_NOP 0, implicit %26, implicit %27 |
| ; GFX908-NEXT: S_NOP 0, implicit %28, implicit %29 |
| ; GFX908-NEXT: S_NOP 0, implicit %30, implicit %31 |
| ; GFX908-NEXT: S_NOP 0, implicit %32, implicit %33 |
| ; GFX908-NEXT: S_NOP 0, implicit %34, implicit %35 |
| ; GFX908-NEXT: S_NOP 0, implicit %36, implicit %37 |
| ; GFX908-NEXT: S_NOP 0, implicit %38 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| %37:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| %38:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| %39:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 29, implicit $exec, implicit $mode, implicit-def $m0 |
| %40:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 30, implicit $exec, implicit $mode, implicit-def $m0 |
| %41:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode, implicit-def $m0 |
| %42:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 32, implicit $exec, implicit $mode, implicit-def $m0 |
| %43:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 33, implicit $exec, implicit $mode, implicit-def $m0 |
| %44:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 34, implicit $exec, implicit $mode, implicit-def $m0 |
| %45:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 35, implicit $exec, implicit $mode, implicit-def $m0 |
| %46:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 36, implicit $exec, implicit $mode, implicit-def $m0 |
| %47:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 37, implicit $exec, implicit $mode, implicit-def $m0 |
| %48:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 38, implicit $exec, implicit $mode, implicit-def $m0 |
| %49:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 39, implicit $exec, implicit $mode |
| |
| bb.1: |
| successors: %bb.2 |
| %50:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 40, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %50 |
| |
| bb.2: |
| successors: %bb.3 |
| |
| S_NOP 0, implicit %49 |
| |
| bb.3: |
| S_NOP 0, implicit %10, implicit %20 |
| S_NOP 0, implicit %11, implicit %21 |
| S_NOP 0, implicit %12, implicit %22 |
| S_NOP 0, implicit %13, implicit %23 |
| S_NOP 0, implicit %14, implicit %24 |
| S_NOP 0, implicit %15, implicit %25 |
| S_NOP 0, implicit %16, implicit %26 |
| S_NOP 0, implicit %17, implicit %27 |
| S_NOP 0, implicit %18, implicit %28 |
| S_NOP 0, implicit %19, implicit %29 |
| S_NOP 0, implicit %30, implicit %31 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %34, implicit %35 |
| S_NOP 0, implicit %36, implicit %37 |
| S_NOP 0, implicit %38, implicit %39 |
| S_NOP 0, implicit %40, implicit %41 |
| S_NOP 0, implicit %42, implicit %43 |
| S_NOP 0, implicit %44, implicit %45 |
| S_NOP 0, implicit %46, implicit %47 |
| S_NOP 0, implicit %48 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_4_sink_for_5_occ |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_4_sink_for_5_occ |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 29, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 30, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 32, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 33, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 34, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 35, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 36, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %37:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 37, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %38:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 38, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %39:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 39, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %40:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 40, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %41:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 41, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %42:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 42, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %43:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 43, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %44:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 44, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %45:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 45, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %46:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 46, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %48:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 48, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %48 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %47:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 47, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %47 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %10 |
| ; GFX908-NEXT: S_NOP 0, implicit %1, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %12 |
| ; GFX908-NEXT: S_NOP 0, implicit %3, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %14 |
| ; GFX908-NEXT: S_NOP 0, implicit %5, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %16 |
| ; GFX908-NEXT: S_NOP 0, implicit %7, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %18 |
| ; GFX908-NEXT: S_NOP 0, implicit %9, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %22, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %22, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %24, implicit %25 |
| ; GFX908-NEXT: S_NOP 0, implicit %26, implicit %27 |
| ; GFX908-NEXT: S_NOP 0, implicit %28, implicit %29 |
| ; GFX908-NEXT: S_NOP 0, implicit %30, implicit %31 |
| ; GFX908-NEXT: S_NOP 0, implicit %32, implicit %33 |
| ; GFX908-NEXT: S_NOP 0, implicit %34, implicit %35 |
| ; GFX908-NEXT: S_NOP 0, implicit %36, implicit %37 |
| ; GFX908-NEXT: S_NOP 0, implicit %38, implicit %39 |
| ; GFX908-NEXT: S_NOP 0, implicit %40, implicit %41 |
| ; GFX908-NEXT: S_NOP 0, implicit %42, implicit %43 |
| ; GFX908-NEXT: S_NOP 0, implicit %44, implicit %45 |
| ; GFX908-NEXT: S_NOP 0, implicit %46 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| %37:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| %38:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| %39:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 29, implicit $exec, implicit $mode, implicit-def $m0 |
| %40:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 30, implicit $exec, implicit $mode, implicit-def $m0 |
| %41:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode, implicit-def $m0 |
| %42:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 32, implicit $exec, implicit $mode, implicit-def $m0 |
| %43:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 33, implicit $exec, implicit $mode, implicit-def $m0 |
| %44:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 34, implicit $exec, implicit $mode, implicit-def $m0 |
| %45:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 35, implicit $exec, implicit $mode, implicit-def $m0 |
| %46:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 36, implicit $exec, implicit $mode, implicit-def $m0 |
| %47:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 37, implicit $exec, implicit $mode, implicit-def $m0 |
| %48:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 38, implicit $exec, implicit $mode, implicit-def $m0 |
| %49:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 39, implicit $exec, implicit $mode, implicit-def $m0 |
| %50:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 40, implicit $exec, implicit $mode, implicit-def $m0 |
| %51:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 41, implicit $exec, implicit $mode, implicit-def $m0 |
| %52:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 42, implicit $exec, implicit $mode, implicit-def $m0 |
| %53:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 43, implicit $exec, implicit $mode, implicit-def $m0 |
| %54:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 44, implicit $exec, implicit $mode, implicit-def $m0 |
| %55:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 45, implicit $exec, implicit $mode, implicit-def $m0 |
| %56:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 46, implicit $exec, implicit $mode, implicit-def $m0 |
| %57:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 47, implicit $exec, implicit $mode |
| |
| bb.1: |
| successors: %bb.2 |
| %58:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 48, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %58 |
| |
| bb.2: |
| S_NOP 0, implicit %57 |
| |
| bb.3: |
| S_NOP 0, implicit %10, implicit %20 |
| S_NOP 0, implicit %11, implicit %21 |
| S_NOP 0, implicit %12, implicit %22 |
| S_NOP 0, implicit %13, implicit %23 |
| S_NOP 0, implicit %14, implicit %24 |
| S_NOP 0, implicit %15, implicit %25 |
| S_NOP 0, implicit %16, implicit %26 |
| S_NOP 0, implicit %17, implicit %27 |
| S_NOP 0, implicit %18, implicit %28 |
| S_NOP 0, implicit %19, implicit %29 |
| S_NOP 0, implicit %30, implicit %31 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %34, implicit %35 |
| S_NOP 0, implicit %36, implicit %37 |
| S_NOP 0, implicit %38, implicit %39 |
| S_NOP 0, implicit %40, implicit %41 |
| S_NOP 0, implicit %42, implicit %43 |
| S_NOP 0, implicit %44, implicit %45 |
| S_NOP 0, implicit %46, implicit %47 |
| S_NOP 0, implicit %48, implicit %49 |
| S_NOP 0, implicit %50, implicit %51 |
| S_NOP 0, implicit %52, implicit %53 |
| S_NOP 0, implicit %54, implicit %55 |
| S_NOP 0, implicit %56 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_3_sink_for_4_occ |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_3_sink_for_4_occ |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: liveins: $vgpr0, $sgpr0_sgpr1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 |
| ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| ; GFX908-NEXT: undef %4.sub1:sreg_64 = S_MOV_B32 0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 29, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 30, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %37:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 32, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %38:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 33, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %39:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 34, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %40:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 35, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %41:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 36, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %42:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 37, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %43:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 38, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %44:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 39, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %45:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 40, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %46:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 41, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %47:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 42, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %48:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 43, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %49:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 44, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %50:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 45, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %51:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 46, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %52:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 47, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %53:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 48, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %54:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 49, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %55:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 50, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %56:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 51, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %57:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 52, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %58:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 53, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %59:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 54, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %60:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 55, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %61:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 56, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %62:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 57, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %63:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 58, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %64:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 59, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %65:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 60, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %66:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 61, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %67:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 62, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec |
| ; GFX908-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc |
| ; GFX908-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]] |
| ; GFX908-NEXT: S_CBRANCH_EXECZ %bb.3, implicit $exec |
| ; GFX908-NEXT: S_BRANCH %bb.2 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %71:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 64, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %71 |
| ; GFX908-NEXT: %68:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 63, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %68 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: successors: %bb.5(0x04000000), %bb.4(0x7c000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc |
| ; GFX908-NEXT: S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc |
| ; GFX908-NEXT: S_CBRANCH_SCC0 %bb.5, implicit killed $scc |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.4: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: S_BRANCH %bb.1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.5: |
| ; GFX908-NEXT: S_NOP 0, implicit %5, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %16 |
| ; GFX908-NEXT: S_NOP 0, implicit %7, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %18 |
| ; GFX908-NEXT: S_NOP 0, implicit %9, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %20 |
| ; GFX908-NEXT: S_NOP 0, implicit %11, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %22 |
| ; GFX908-NEXT: S_NOP 0, implicit %13, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %24 |
| ; GFX908-NEXT: S_NOP 0, implicit %25, implicit %26 |
| ; GFX908-NEXT: S_NOP 0, implicit %27, implicit %28 |
| ; GFX908-NEXT: S_NOP 0, implicit %27, implicit %28 |
| ; GFX908-NEXT: S_NOP 0, implicit %29, implicit %30 |
| ; GFX908-NEXT: S_NOP 0, implicit %31, implicit %32 |
| ; GFX908-NEXT: S_NOP 0, implicit %33, implicit %34 |
| ; GFX908-NEXT: S_NOP 0, implicit %35, implicit %36 |
| ; GFX908-NEXT: S_NOP 0, implicit %37, implicit %38 |
| ; GFX908-NEXT: S_NOP 0, implicit %39, implicit %40 |
| ; GFX908-NEXT: S_NOP 0, implicit %41, implicit %42 |
| ; GFX908-NEXT: S_NOP 0, implicit %43, implicit %44 |
| ; GFX908-NEXT: S_NOP 0, implicit %45, implicit %46 |
| ; GFX908-NEXT: S_NOP 0, implicit %47, implicit %48 |
| ; GFX908-NEXT: S_NOP 0, implicit %49, implicit %50 |
| ; GFX908-NEXT: S_NOP 0, implicit %51, implicit %52 |
| ; GFX908-NEXT: S_NOP 0, implicit %53, implicit %54 |
| ; GFX908-NEXT: S_NOP 0, implicit %55, implicit %56 |
| ; GFX908-NEXT: S_NOP 0, implicit %57, implicit %58 |
| ; GFX908-NEXT: S_NOP 0, implicit %59, implicit %60 |
| ; GFX908-NEXT: S_NOP 0, implicit %61, implicit %62 |
| ; GFX908-NEXT: S_NOP 0, implicit %63, implicit %64 |
| ; GFX908-NEXT: S_NOP 0, implicit %65, implicit %66 |
| ; GFX908-NEXT: S_NOP 0, implicit %67 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| liveins: $vgpr0, $sgpr0_sgpr1 |
| |
| %1:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| %2:vgpr_32(s32) = COPY $vgpr0 |
| %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec |
| undef %5.sub1:sreg_64 = S_MOV_B32 0 |
| %5.sub0:sreg_64 = COPY %3.sub1 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| %37:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| %38:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| %39:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 29, implicit $exec, implicit $mode, implicit-def $m0 |
| %40:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 30, implicit $exec, implicit $mode, implicit-def $m0 |
| %41:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode, implicit-def $m0 |
| %42:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 32, implicit $exec, implicit $mode, implicit-def $m0 |
| %43:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 33, implicit $exec, implicit $mode, implicit-def $m0 |
| %44:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 34, implicit $exec, implicit $mode, implicit-def $m0 |
| %45:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 35, implicit $exec, implicit $mode, implicit-def $m0 |
| %46:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 36, implicit $exec, implicit $mode, implicit-def $m0 |
| %47:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 37, implicit $exec, implicit $mode, implicit-def $m0 |
| %48:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 38, implicit $exec, implicit $mode, implicit-def $m0 |
| %49:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 39, implicit $exec, implicit $mode, implicit-def $m0 |
| %50:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 40, implicit $exec, implicit $mode, implicit-def $m0 |
| %51:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 41, implicit $exec, implicit $mode, implicit-def $m0 |
| %52:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 42, implicit $exec, implicit $mode, implicit-def $m0 |
| %53:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 43, implicit $exec, implicit $mode, implicit-def $m0 |
| %54:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 44, implicit $exec, implicit $mode, implicit-def $m0 |
| %55:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 45, implicit $exec, implicit $mode, implicit-def $m0 |
| %56:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 46, implicit $exec, implicit $mode, implicit-def $m0 |
| %57:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 47, implicit $exec, implicit $mode, implicit-def $m0 |
| %58:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 48, implicit $exec, implicit $mode, implicit-def $m0 |
| %59:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 49, implicit $exec, implicit $mode, implicit-def $m0 |
| %60:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 50, implicit $exec, implicit $mode, implicit-def $m0 |
| %61:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 51, implicit $exec, implicit $mode, implicit-def $m0 |
| %62:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 52, implicit $exec, implicit $mode, implicit-def $m0 |
| %63:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 53, implicit $exec, implicit $mode, implicit-def $m0 |
| %64:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 54, implicit $exec, implicit $mode, implicit-def $m0 |
| %65:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 55, implicit $exec, implicit $mode, implicit-def $m0 |
| %66:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 56, implicit $exec, implicit $mode, implicit-def $m0 |
| %67:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 57, implicit $exec, implicit $mode, implicit-def $m0 |
| %68:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 58, implicit $exec, implicit $mode, implicit-def $m0 |
| %69:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 59, implicit $exec, implicit $mode, implicit-def $m0 |
| %70:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 60, implicit $exec, implicit $mode, implicit-def $m0 |
| %71:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 61, implicit $exec, implicit $mode, implicit-def $m0 |
| %72:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 62, implicit $exec, implicit $mode, implicit-def $m0 |
| %73:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 63, implicit $exec, implicit $mode |
| |
| bb.1: |
| successors: %bb.2, %bb.3 |
| |
| %6:sreg_64 = COPY $exec, implicit-def $exec |
| %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc |
| $exec = S_MOV_B64_term %7 |
| S_CBRANCH_EXECZ %bb.3, implicit $exec |
| S_BRANCH %bb.2 |
| |
| bb.2: |
| %74:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 64, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %74 |
| S_NOP 0, implicit %73 |
| |
| |
| bb.3: |
| successors: %bb.4(0x04000000), %bb.5(0x7c000000) |
| |
| $exec = S_OR_B64 $exec, %6, implicit-def $scc |
| %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc |
| S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc |
| S_CBRANCH_SCC0 %bb.4, implicit killed $scc |
| |
| bb.5: |
| S_BRANCH %bb.1 |
| |
| bb.4: |
| S_NOP 0, implicit %10, implicit %20 |
| S_NOP 0, implicit %11, implicit %21 |
| S_NOP 0, implicit %12, implicit %22 |
| S_NOP 0, implicit %13, implicit %23 |
| S_NOP 0, implicit %14, implicit %24 |
| S_NOP 0, implicit %15, implicit %25 |
| S_NOP 0, implicit %16, implicit %26 |
| S_NOP 0, implicit %17, implicit %27 |
| S_NOP 0, implicit %18, implicit %28 |
| S_NOP 0, implicit %19, implicit %29 |
| S_NOP 0, implicit %30, implicit %31 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %34, implicit %35 |
| S_NOP 0, implicit %36, implicit %37 |
| S_NOP 0, implicit %38, implicit %39 |
| S_NOP 0, implicit %40, implicit %41 |
| S_NOP 0, implicit %42, implicit %43 |
| S_NOP 0, implicit %44, implicit %45 |
| S_NOP 0, implicit %46, implicit %47 |
| S_NOP 0, implicit %48, implicit %49 |
| S_NOP 0, implicit %50, implicit %51 |
| S_NOP 0, implicit %52, implicit %53 |
| S_NOP 0, implicit %54, implicit %55 |
| S_NOP 0, implicit %56, implicit %57 |
| S_NOP 0, implicit %58, implicit %59 |
| S_NOP 0, implicit %60, implicit %61 |
| S_NOP 0, implicit %62, implicit %63 |
| S_NOP 0, implicit %64, implicit %65 |
| S_NOP 0, implicit %66, implicit %67 |
| S_NOP 0, implicit %68, implicit %69 |
| S_NOP 0, implicit %70, implicit %71 |
| S_NOP 0, implicit %72 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_2_sink_for_3_occ |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_2_sink_for_3_occ |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: liveins: $vgpr0, $sgpr0_sgpr1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 |
| ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| ; GFX908-NEXT: [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec |
| ; GFX908-NEXT: undef %4.sub1:sreg_64 = S_MOV_B32 0 |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 29, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 30, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %37:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 32, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %38:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 33, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %39:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 34, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %40:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 35, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %41:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 36, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %42:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 37, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %43:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 38, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %44:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 39, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %45:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 40, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %46:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 41, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %47:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 42, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %48:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 43, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %49:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 44, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %50:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 45, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %51:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 46, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %52:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 47, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %53:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 48, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %54:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 49, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %55:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 50, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %56:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 51, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %57:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 52, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %58:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 53, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %59:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 54, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %60:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 55, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %61:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 56, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %62:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 57, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %63:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 58, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %64:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 59, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %65:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 60, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %66:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 61, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %67:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 62, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %68:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 63, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %69:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 64, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %70:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 65, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %71:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 66, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %72:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 67, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %73:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 68, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %74:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 69, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %75:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 70, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %76:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 71, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %77:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 72, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %78:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 73, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %79:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 74, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %80:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 75, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %81:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 76, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %82:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 77, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %83:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 78, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %84:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 79, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %85:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 80, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %86:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 81, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %87:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 82, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec |
| ; GFX908-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc |
| ; GFX908-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]] |
| ; GFX908-NEXT: S_CBRANCH_EXECZ %bb.3, implicit $exec |
| ; GFX908-NEXT: S_BRANCH %bb.2 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %91:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 84, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %91 |
| ; GFX908-NEXT: %88:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 83, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %88 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: successors: %bb.5(0x04000000), %bb.4(0x7c000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc |
| ; GFX908-NEXT: S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc |
| ; GFX908-NEXT: S_CBRANCH_SCC0 %bb.5, implicit killed $scc |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.4: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: S_BRANCH %bb.1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.5: |
| ; GFX908-NEXT: S_NOP 0, implicit %5, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %16 |
| ; GFX908-NEXT: S_NOP 0, implicit %7, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %18 |
| ; GFX908-NEXT: S_NOP 0, implicit %9, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %20 |
| ; GFX908-NEXT: S_NOP 0, implicit %11, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %22 |
| ; GFX908-NEXT: S_NOP 0, implicit %13, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %24 |
| ; GFX908-NEXT: S_NOP 0, implicit %25, implicit %26 |
| ; GFX908-NEXT: S_NOP 0, implicit %27, implicit %28 |
| ; GFX908-NEXT: S_NOP 0, implicit %27, implicit %28 |
| ; GFX908-NEXT: S_NOP 0, implicit %29, implicit %30 |
| ; GFX908-NEXT: S_NOP 0, implicit %31, implicit %32 |
| ; GFX908-NEXT: S_NOP 0, implicit %33, implicit %34 |
| ; GFX908-NEXT: S_NOP 0, implicit %35, implicit %36 |
| ; GFX908-NEXT: S_NOP 0, implicit %37, implicit %38 |
| ; GFX908-NEXT: S_NOP 0, implicit %39, implicit %40 |
| ; GFX908-NEXT: S_NOP 0, implicit %41, implicit %42 |
| ; GFX908-NEXT: S_NOP 0, implicit %43, implicit %44 |
| ; GFX908-NEXT: S_NOP 0, implicit %45, implicit %46 |
| ; GFX908-NEXT: S_NOP 0, implicit %47, implicit %48 |
| ; GFX908-NEXT: S_NOP 0, implicit %49, implicit %50 |
| ; GFX908-NEXT: S_NOP 0, implicit %51, implicit %52 |
| ; GFX908-NEXT: S_NOP 0, implicit %53, implicit %54 |
| ; GFX908-NEXT: S_NOP 0, implicit %55, implicit %56 |
| ; GFX908-NEXT: S_NOP 0, implicit %57, implicit %58 |
| ; GFX908-NEXT: S_NOP 0, implicit %59, implicit %60 |
| ; GFX908-NEXT: S_NOP 0, implicit %61, implicit %62 |
| ; GFX908-NEXT: S_NOP 0, implicit %63, implicit %64 |
| ; GFX908-NEXT: S_NOP 0, implicit %65, implicit %66 |
| ; GFX908-NEXT: S_NOP 0, implicit %67, implicit %68 |
| ; GFX908-NEXT: S_NOP 0, implicit %69, implicit %70 |
| ; GFX908-NEXT: S_NOP 0, implicit %71, implicit %72 |
| ; GFX908-NEXT: S_NOP 0, implicit %73, implicit %74 |
| ; GFX908-NEXT: S_NOP 0, implicit %75, implicit %76 |
| ; GFX908-NEXT: S_NOP 0, implicit %77, implicit %78 |
| ; GFX908-NEXT: S_NOP 0, implicit %79, implicit %80 |
| ; GFX908-NEXT: S_NOP 0, implicit %81, implicit %82 |
| ; GFX908-NEXT: S_NOP 0, implicit %83, implicit %84 |
| ; GFX908-NEXT: S_NOP 0, implicit %85, implicit %86 |
| ; GFX908-NEXT: S_NOP 0, implicit %87 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| liveins: $vgpr0, $sgpr0_sgpr1 |
| |
| %1:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| %2:vgpr_32(s32) = COPY $vgpr0 |
| %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec |
| undef %5.sub1:sreg_64 = S_MOV_B32 0 |
| %5.sub0:sreg_64 = COPY %3.sub1 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| %37:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| %38:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| %39:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 29, implicit $exec, implicit $mode, implicit-def $m0 |
| %40:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 30, implicit $exec, implicit $mode, implicit-def $m0 |
| %41:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode, implicit-def $m0 |
| %42:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 32, implicit $exec, implicit $mode, implicit-def $m0 |
| %43:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 33, implicit $exec, implicit $mode, implicit-def $m0 |
| %44:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 34, implicit $exec, implicit $mode, implicit-def $m0 |
| %45:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 35, implicit $exec, implicit $mode, implicit-def $m0 |
| %46:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 36, implicit $exec, implicit $mode, implicit-def $m0 |
| %47:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 37, implicit $exec, implicit $mode, implicit-def $m0 |
| %48:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 38, implicit $exec, implicit $mode, implicit-def $m0 |
| %49:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 39, implicit $exec, implicit $mode, implicit-def $m0 |
| %50:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 40, implicit $exec, implicit $mode, implicit-def $m0 |
| %51:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 41, implicit $exec, implicit $mode, implicit-def $m0 |
| %52:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 42, implicit $exec, implicit $mode, implicit-def $m0 |
| %53:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 43, implicit $exec, implicit $mode, implicit-def $m0 |
| %54:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 44, implicit $exec, implicit $mode, implicit-def $m0 |
| %55:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 45, implicit $exec, implicit $mode, implicit-def $m0 |
| %56:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 46, implicit $exec, implicit $mode, implicit-def $m0 |
| %57:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 47, implicit $exec, implicit $mode, implicit-def $m0 |
| %58:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 48, implicit $exec, implicit $mode, implicit-def $m0 |
| %59:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 49, implicit $exec, implicit $mode, implicit-def $m0 |
| %60:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 50, implicit $exec, implicit $mode, implicit-def $m0 |
| %61:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 51, implicit $exec, implicit $mode, implicit-def $m0 |
| %62:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 52, implicit $exec, implicit $mode, implicit-def $m0 |
| %63:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 53, implicit $exec, implicit $mode, implicit-def $m0 |
| %64:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 54, implicit $exec, implicit $mode, implicit-def $m0 |
| %65:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 55, implicit $exec, implicit $mode, implicit-def $m0 |
| %66:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 56, implicit $exec, implicit $mode, implicit-def $m0 |
| %67:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 57, implicit $exec, implicit $mode, implicit-def $m0 |
| %68:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 58, implicit $exec, implicit $mode, implicit-def $m0 |
| %69:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 59, implicit $exec, implicit $mode, implicit-def $m0 |
| %70:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 60, implicit $exec, implicit $mode, implicit-def $m0 |
| %71:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 61, implicit $exec, implicit $mode, implicit-def $m0 |
| %72:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 62, implicit $exec, implicit $mode, implicit-def $m0 |
| %73:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 63, implicit $exec, implicit $mode, implicit-def $m0 |
| %74:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 64, implicit $exec, implicit $mode, implicit-def $m0 |
| %75:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 65, implicit $exec, implicit $mode, implicit-def $m0 |
| %76:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 66, implicit $exec, implicit $mode, implicit-def $m0 |
| %77:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 67, implicit $exec, implicit $mode, implicit-def $m0 |
| %78:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 68, implicit $exec, implicit $mode, implicit-def $m0 |
| %79:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 69, implicit $exec, implicit $mode, implicit-def $m0 |
| %80:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 70, implicit $exec, implicit $mode, implicit-def $m0 |
| %81:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 71, implicit $exec, implicit $mode, implicit-def $m0 |
| %82:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 72, implicit $exec, implicit $mode, implicit-def $m0 |
| %83:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 73, implicit $exec, implicit $mode, implicit-def $m0 |
| %84:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 74, implicit $exec, implicit $mode, implicit-def $m0 |
| %85:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 75, implicit $exec, implicit $mode, implicit-def $m0 |
| %86:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 76, implicit $exec, implicit $mode, implicit-def $m0 |
| %87:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 77, implicit $exec, implicit $mode, implicit-def $m0 |
| %88:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 78, implicit $exec, implicit $mode, implicit-def $m0 |
| %89:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 79, implicit $exec, implicit $mode, implicit-def $m0 |
| %90:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 80, implicit $exec, implicit $mode, implicit-def $m0 |
| %91:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 81, implicit $exec, implicit $mode, implicit-def $m0 |
| %92:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 82, implicit $exec, implicit $mode, implicit-def $m0 |
| %93:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 83, implicit $exec, implicit $mode |
| |
| bb.1: |
| successors: %bb.2, %bb.3 |
| |
| %6:sreg_64 = COPY $exec, implicit-def $exec |
| %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc |
| $exec = S_MOV_B64_term %7 |
| S_CBRANCH_EXECZ %bb.3, implicit $exec |
| S_BRANCH %bb.2 |
| |
| bb.2: |
| %94:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 84, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %94 |
| S_NOP 0, implicit %93 |
| |
| |
| bb.3: |
| successors: %bb.4(0x04000000), %bb.5(0x7c000000) |
| |
| $exec = S_OR_B64 $exec, %6, implicit-def $scc |
| %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc |
| S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc |
| S_CBRANCH_SCC0 %bb.4, implicit killed $scc |
| |
| bb.5: |
| S_BRANCH %bb.1 |
| |
| bb.4: |
| S_NOP 0, implicit %10, implicit %20 |
| S_NOP 0, implicit %11, implicit %21 |
| S_NOP 0, implicit %12, implicit %22 |
| S_NOP 0, implicit %13, implicit %23 |
| S_NOP 0, implicit %14, implicit %24 |
| S_NOP 0, implicit %15, implicit %25 |
| S_NOP 0, implicit %16, implicit %26 |
| S_NOP 0, implicit %17, implicit %27 |
| S_NOP 0, implicit %18, implicit %28 |
| S_NOP 0, implicit %19, implicit %29 |
| S_NOP 0, implicit %30, implicit %31 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %34, implicit %35 |
| S_NOP 0, implicit %36, implicit %37 |
| S_NOP 0, implicit %38, implicit %39 |
| S_NOP 0, implicit %40, implicit %41 |
| S_NOP 0, implicit %42, implicit %43 |
| S_NOP 0, implicit %44, implicit %45 |
| S_NOP 0, implicit %46, implicit %47 |
| S_NOP 0, implicit %48, implicit %49 |
| S_NOP 0, implicit %50, implicit %51 |
| S_NOP 0, implicit %52, implicit %53 |
| S_NOP 0, implicit %54, implicit %55 |
| S_NOP 0, implicit %56, implicit %57 |
| S_NOP 0, implicit %58, implicit %59 |
| S_NOP 0, implicit %60, implicit %61 |
| S_NOP 0, implicit %62, implicit %63 |
| S_NOP 0, implicit %64, implicit %65 |
| S_NOP 0, implicit %66, implicit %67 |
| S_NOP 0, implicit %68, implicit %69 |
| S_NOP 0, implicit %70, implicit %71 |
| S_NOP 0, implicit %72, implicit %73 |
| S_NOP 0, implicit %74, implicit %75 |
| S_NOP 0, implicit %76, implicit %77 |
| S_NOP 0, implicit %78, implicit %79 |
| S_NOP 0, implicit %80, implicit %81 |
| S_NOP 0, implicit %82, implicit %83 |
| S_NOP 0, implicit %84, implicit %85 |
| S_NOP 0, implicit %86, implicit %87 |
| S_NOP 0, implicit %88, implicit %89 |
| S_NOP 0, implicit %90, implicit %91 |
| S_NOP 0, implicit %92 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_1_sink_for_2_occ |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_1_sink_for_2_occ |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: liveins: $vgpr0, $sgpr0_sgpr1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 |
| ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| ; GFX908-NEXT: [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec |
| ; GFX908-NEXT: undef %4.sub1:sreg_64 = S_MOV_B32 0 |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 29, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 30, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %37:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 32, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %38:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 33, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %39:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 34, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %40:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 35, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %41:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 36, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %42:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 37, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %43:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 38, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %44:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 39, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %45:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 40, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %46:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 41, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %47:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 42, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %48:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 43, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %49:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 44, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %50:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 45, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %51:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 46, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %52:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 47, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %53:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 48, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %54:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 49, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %55:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 50, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %56:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 51, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %57:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 52, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %58:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 53, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %59:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 54, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %60:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 55, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %61:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 56, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %62:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 57, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %63:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 58, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %64:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 59, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %65:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 60, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %66:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 61, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %67:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 62, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %68:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 63, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %69:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 64, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %70:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 65, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %71:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 66, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %72:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 67, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %73:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 68, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %74:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 69, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %75:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 70, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %76:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 71, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %77:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 72, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %78:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 73, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %79:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 74, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %80:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 75, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %81:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 76, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %82:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 77, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %83:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 78, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %84:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 79, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %85:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 80, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %86:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 81, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %87:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 82, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %88:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 83, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %89:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 84, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %90:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 85, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %91:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 86, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %92:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 87, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %93:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 88, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %94:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 89, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %95:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 90, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %96:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 91, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %97:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 92, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %98:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 93, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %99:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 94, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %100:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 95, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %101:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 96, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %102:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 97, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %103:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 98, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %104:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 99, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %105:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 100, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %106:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 101, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %107:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 102, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %108:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 103, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %109:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 104, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %110:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 105, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %111:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 106, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %112:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 107, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %113:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 108, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %114:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 109, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %115:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 110, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %116:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 111, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %117:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 112, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %118:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 113, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %119:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 114, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %120:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 115, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %121:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 116, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %122:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 117, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %123:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 118, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %124:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 119, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %125:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 120, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %126:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 121, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %127:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 122, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %128:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 123, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %129:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 124, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %130:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 125, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %131:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 126, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec |
| ; GFX908-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc |
| ; GFX908-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]] |
| ; GFX908-NEXT: S_CBRANCH_EXECZ %bb.3, implicit $exec |
| ; GFX908-NEXT: S_BRANCH %bb.2 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: successors: %bb.3(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %135:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 128, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %135 |
| ; GFX908-NEXT: %132:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 127, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %132 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.3: |
| ; GFX908-NEXT: successors: %bb.5(0x04000000), %bb.4(0x7c000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc |
| ; GFX908-NEXT: undef %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc |
| ; GFX908-NEXT: S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc |
| ; GFX908-NEXT: S_CBRANCH_SCC0 %bb.5, implicit killed $scc |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.4: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: S_BRANCH %bb.1 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.5: |
| ; GFX908-NEXT: S_NOP 0, implicit %5, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %16 |
| ; GFX908-NEXT: S_NOP 0, implicit %7, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %18 |
| ; GFX908-NEXT: S_NOP 0, implicit %9, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %20 |
| ; GFX908-NEXT: S_NOP 0, implicit %11, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %22 |
| ; GFX908-NEXT: S_NOP 0, implicit %13, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %24 |
| ; GFX908-NEXT: S_NOP 0, implicit %25, implicit %26 |
| ; GFX908-NEXT: S_NOP 0, implicit %27, implicit %28 |
| ; GFX908-NEXT: S_NOP 0, implicit %27, implicit %28 |
| ; GFX908-NEXT: S_NOP 0, implicit %29, implicit %30 |
| ; GFX908-NEXT: S_NOP 0, implicit %31, implicit %32 |
| ; GFX908-NEXT: S_NOP 0, implicit %33, implicit %34 |
| ; GFX908-NEXT: S_NOP 0, implicit %35, implicit %36 |
| ; GFX908-NEXT: S_NOP 0, implicit %37, implicit %38 |
| ; GFX908-NEXT: S_NOP 0, implicit %39, implicit %40 |
| ; GFX908-NEXT: S_NOP 0, implicit %41, implicit %42 |
| ; GFX908-NEXT: S_NOP 0, implicit %43, implicit %44 |
| ; GFX908-NEXT: S_NOP 0, implicit %45, implicit %46 |
| ; GFX908-NEXT: S_NOP 0, implicit %47, implicit %48 |
| ; GFX908-NEXT: S_NOP 0, implicit %49, implicit %50 |
| ; GFX908-NEXT: S_NOP 0, implicit %51, implicit %52 |
| ; GFX908-NEXT: S_NOP 0, implicit %53, implicit %54 |
| ; GFX908-NEXT: S_NOP 0, implicit %55, implicit %56 |
| ; GFX908-NEXT: S_NOP 0, implicit %57, implicit %58 |
| ; GFX908-NEXT: S_NOP 0, implicit %59, implicit %60 |
| ; GFX908-NEXT: S_NOP 0, implicit %61, implicit %62 |
| ; GFX908-NEXT: S_NOP 0, implicit %63, implicit %64 |
| ; GFX908-NEXT: S_NOP 0, implicit %65, implicit %66 |
| ; GFX908-NEXT: S_NOP 0, implicit %67, implicit %68 |
| ; GFX908-NEXT: S_NOP 0, implicit %69, implicit %70 |
| ; GFX908-NEXT: S_NOP 0, implicit %71, implicit %72 |
| ; GFX908-NEXT: S_NOP 0, implicit %73, implicit %74 |
| ; GFX908-NEXT: S_NOP 0, implicit %75, implicit %76 |
| ; GFX908-NEXT: S_NOP 0, implicit %77, implicit %78 |
| ; GFX908-NEXT: S_NOP 0, implicit %79, implicit %80 |
| ; GFX908-NEXT: S_NOP 0, implicit %81, implicit %82 |
| ; GFX908-NEXT: S_NOP 0, implicit %83, implicit %84 |
| ; GFX908-NEXT: S_NOP 0, implicit %85, implicit %86 |
| ; GFX908-NEXT: S_NOP 0, implicit %87, implicit %88 |
| ; GFX908-NEXT: S_NOP 0, implicit %89, implicit %90 |
| ; GFX908-NEXT: S_NOP 0, implicit %91, implicit %92 |
| ; GFX908-NEXT: S_NOP 0, implicit %93, implicit %94 |
| ; GFX908-NEXT: S_NOP 0, implicit %95, implicit %96 |
| ; GFX908-NEXT: S_NOP 0, implicit %97, implicit %98 |
| ; GFX908-NEXT: S_NOP 0, implicit %99, implicit %100 |
| ; GFX908-NEXT: S_NOP 0, implicit %101, implicit %102 |
| ; GFX908-NEXT: S_NOP 0, implicit %103, implicit %104 |
| ; GFX908-NEXT: S_NOP 0, implicit %105, implicit %106 |
| ; GFX908-NEXT: S_NOP 0, implicit %107, implicit %108 |
| ; GFX908-NEXT: S_NOP 0, implicit %109, implicit %110 |
| ; GFX908-NEXT: S_NOP 0, implicit %111, implicit %112 |
| ; GFX908-NEXT: S_NOP 0, implicit %113, implicit %114 |
| ; GFX908-NEXT: S_NOP 0, implicit %115, implicit %116 |
| ; GFX908-NEXT: S_NOP 0, implicit %117, implicit %118 |
| ; GFX908-NEXT: S_NOP 0, implicit %119, implicit %120 |
| ; GFX908-NEXT: S_NOP 0, implicit %121, implicit %122 |
| ; GFX908-NEXT: S_NOP 0, implicit %123, implicit %124 |
| ; GFX908-NEXT: S_NOP 0, implicit %125, implicit %126 |
| ; GFX908-NEXT: S_NOP 0, implicit %127, implicit %128 |
| ; GFX908-NEXT: S_NOP 0, implicit %129, implicit %130 |
| ; GFX908-NEXT: S_NOP 0, implicit %131 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| liveins: $vgpr0, $sgpr0_sgpr1 |
| |
| %1:sgpr_64(p4) = COPY $sgpr0_sgpr1 |
| %2:vgpr_32(s32) = COPY $vgpr0 |
| %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) |
| %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec |
| undef %5.sub1:sreg_64 = S_MOV_B32 0 |
| %5.sub0:sreg_64 = COPY %3.sub1 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %26:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %27:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %28:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %29:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %30:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %31:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %32:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %33:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| %34:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| %35:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| %36:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 |
| %37:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 |
| %38:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 |
| %39:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 29, implicit $exec, implicit $mode, implicit-def $m0 |
| %40:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 30, implicit $exec, implicit $mode, implicit-def $m0 |
| %41:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode, implicit-def $m0 |
| %42:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 32, implicit $exec, implicit $mode, implicit-def $m0 |
| %43:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 33, implicit $exec, implicit $mode, implicit-def $m0 |
| %44:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 34, implicit $exec, implicit $mode, implicit-def $m0 |
| %45:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 35, implicit $exec, implicit $mode, implicit-def $m0 |
| %46:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 36, implicit $exec, implicit $mode, implicit-def $m0 |
| %47:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 37, implicit $exec, implicit $mode, implicit-def $m0 |
| %48:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 38, implicit $exec, implicit $mode, implicit-def $m0 |
| %49:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 39, implicit $exec, implicit $mode, implicit-def $m0 |
| %50:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 40, implicit $exec, implicit $mode, implicit-def $m0 |
| %51:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 41, implicit $exec, implicit $mode, implicit-def $m0 |
| %52:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 42, implicit $exec, implicit $mode, implicit-def $m0 |
| %53:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 43, implicit $exec, implicit $mode, implicit-def $m0 |
| %54:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 44, implicit $exec, implicit $mode, implicit-def $m0 |
| %55:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 45, implicit $exec, implicit $mode, implicit-def $m0 |
| %56:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 46, implicit $exec, implicit $mode, implicit-def $m0 |
| %57:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 47, implicit $exec, implicit $mode, implicit-def $m0 |
| %58:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 48, implicit $exec, implicit $mode, implicit-def $m0 |
| %59:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 49, implicit $exec, implicit $mode, implicit-def $m0 |
| %60:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 50, implicit $exec, implicit $mode, implicit-def $m0 |
| %61:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 51, implicit $exec, implicit $mode, implicit-def $m0 |
| %62:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 52, implicit $exec, implicit $mode, implicit-def $m0 |
| %63:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 53, implicit $exec, implicit $mode, implicit-def $m0 |
| %64:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 54, implicit $exec, implicit $mode, implicit-def $m0 |
| %65:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 55, implicit $exec, implicit $mode, implicit-def $m0 |
| %66:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 56, implicit $exec, implicit $mode, implicit-def $m0 |
| %67:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 57, implicit $exec, implicit $mode, implicit-def $m0 |
| %68:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 58, implicit $exec, implicit $mode, implicit-def $m0 |
| %69:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 59, implicit $exec, implicit $mode, implicit-def $m0 |
| %70:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 60, implicit $exec, implicit $mode, implicit-def $m0 |
| %71:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 61, implicit $exec, implicit $mode, implicit-def $m0 |
| %72:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 62, implicit $exec, implicit $mode, implicit-def $m0 |
| %73:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 63, implicit $exec, implicit $mode, implicit-def $m0 |
| %74:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 64, implicit $exec, implicit $mode, implicit-def $m0 |
| %75:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 65, implicit $exec, implicit $mode, implicit-def $m0 |
| %76:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 66, implicit $exec, implicit $mode, implicit-def $m0 |
| %77:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 67, implicit $exec, implicit $mode, implicit-def $m0 |
| %78:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 68, implicit $exec, implicit $mode, implicit-def $m0 |
| %79:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 69, implicit $exec, implicit $mode, implicit-def $m0 |
| %80:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 70, implicit $exec, implicit $mode, implicit-def $m0 |
| %81:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 71, implicit $exec, implicit $mode, implicit-def $m0 |
| %82:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 72, implicit $exec, implicit $mode, implicit-def $m0 |
| %83:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 73, implicit $exec, implicit $mode, implicit-def $m0 |
| %84:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 74, implicit $exec, implicit $mode, implicit-def $m0 |
| %85:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 75, implicit $exec, implicit $mode, implicit-def $m0 |
| %86:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 76, implicit $exec, implicit $mode, implicit-def $m0 |
| %87:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 77, implicit $exec, implicit $mode, implicit-def $m0 |
| %88:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 78, implicit $exec, implicit $mode, implicit-def $m0 |
| %89:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 79, implicit $exec, implicit $mode, implicit-def $m0 |
| %90:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 80, implicit $exec, implicit $mode, implicit-def $m0 |
| %91:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 81, implicit $exec, implicit $mode, implicit-def $m0 |
| %92:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 82, implicit $exec, implicit $mode, implicit-def $m0 |
| %93:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 83, implicit $exec, implicit $mode, implicit-def $m0 |
| %94:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 84, implicit $exec, implicit $mode, implicit-def $m0 |
| %95:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 85, implicit $exec, implicit $mode, implicit-def $m0 |
| %96:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 86, implicit $exec, implicit $mode, implicit-def $m0 |
| %97:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 87, implicit $exec, implicit $mode, implicit-def $m0 |
| %98:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 88, implicit $exec, implicit $mode, implicit-def $m0 |
| %99:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 89, implicit $exec, implicit $mode, implicit-def $m0 |
| %100:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 90, implicit $exec, implicit $mode, implicit-def $m0 |
| %101:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 91, implicit $exec, implicit $mode, implicit-def $m0 |
| %102:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 92, implicit $exec, implicit $mode, implicit-def $m0 |
| %103:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 93, implicit $exec, implicit $mode, implicit-def $m0 |
| %104:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 94, implicit $exec, implicit $mode, implicit-def $m0 |
| %105:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 95, implicit $exec, implicit $mode, implicit-def $m0 |
| %106:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 96, implicit $exec, implicit $mode, implicit-def $m0 |
| %107:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 97, implicit $exec, implicit $mode, implicit-def $m0 |
| %108:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 98, implicit $exec, implicit $mode, implicit-def $m0 |
| %109:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 99, implicit $exec, implicit $mode, implicit-def $m0 |
| %110:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 100, implicit $exec, implicit $mode, implicit-def $m0 |
| %111:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 101, implicit $exec, implicit $mode, implicit-def $m0 |
| %112:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 102, implicit $exec, implicit $mode, implicit-def $m0 |
| %113:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 103, implicit $exec, implicit $mode, implicit-def $m0 |
| %114:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 104, implicit $exec, implicit $mode, implicit-def $m0 |
| %115:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 105, implicit $exec, implicit $mode, implicit-def $m0 |
| %116:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 106, implicit $exec, implicit $mode, implicit-def $m0 |
| %117:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 107, implicit $exec, implicit $mode, implicit-def $m0 |
| %118:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 108, implicit $exec, implicit $mode, implicit-def $m0 |
| %119:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 109, implicit $exec, implicit $mode, implicit-def $m0 |
| %120:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 110, implicit $exec, implicit $mode, implicit-def $m0 |
| %121:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 111, implicit $exec, implicit $mode, implicit-def $m0 |
| %122:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 112, implicit $exec, implicit $mode, implicit-def $m0 |
| %123:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 113, implicit $exec, implicit $mode, implicit-def $m0 |
| %124:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 114, implicit $exec, implicit $mode, implicit-def $m0 |
| %125:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 115, implicit $exec, implicit $mode, implicit-def $m0 |
| %126:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 116, implicit $exec, implicit $mode, implicit-def $m0 |
| %127:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 117, implicit $exec, implicit $mode, implicit-def $m0 |
| %128:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 118, implicit $exec, implicit $mode, implicit-def $m0 |
| %129:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 119, implicit $exec, implicit $mode, implicit-def $m0 |
| %130:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 120, implicit $exec, implicit $mode, implicit-def $m0 |
| %131:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 121, implicit $exec, implicit $mode, implicit-def $m0 |
| %132:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 122, implicit $exec, implicit $mode, implicit-def $m0 |
| %133:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 123, implicit $exec, implicit $mode, implicit-def $m0 |
| %134:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 124, implicit $exec, implicit $mode, implicit-def $m0 |
| %135:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 125, implicit $exec, implicit $mode, implicit-def $m0 |
| %136:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 126, implicit $exec, implicit $mode, implicit-def $m0 |
| %137:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 127, implicit $exec, implicit $mode |
| |
| bb.1: |
| successors: %bb.2, %bb.3 |
| |
| %6:sreg_64 = COPY $exec, implicit-def $exec |
| %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc |
| $exec = S_MOV_B64_term %7 |
| S_CBRANCH_EXECZ %bb.3, implicit $exec |
| S_BRANCH %bb.2 |
| |
| bb.2: |
| %138:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 128, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %138 |
| S_NOP 0, implicit %137 |
| |
| |
| bb.3: |
| successors: %bb.4(0x04000000), %bb.5(0x7c000000) |
| |
| $exec = S_OR_B64 $exec, %6, implicit-def $scc |
| %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc |
| S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc |
| S_CBRANCH_SCC0 %bb.4, implicit killed $scc |
| |
| bb.5: |
| S_BRANCH %bb.1 |
| |
| bb.4: |
| S_NOP 0, implicit %10, implicit %20 |
| S_NOP 0, implicit %11, implicit %21 |
| S_NOP 0, implicit %12, implicit %22 |
| S_NOP 0, implicit %13, implicit %23 |
| S_NOP 0, implicit %14, implicit %24 |
| S_NOP 0, implicit %15, implicit %25 |
| S_NOP 0, implicit %16, implicit %26 |
| S_NOP 0, implicit %17, implicit %27 |
| S_NOP 0, implicit %18, implicit %28 |
| S_NOP 0, implicit %19, implicit %29 |
| S_NOP 0, implicit %30, implicit %31 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %32, implicit %33 |
| S_NOP 0, implicit %34, implicit %35 |
| S_NOP 0, implicit %36, implicit %37 |
| S_NOP 0, implicit %38, implicit %39 |
| S_NOP 0, implicit %40, implicit %41 |
| S_NOP 0, implicit %42, implicit %43 |
| S_NOP 0, implicit %44, implicit %45 |
| S_NOP 0, implicit %46, implicit %47 |
| S_NOP 0, implicit %48, implicit %49 |
| S_NOP 0, implicit %50, implicit %51 |
| S_NOP 0, implicit %52, implicit %53 |
| S_NOP 0, implicit %54, implicit %55 |
| S_NOP 0, implicit %56, implicit %57 |
| S_NOP 0, implicit %58, implicit %59 |
| S_NOP 0, implicit %60, implicit %61 |
| S_NOP 0, implicit %62, implicit %63 |
| S_NOP 0, implicit %64, implicit %65 |
| S_NOP 0, implicit %66, implicit %67 |
| S_NOP 0, implicit %68, implicit %69 |
| S_NOP 0, implicit %70, implicit %71 |
| S_NOP 0, implicit %72, implicit %73 |
| S_NOP 0, implicit %74, implicit %75 |
| S_NOP 0, implicit %76, implicit %77 |
| S_NOP 0, implicit %78, implicit %79 |
| S_NOP 0, implicit %80, implicit %81 |
| S_NOP 0, implicit %82, implicit %83 |
| S_NOP 0, implicit %84, implicit %85 |
| S_NOP 0, implicit %86, implicit %87 |
| S_NOP 0, implicit %88, implicit %89 |
| S_NOP 0, implicit %90, implicit %91 |
| S_NOP 0, implicit %92, implicit %93 |
| S_NOP 0, implicit %94, implicit %95 |
| S_NOP 0, implicit %96, implicit %97 |
| S_NOP 0, implicit %98, implicit %99 |
| S_NOP 0, implicit %100, implicit %101 |
| S_NOP 0, implicit %102, implicit %103 |
| S_NOP 0, implicit %104, implicit %105 |
| S_NOP 0, implicit %106, implicit %107 |
| S_NOP 0, implicit %108, implicit %109 |
| S_NOP 0, implicit %110, implicit %111 |
| S_NOP 0, implicit %112, implicit %113 |
| S_NOP 0, implicit %114, implicit %115 |
| S_NOP 0, implicit %116, implicit %117 |
| S_NOP 0, implicit %118, implicit %119 |
| S_NOP 0, implicit %120, implicit %121 |
| S_NOP 0, implicit %122, implicit %123 |
| S_NOP 0, implicit %124, implicit %125 |
| S_NOP 0, implicit %126, implicit %127 |
| S_NOP 0, implicit %128, implicit %129 |
| S_NOP 0, implicit %130, implicit %131 |
| S_NOP 0, implicit %132, implicit %133 |
| S_NOP 0, implicit %134, implicit %135 |
| S_NOP 0, implicit %136 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: sink_and_inc_idx_when_skipping_small_region_1 |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; DEBUG: Machine code for function sink_and_inc_idx_when_skipping_small_region_1: IsSSA, NoPHIs, TracksLiveness |
| ; DEBUG: Retrying function scheduling with improved occupancy of 10 from rematerializing |
| ; DEBUG-NEXT: ********** MI Scheduling ********** |
| ; DEBUG-NEXT: sink_and_inc_idx_when_skipping_small_region_1:%bb.2 |
| ; DEBUG-NEXT: From: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; DEBUG-NEXT: To: End RegionInstrs: 2 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| S_NOP 0 |
| |
| |
| bb.2: |
| ; predecessors: %bb.1 |
| successors: %bb.3 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %24 |
| |
| bb.3: |
| ; predcessors: %bb.2 |
| |
| S_NOP 0, implicit %23 |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: sink_and_inc_idx_when_skipping_small_regions_2 |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; DEBUG: Machine code for function sink_and_inc_idx_when_skipping_small_regions_2: IsSSA, NoPHIs, TracksLiveness |
| ; DEBUG: Retrying function scheduling with improved occupancy of 10 from rematerializing |
| ; DEBUG-NEXT: ********** MI Scheduling ********** |
| ; DEBUG-NEXT: sink_and_inc_idx_when_skipping_small_regions_2:%bb.2 |
| ; DEBUG-NEXT: From: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; DEBUG-NEXT: To: End RegionInstrs: 4 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| S_NOP 0 |
| |
| |
| bb.2: |
| ; predecessors: %bb.1 |
| successors: %bb.3 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %24 |
| S_NOP 0, implicit %23 |
| |
| bb.3: |
| ; predcessors: %bb.2 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_no_sink_two_subregs_in_def_block |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_no_sink_two_subregs_in_def_block |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: undef %21.sub0:vreg_128 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode |
| ; GFX908-NEXT: %21.sub1:vreg_128 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %21.sub2:vreg_128 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21.sub3:vreg_128 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %21 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| undef %21.sub0:vreg_128 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode |
| %21.sub1:vreg_128 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %21.sub2:vreg_128 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| %21.sub3:vreg_128 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %21 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_no_sink_not_improved |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_no_sink_not_improved |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %23, implicit %24 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %22 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %23, implicit %24 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_sink_64bit_vreg |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_sink_64bit_vreg |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %23 |
| ; GFX908-NEXT: %22:vreg_64 = nofpexcept V_CVT_F64_I32_e32 22, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %22 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vreg_64 = nofpexcept V_CVT_F64_I32_e32 22, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %23 |
| S_NOP 0, implicit %22 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_sink_64bit_vreg_2 |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_sink_64bit_vreg_2 |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %23, implicit %24 |
| ; GFX908-NEXT: %22:vreg_64 = nofpexcept V_CVT_F64_I32_e32 22, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %22 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vreg_64 = nofpexcept V_CVT_F64_I32_e32 22, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %23, implicit %24 |
| S_NOP 0, implicit %22 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_no_sink_64bit_vreg_not_enough_sinkable |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_no_sink_64bit_vreg_not_enough_sinkable |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vreg_64 = nofpexcept V_CVT_F64_I32_e32 22, implicit $exec, implicit $mode |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %23, implicit %24, implicit %25 |
| ; GFX908-NEXT: S_NOP 0, implicit %22 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vreg_64 = nofpexcept V_CVT_F64_I32_e32 22, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| %25:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %23, implicit %24, implicit %25 |
| S_NOP 0, implicit %22 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_no_sink_64bit_vreg_not_improved |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_no_sink_64bit_vreg_not_improved |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vreg_64 = nofpexcept V_CVT_F64_I32_e32 22, implicit $exec, implicit $mode |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %22, implicit %23 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vreg_64 = nofpexcept V_CVT_F64_I32_e32 22, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %22, implicit %23 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_no_sink_one_def_of_undef_subreg |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_no_sink_one_def_of_undef_subreg |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: undef %23.sub1:vreg_64_align2 = V_MOV_B32_e32 23, implicit $exec |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %24 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: S_NOP 0, implicit %23.sub1 |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %22 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| undef %23.sub1:vreg_64_align2 = V_MOV_B32_e32 23, implicit $exec |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %24 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %23.sub1 |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_sink_ignore_dbg_value_use |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_sink_ignore_dbg_value_use |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %24 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: DBG_VALUE %23, 0, 0 |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %22 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %24 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| DBG_VALUE %23, 0, 0 |
| S_NOP 0, implicit %23 |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: test_occ_9_crash_inline_asm |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; GFX908-LABEL: name: test_occ_9_crash_inline_asm |
| ; GFX908: bb.0: |
| ; GFX908-NEXT: successors: %bb.1(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: INLINEASM &"v_or_b32 $0, 0, $1", 32 /* isconvergent attdialect */, 327690 /* regdef:SReg_1_with_sub0 */, def %22, 327689 /* reguse:SReg_1_with_sub0 */, %4 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.1: |
| ; GFX908-NEXT: successors: %bb.2(0x80000000) |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; GFX908-NEXT: S_NOP 0, implicit %24 |
| ; GFX908-NEXT: {{ $}} |
| ; GFX908-NEXT: bb.2: |
| ; GFX908-NEXT: %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| ; GFX908-NEXT: S_NOP 0, implicit %23 |
| ; GFX908-NEXT: S_NOP 0, implicit %0, implicit %1 |
| ; GFX908-NEXT: S_NOP 0, implicit %2, implicit %3 |
| ; GFX908-NEXT: S_NOP 0, implicit %4, implicit %5 |
| ; GFX908-NEXT: S_NOP 0, implicit %6, implicit %7 |
| ; GFX908-NEXT: S_NOP 0, implicit %8, implicit %9 |
| ; GFX908-NEXT: S_NOP 0, implicit %10, implicit %11 |
| ; GFX908-NEXT: S_NOP 0, implicit %12, implicit %13 |
| ; GFX908-NEXT: S_NOP 0, implicit %14, implicit %15 |
| ; GFX908-NEXT: S_NOP 0, implicit %16, implicit %17 |
| ; GFX908-NEXT: S_NOP 0, implicit %18, implicit %19 |
| ; GFX908-NEXT: S_NOP 0, implicit %20, implicit %21 |
| ; GFX908-NEXT: S_NOP 0, implicit %22 |
| ; GFX908-NEXT: S_ENDPGM 0 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| INLINEASM &"v_or_b32 $0, 0, $1", 32, 327690, def %22:vgpr_32, 327689, %4 |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %24 |
| |
| bb.2: |
| ; predcessors: %bb.1 |
| |
| S_NOP 0, implicit %23 |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22 |
| S_ENDPGM 0 |
| ... |
| |