test/CodeGen/AArch64/no-reorder-cfi-merge-fwd-load.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc --run-pass=aarch64-ldst-opt %s -o - | FileCheck %s
--- |
  target triple = "aarch64-unknown-linux"

  define i32 @f(i32 %x) {
  entry:
    ret i32 0
  }

  declare i32 @g(i32)

...
---
name:            f
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$w0', virtual-reg: '' }
frameInfo:
  stackSize:       32
  maxAlignment:    8
  adjustsStack:    true
  hasCalls:        true
  isCalleeSavedInfoValid: true
fixedStack:      []
stack:
  - { id: 0, name: '', type: spill-slot, offset: -24, size: 8, alignment: 8,
      stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 1, name: '', type: spill-slot, offset: -32, size: 8, alignment: 8,
      stack-id: default, callee-saved-register: '$fp', callee-saved-restored: true,
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
entry_values:    []
callSites:       []
debugValueSubstitutions: []
constants:       []
machineFunctionInfo:
  hasRedZone:      false
body:             |
  bb.0.entry:
    liveins: $w0, $lr, $x0
    ;
    ; Test an SP update is merged forwards into a load instruction,
    ; because an access to the load destination reg prevents merging backwards.
    ;
    ; CHECK-LABEL: name: f
    ; CHECK: liveins: $w0, $lr, $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: $x1 = ADDXri $x0, 1, 0
    ; CHECK-NEXT: early-clobber $sp, $x0 = frame-setup LDRXpre $sp, -32
    ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 32
    ; CHECK-NEXT: frame-setup STRXui killed $fp, $sp, 0 :: (store (s64) into %stack.1)
    ; CHECK-NEXT: frame-setup STRXui killed $x1, $sp, 1
    ; CHECK-NEXT: frame-setup STRXui killed $lr, $sp, 2 :: (store (s64) into %stack.0)
    ; CHECK-NEXT: $fp = frame-setup ADDXri $sp, 0, 0
    ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa $w29, 32
    ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, -8
    ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
    ; CHECK-NEXT: renamable $w0 = nsw SUBWri killed renamable $w0, 1, 0
    ; CHECK-NEXT: BL @g, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
    ; CHECK-NEXT: $w0 = nsw ADDWri killed renamable $w0, 1, 0
    ; CHECK-NEXT: $fp = frame-destroy LDRXui $sp, 0 :: (load (s64) from %stack.1)
    ; CHECK-NEXT: $lr = frame-destroy LDRXui $sp, 2 :: (load (s64) from %stack.0)
    ; CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 32, 0
    ; CHECK-NEXT: RET undef $lr, implicit $w0
    $sp = frame-setup SUBXri $sp, 32, 0
    frame-setup CFI_INSTRUCTION def_cfa_offset 32
    $x1 = ADDXri $x0, 1, 0
    $x0 = frame-setup LDRXui $sp, 0
    frame-setup STRXui killed $fp, $sp, 0 :: (store (s64) into %stack.1)
    frame-setup STRXui killed $x1, $sp, 1
    frame-setup STRXui killed $lr, $sp, 2 :: (store (s64) into %stack.0)
    $fp = frame-setup ADDXri $sp, 0, 0
    frame-setup CFI_INSTRUCTION def_cfa $w29, 32
    frame-setup CFI_INSTRUCTION offset $w30, -8
    frame-setup CFI_INSTRUCTION offset $w29, -16
    renamable $w0 = nsw SUBWri killed renamable $w0, 1, 0
    BL @g, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
    $w0 = nsw ADDWri killed renamable $w0, 1, 0
    $fp = frame-destroy LDRXui $sp, 0 :: (load (s64) from %stack.1)
    $lr = frame-destroy LDRXui $sp, 2 :: (load (s64) from %stack.0)
    $sp = frame-destroy ADDXri $sp, 32, 0
    RET undef $lr, implicit $w0

...