test/CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+experimental-v -verify-machineinstrs < %s | FileCheck %s

declare i32 @llvm.riscv.vsetvli.i32(i32, i32, i32)
declare i32 @llvm.riscv.vsetvlimax.i32(i32, i32)

define void @test_vsetvli_e64mf8(i32 %avl) nounwind {
; CHECK-LABEL: test_vsetvli_e64mf8:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vsetvli a0, a0, e64,mf8,ta,mu
; CHECK-NEXT:    ret
  call i32 @llvm.riscv.vsetvli.i32(i32 %avl, i32 3, i32 5)
  ret void
}

define void @test_vsetvli_e8mf2_zero_avl() nounwind {
; CHECK-LABEL: test_vsetvli_e8mf2_zero_avl:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vsetivli a0, 0, e8,mf2,ta,mu
; CHECK-NEXT:    ret
  call i32 @llvm.riscv.vsetvli.i32(i32 0, i32 0, i32 7)
  ret void
}

define void @test_vsetvlimax_e64m8() nounwind {
; CHECK-LABEL: test_vsetvlimax_e64m8:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vsetvli a0, zero, e64,m8,ta,mu
; CHECK-NEXT:    ret
  call i32 @llvm.riscv.vsetvlimax.i32(i32 3, i32 3)
  ret void
}