| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # |
| # Check that we can select G_ZIP1 and G_ZIP2 via the tablegen importer. |
| # |
| # RUN: llc -mtriple aarch64 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s |
| |
| ... |
| --- |
| name: zip1_v2s32 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $d0, $d1 |
| |
| ; CHECK-LABEL: name: zip1_v2s32 |
| ; CHECK: liveins: $d0, $d1 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1 |
| ; CHECK: [[ZIP1v2i32_:%[0-9]+]]:fpr64 = ZIP1v2i32 [[COPY]], [[COPY1]] |
| ; CHECK: $d0 = COPY [[ZIP1v2i32_]] |
| ; CHECK: RET_ReallyLR implicit $d0 |
| %0:fpr(<2 x s32>) = COPY $d0 |
| %1:fpr(<2 x s32>) = COPY $d1 |
| %2:fpr(<2 x s32>) = G_ZIP1 %0, %1 |
| $d0 = COPY %2(<2 x s32>) |
| RET_ReallyLR implicit $d0 |
| ... |
| --- |
| name: zip1_v2s64 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $q0, $q1 |
| |
| ; CHECK-LABEL: name: zip1_v2s64 |
| ; CHECK: liveins: $q0, $q1 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 |
| ; CHECK: [[ZIP1v2i64_:%[0-9]+]]:fpr128 = ZIP1v2i64 [[COPY]], [[COPY1]] |
| ; CHECK: $q0 = COPY [[ZIP1v2i64_]] |
| ; CHECK: RET_ReallyLR implicit $q0 |
| %0:fpr(<2 x s64>) = COPY $q0 |
| %1:fpr(<2 x s64>) = COPY $q1 |
| %2:fpr(<2 x s64>) = G_ZIP1 %0, %1 |
| $q0 = COPY %2(<2 x s64>) |
| RET_ReallyLR implicit $q0 |
| ... |
| --- |
| name: zip1_v4s32 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $q0, $q1 |
| ; CHECK-LABEL: name: zip1_v4s32 |
| ; CHECK: liveins: $q0, $q1 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 |
| ; CHECK: [[ZIP1v4i32_:%[0-9]+]]:fpr128 = ZIP1v4i32 [[COPY]], [[COPY1]] |
| ; CHECK: $q0 = COPY [[ZIP1v4i32_]] |
| ; CHECK: RET_ReallyLR implicit $q0 |
| %0:fpr(<4 x s32>) = COPY $q0 |
| %1:fpr(<4 x s32>) = COPY $q1 |
| %2:fpr(<4 x s32>) = G_ZIP1 %0, %1 |
| $q0 = COPY %2(<4 x s32>) |
| RET_ReallyLR implicit $q0 |
| ... |
| --- |
| name: zip2_v2s32 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $d0, $d1 |
| |
| ; CHECK-LABEL: name: zip2_v2s32 |
| ; CHECK: liveins: $d0, $d1 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1 |
| ; CHECK: [[ZIP2v2i32_:%[0-9]+]]:fpr64 = ZIP2v2i32 [[COPY]], [[COPY1]] |
| ; CHECK: $d0 = COPY [[ZIP2v2i32_]] |
| ; CHECK: RET_ReallyLR implicit $d0 |
| %0:fpr(<2 x s32>) = COPY $d0 |
| %1:fpr(<2 x s32>) = COPY $d1 |
| %2:fpr(<2 x s32>) = G_ZIP2 %0, %1 |
| $d0 = COPY %2(<2 x s32>) |
| RET_ReallyLR implicit $d0 |
| ... |
| --- |
| name: zip2_v2s64 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $q0, $q1 |
| |
| ; CHECK-LABEL: name: zip2_v2s64 |
| ; CHECK: liveins: $q0, $q1 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 |
| ; CHECK: [[ZIP2v2i64_:%[0-9]+]]:fpr128 = ZIP2v2i64 [[COPY]], [[COPY1]] |
| ; CHECK: $q0 = COPY [[ZIP2v2i64_]] |
| ; CHECK: RET_ReallyLR implicit $q0 |
| %0:fpr(<2 x s64>) = COPY $q0 |
| %1:fpr(<2 x s64>) = COPY $q1 |
| %2:fpr(<2 x s64>) = G_ZIP2 %0, %1 |
| $q0 = COPY %2(<2 x s64>) |
| RET_ReallyLR implicit $q0 |
| ... |
| --- |
| name: zip2_v4s32 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $d0, $d1 |
| ; CHECK-LABEL: name: zip2_v4s32 |
| ; CHECK: liveins: $d0, $d1 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 |
| ; CHECK: [[ZIP2v4i32_:%[0-9]+]]:fpr128 = ZIP2v4i32 [[COPY]], [[COPY1]] |
| ; CHECK: $q0 = COPY [[ZIP2v4i32_]] |
| ; CHECK: RET_ReallyLR implicit $q0 |
| %0:fpr(<4 x s32>) = COPY $q0 |
| %1:fpr(<4 x s32>) = COPY $q1 |
| %2:fpr(<4 x s32>) = G_ZIP2 %0, %1 |
| $q0 = COPY %2(<4 x s32>) |
| RET_ReallyLR implicit $q0 |