| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -O0 -mtriple arm64-- -run-pass=regbankselect %s -o - | FileCheck %s |
| |
| # Check the default mappings for various instructions. |
| |
| --- | |
| target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" |
| |
| define void @test_add_s32() { ret void } |
| define void @test_add_v4s32() { ret void } |
| define void @test_sub_s32() { ret void } |
| define void @test_sub_v4s32() { ret void } |
| define void @test_mul_s32() { ret void } |
| define void @test_mul_v4s32() { ret void } |
| |
| define void @test_and_s32() { ret void } |
| define void @test_and_v4s32() { ret void } |
| define void @test_or_s32() { ret void } |
| define void @test_or_v4s32() { ret void } |
| define void @test_xor_s32() { ret void } |
| define void @test_xor_v4s32() { ret void } |
| |
| define void @test_shl_s32() { ret void } |
| define void @test_shl_v4s32() { ret void } |
| define void @test_lshr_s32() { ret void } |
| define void @test_ashr_s32() { ret void } |
| |
| define void @test_sdiv_s32() { ret void } |
| define void @test_udiv_s32() { ret void } |
| |
| define void @test_anyext_s64_s32() { ret void } |
| define void @test_sext_s64_s32() { ret void } |
| define void @test_zext_s64_s32() { ret void } |
| define void @test_trunc_s32_s64() { ret void } |
| |
| define void @test_constant_s32() { ret void } |
| define void @test_constant_p0() { ret void } |
| |
| define void @test_icmp_s32() { ret void } |
| define void @test_icmp_p0() { ret void } |
| |
| define void @test_frame_index_p0() { |
| %ptr0 = alloca i64 |
| ret void |
| } |
| |
| define void @test_ptrtoint_s64_p0() { ret void } |
| define void @test_inttoptr_p0_s64() { ret void } |
| |
| define void @test_load_s32_p0() { ret void } |
| define void @test_store_s32_p0() { ret void } |
| |
| define void @test_fadd_s32() { ret void } |
| define void @test_fsub_s32() { ret void } |
| define void @test_fmul_s32() { ret void } |
| define void @test_fdiv_s32() { ret void } |
| |
| define void @test_fpext_s64_s32() { ret void } |
| define void @test_fptrunc_s32_s64() { ret void } |
| |
| define void @test_fconstant_s32() { ret void } |
| define void @test_fneg_s32() { ret void } |
| |
| define void @test_fcmp_s32() { ret void } |
| |
| define void @test_sitofp_s64_s32() { ret void } |
| define void @test_sitofp_v4s32() { ret void } |
| define void @test_uitofp_s32_s64() { ret void } |
| define void @test_uitofp_v4s32() { ret void } |
| |
| define void @test_fptosi_s64_s32() { ret void } |
| define void @test_fptosi_v4s32() { ret void } |
| define void @test_fptoui_s32_s64() { ret void } |
| define void @test_fptoui_v4s32() { ret void } |
| |
| define void @test_gphi_ptr() { ret void } |
| |
| define void @test_restricted_tail_call() { ret void } |
| |
| ... |
| |
| --- |
| name: test_add_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_add_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[COPY]], [[COPY]] |
| %0(s32) = COPY $w0 |
| %1(s32) = G_ADD %0, %0 |
| ... |
| |
| --- |
| name: test_add_v4s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $q0 |
| ; CHECK-LABEL: name: test_add_v4s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 |
| ; CHECK: [[ADD:%[0-9]+]]:fpr(<4 x s32>) = G_ADD [[COPY]], [[COPY]] |
| %0(<4 x s32>) = COPY $q0 |
| %1(<4 x s32>) = G_ADD %0, %0 |
| ... |
| |
| --- |
| name: test_sub_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_sub_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[SUB:%[0-9]+]]:gpr(s32) = G_SUB [[COPY]], [[COPY]] |
| %0(s32) = COPY $w0 |
| %1(s32) = G_SUB %0, %0 |
| ... |
| |
| --- |
| name: test_sub_v4s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $q0 |
| ; CHECK-LABEL: name: test_sub_v4s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 |
| ; CHECK: [[SUB:%[0-9]+]]:fpr(<4 x s32>) = G_SUB [[COPY]], [[COPY]] |
| %0(<4 x s32>) = COPY $q0 |
| %1(<4 x s32>) = G_SUB %0, %0 |
| ... |
| |
| --- |
| name: test_mul_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_mul_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[MUL:%[0-9]+]]:gpr(s32) = G_MUL [[COPY]], [[COPY]] |
| %0(s32) = COPY $w0 |
| %1(s32) = G_MUL %0, %0 |
| ... |
| |
| --- |
| name: test_mul_v4s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $q0 |
| ; CHECK-LABEL: name: test_mul_v4s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 |
| ; CHECK: [[MUL:%[0-9]+]]:fpr(<4 x s32>) = G_MUL [[COPY]], [[COPY]] |
| %0(<4 x s32>) = COPY $q0 |
| %1(<4 x s32>) = G_MUL %0, %0 |
| ... |
| |
| --- |
| name: test_and_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_and_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[AND:%[0-9]+]]:gpr(s32) = G_AND [[COPY]], [[COPY]] |
| %0(s32) = COPY $w0 |
| %1(s32) = G_AND %0, %0 |
| ... |
| |
| --- |
| name: test_and_v4s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $q0 |
| ; CHECK-LABEL: name: test_and_v4s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 |
| ; CHECK: [[AND:%[0-9]+]]:fpr(<4 x s32>) = G_AND [[COPY]], [[COPY]] |
| %0(<4 x s32>) = COPY $q0 |
| %1(<4 x s32>) = G_AND %0, %0 |
| ... |
| |
| --- |
| name: test_or_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_or_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[OR:%[0-9]+]]:gpr(s32) = G_OR [[COPY]], [[COPY]] |
| %0(s32) = COPY $w0 |
| %1(s32) = G_OR %0, %0 |
| ... |
| |
| --- |
| name: test_or_v4s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $q0 |
| ; CHECK-LABEL: name: test_or_v4s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 |
| ; CHECK: [[OR:%[0-9]+]]:fpr(<4 x s32>) = G_OR [[COPY]], [[COPY]] |
| %0(<4 x s32>) = COPY $q0 |
| %1(<4 x s32>) = G_OR %0, %0 |
| ... |
| |
| --- |
| name: test_xor_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_xor_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[XOR:%[0-9]+]]:gpr(s32) = G_XOR [[COPY]], [[COPY]] |
| %0(s32) = COPY $w0 |
| %1(s32) = G_XOR %0, %0 |
| ... |
| |
| --- |
| name: test_xor_v4s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $q0 |
| ; CHECK-LABEL: name: test_xor_v4s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 |
| ; CHECK: [[XOR:%[0-9]+]]:fpr(<4 x s32>) = G_XOR [[COPY]], [[COPY]] |
| %0(<4 x s32>) = COPY $q0 |
| %1(<4 x s32>) = G_XOR %0, %0 |
| ... |
| |
| --- |
| name: test_shl_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_shl_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[SHL:%[0-9]+]]:gpr(s32) = G_SHL [[COPY]], [[COPY]](s32) |
| %0(s32) = COPY $w0 |
| %1(s32) = G_SHL %0, %0 |
| ... |
| |
| --- |
| name: test_shl_v4s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $q0 |
| ; CHECK-LABEL: name: test_shl_v4s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 |
| ; CHECK: [[SHL:%[0-9]+]]:fpr(<4 x s32>) = G_SHL [[COPY]], [[COPY]](<4 x s32>) |
| %0(<4 x s32>) = COPY $q0 |
| %1(<4 x s32>) = G_SHL %0, %0 |
| ... |
| |
| --- |
| name: test_lshr_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_lshr_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[LSHR:%[0-9]+]]:gpr(s32) = G_LSHR [[COPY]], [[COPY]](s32) |
| %0(s32) = COPY $w0 |
| %1(s32) = G_LSHR %0, %0 |
| ... |
| |
| --- |
| name: test_ashr_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_ashr_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[ASHR:%[0-9]+]]:gpr(s32) = G_ASHR [[COPY]], [[COPY]](s32) |
| %0(s32) = COPY $w0 |
| %1(s32) = G_ASHR %0, %0 |
| ... |
| |
| --- |
| name: test_sdiv_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_sdiv_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[SDIV:%[0-9]+]]:gpr(s32) = G_SDIV [[COPY]], [[COPY]] |
| %0(s32) = COPY $w0 |
| %1(s32) = G_SDIV %0, %0 |
| ... |
| |
| --- |
| name: test_udiv_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_udiv_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[UDIV:%[0-9]+]]:gpr(s32) = G_UDIV [[COPY]], [[COPY]] |
| %0(s32) = COPY $w0 |
| %1(s32) = G_UDIV %0, %0 |
| ... |
| |
| --- |
| name: test_anyext_s64_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_anyext_s64_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[ANYEXT:%[0-9]+]]:gpr(s64) = G_ANYEXT [[COPY]](s32) |
| %0(s32) = COPY $w0 |
| %1(s64) = G_ANYEXT %0 |
| ... |
| |
| --- |
| name: test_sext_s64_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_sext_s64_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[SEXT:%[0-9]+]]:gpr(s64) = G_SEXT [[COPY]](s32) |
| %0(s32) = COPY $w0 |
| %1(s64) = G_SEXT %0 |
| ... |
| |
| --- |
| name: test_zext_s64_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_zext_s64_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[ZEXT:%[0-9]+]]:gpr(s64) = G_ZEXT [[COPY]](s32) |
| %0(s32) = COPY $w0 |
| %1(s64) = G_ZEXT %0 |
| ... |
| |
| --- |
| name: test_trunc_s32_s64 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $x0 |
| ; CHECK-LABEL: name: test_trunc_s32_s64 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0 |
| ; CHECK: [[TRUNC:%[0-9]+]]:gpr(s32) = G_TRUNC [[COPY]](s64) |
| %0(s64) = COPY $x0 |
| %1(s32) = G_TRUNC %0 |
| ... |
| |
| --- |
| name: test_constant_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| body: | |
| bb.0: |
| ; CHECK-LABEL: name: test_constant_s32 |
| ; CHECK: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 123 |
| %0(s32) = G_CONSTANT i32 123 |
| ... |
| |
| --- |
| name: test_constant_p0 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| body: | |
| bb.0: |
| ; CHECK-LABEL: name: test_constant_p0 |
| ; CHECK: [[C:%[0-9]+]]:gpr(p0) = G_CONSTANT i64 0 |
| %0(p0) = G_CONSTANT i64 0 |
| ... |
| |
| --- |
| name: test_icmp_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| - { id: 2, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_icmp_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[ICMP:%[0-9]+]]:gpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY]] |
| ; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[ICMP]](s32) |
| %0(s32) = COPY $w0 |
| %1(s32) = G_ICMP intpred(ne), %0, %0 |
| %2(s1) = G_TRUNC %1(s32) |
| ... |
| |
| --- |
| name: test_icmp_p0 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| - { id: 2, class: _ } |
| body: | |
| bb.0: |
| liveins: $x0 |
| ; CHECK-LABEL: name: test_icmp_p0 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0 |
| ; CHECK: [[ICMP:%[0-9]+]]:gpr(s32) = G_ICMP intpred(ne), [[COPY]](p0), [[COPY]] |
| ; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[ICMP]](s32) |
| %0(p0) = COPY $x0 |
| %1(s32) = G_ICMP intpred(ne), %0, %0 |
| %2(s1) = G_TRUNC %1(s32) |
| ... |
| |
| --- |
| name: test_frame_index_p0 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| stack: |
| - { id: 0, name: ptr0, offset: 0, size: 8, alignment: 8 } |
| body: | |
| bb.0: |
| ; CHECK-LABEL: name: test_frame_index_p0 |
| ; CHECK: [[FRAME_INDEX:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %stack.0.ptr0 |
| %0(p0) = G_FRAME_INDEX %stack.0.ptr0 |
| ... |
| |
| --- |
| name: test_ptrtoint_s64_p0 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $x0 |
| ; CHECK-LABEL: name: test_ptrtoint_s64_p0 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0 |
| ; CHECK: [[PTRTOINT:%[0-9]+]]:gpr(s64) = G_PTRTOINT [[COPY]](p0) |
| %0(p0) = COPY $x0 |
| %1(s64) = G_PTRTOINT %0 |
| ... |
| |
| --- |
| name: test_inttoptr_p0_s64 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $x0 |
| ; CHECK-LABEL: name: test_inttoptr_p0_s64 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0 |
| ; CHECK: [[INTTOPTR:%[0-9]+]]:gpr(p0) = G_INTTOPTR [[COPY]](s64) |
| %0(s64) = COPY $x0 |
| %1(p0) = G_INTTOPTR %0 |
| ... |
| |
| --- |
| name: test_load_s32_p0 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $x0 |
| ; CHECK-LABEL: name: test_load_s32_p0 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0 |
| ; CHECK: [[LOAD:%[0-9]+]]:gpr(s32) = G_LOAD [[COPY]](p0) :: (load 4) |
| %0(p0) = COPY $x0 |
| %1(s32) = G_LOAD %0 :: (load 4) |
| ... |
| |
| --- |
| name: test_store_s32_p0 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $x0, $w1 |
| ; CHECK-LABEL: name: test_store_s32_p0 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0 |
| ; CHECK: [[COPY1:%[0-9]+]]:gpr(s32) = COPY $w1 |
| ; CHECK: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store 4) |
| %0(p0) = COPY $x0 |
| %1(s32) = COPY $w1 |
| G_STORE %1, %0 :: (store 4) |
| ... |
| |
| --- |
| name: test_fadd_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $s0 |
| ; CHECK-LABEL: name: test_fadd_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 |
| ; CHECK: [[FADD:%[0-9]+]]:fpr(s32) = G_FADD [[COPY]], [[COPY]] |
| %0(s32) = COPY $s0 |
| %1(s32) = G_FADD %0, %0 |
| ... |
| |
| --- |
| name: test_fsub_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $s0 |
| ; CHECK-LABEL: name: test_fsub_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 |
| ; CHECK: [[FSUB:%[0-9]+]]:fpr(s32) = G_FSUB [[COPY]], [[COPY]] |
| %0(s32) = COPY $s0 |
| %1(s32) = G_FSUB %0, %0 |
| ... |
| |
| --- |
| name: test_fmul_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $s0 |
| ; CHECK-LABEL: name: test_fmul_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 |
| ; CHECK: [[FMUL:%[0-9]+]]:fpr(s32) = G_FMUL [[COPY]], [[COPY]] |
| %0(s32) = COPY $s0 |
| %1(s32) = G_FMUL %0, %0 |
| ... |
| |
| --- |
| name: test_fdiv_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $s0 |
| ; CHECK-LABEL: name: test_fdiv_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 |
| ; CHECK: [[FDIV:%[0-9]+]]:fpr(s32) = G_FDIV [[COPY]], [[COPY]] |
| %0(s32) = COPY $s0 |
| %1(s32) = G_FDIV %0, %0 |
| ... |
| |
| --- |
| name: test_fpext_s64_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $s0 |
| ; CHECK-LABEL: name: test_fpext_s64_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 |
| ; CHECK: [[FPEXT:%[0-9]+]]:fpr(s64) = G_FPEXT [[COPY]](s32) |
| %0(s32) = COPY $s0 |
| %1(s64) = G_FPEXT %0 |
| ... |
| |
| --- |
| name: test_fptrunc_s32_s64 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $d0 |
| ; CHECK-LABEL: name: test_fptrunc_s32_s64 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(s64) = COPY $d0 |
| ; CHECK: [[FPTRUNC:%[0-9]+]]:fpr(s32) = G_FPTRUNC [[COPY]](s64) |
| %0(s64) = COPY $d0 |
| %1(s32) = G_FPTRUNC %0 |
| ... |
| |
| --- |
| name: test_fconstant_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| body: | |
| bb.0: |
| ; CHECK-LABEL: name: test_fconstant_s32 |
| ; CHECK: [[C:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00 |
| %0(s32) = G_FCONSTANT float 1.0 |
| ... |
| |
| --- |
| name: test_fneg_s32 |
| legalized: true |
| body: | |
| bb.0: |
| liveins: $s0 |
| ; CHECK-LABEL: name: test_fneg_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 |
| ; CHECK: [[FNEG:%[0-9]+]]:fpr(s32) = G_FNEG [[COPY]] |
| %0:_(s32) = COPY $s0 |
| %1:_(s32) = G_FNEG %0(s32) |
| ... |
| |
| --- |
| name: test_fcmp_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| - { id: 2, class: _ } |
| body: | |
| bb.0: |
| liveins: $s0 |
| ; CHECK-LABEL: name: test_fcmp_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 |
| ; CHECK: [[FCMP:%[0-9]+]]:gpr(s32) = G_FCMP floatpred(olt), [[COPY]](s32), [[COPY]] |
| ; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[FCMP]](s32) |
| %0(s32) = COPY $s0 |
| %1(s32) = G_FCMP floatpred(olt), %0, %0 |
| %2(s1) = G_TRUNC %1(s32) |
| ... |
| |
| --- |
| name: test_sitofp_s64_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $w0 |
| ; CHECK-LABEL: name: test_sitofp_s64_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 |
| ; CHECK: [[SITOFP:%[0-9]+]]:fpr(s64) = G_SITOFP [[COPY]](s32) |
| %0(s32) = COPY $w0 |
| %1(s64) = G_SITOFP %0 |
| ... |
| |
| --- |
| name: test_sitofp_v4s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $q0 |
| ; CHECK-LABEL: name: test_sitofp_v4s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 |
| ; CHECK: [[SITOFP:%[0-9]+]]:fpr(<4 x s32>) = G_SITOFP [[COPY]](<4 x s32>) |
| %0(<4 x s32>) = COPY $q0 |
| %1(<4 x s32>) = G_SITOFP %0 |
| ... |
| |
| --- |
| name: test_uitofp_s32_s64 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $x0 |
| ; CHECK-LABEL: name: test_uitofp_s32_s64 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0 |
| ; CHECK: [[UITOFP:%[0-9]+]]:fpr(s32) = G_UITOFP [[COPY]](s64) |
| %0(s64) = COPY $x0 |
| %1(s32) = G_UITOFP %0 |
| ... |
| |
| --- |
| name: test_uitofp_v4s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $q0 |
| ; CHECK-LABEL: name: test_uitofp_v4s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 |
| ; CHECK: [[UITOFP:%[0-9]+]]:fpr(<4 x s32>) = G_UITOFP [[COPY]](<4 x s32>) |
| %0(<4 x s32>) = COPY $q0 |
| %1(<4 x s32>) = G_UITOFP %0 |
| ... |
| |
| --- |
| name: test_fptosi_s64_s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $s0 |
| ; CHECK-LABEL: name: test_fptosi_s64_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 |
| ; CHECK: [[FPTOSI:%[0-9]+]]:gpr(s64) = G_FPTOSI [[COPY]](s32) |
| %0(s32) = COPY $s0 |
| %1(s64) = G_FPTOSI %0 |
| ... |
| |
| --- |
| name: test_fptosi_v4s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $q0 |
| ; CHECK-LABEL: name: test_fptosi_v4s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 |
| ; CHECK: [[FPTOSI:%[0-9]+]]:fpr(<4 x s32>) = G_FPTOSI [[COPY]](<4 x s32>) |
| %0(<4 x s32>) = COPY $q0 |
| %1(<4 x s32>) = G_FPTOSI %0 |
| ... |
| |
| --- |
| name: test_fptoui_s32_s64 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $d0 |
| ; CHECK-LABEL: name: test_fptoui_s32_s64 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(s64) = COPY $d0 |
| ; CHECK: [[FPTOUI:%[0-9]+]]:gpr(s32) = G_FPTOUI [[COPY]](s64) |
| %0(s64) = COPY $d0 |
| %1(s32) = G_FPTOUI %0 |
| ... |
| |
| --- |
| name: test_fptoui_v4s32 |
| legalized: true |
| registers: |
| - { id: 0, class: _ } |
| - { id: 1, class: _ } |
| body: | |
| bb.0: |
| liveins: $q0 |
| ; CHECK-LABEL: name: test_fptoui_v4s32 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 |
| ; CHECK: [[FPTOUI:%[0-9]+]]:fpr(<4 x s32>) = G_FPTOUI [[COPY]](<4 x s32>) |
| %0(<4 x s32>) = COPY $q0 |
| %1(<4 x s32>) = G_FPTOUI %0 |
| ... |
| |
| --- |
| name: test_gphi_ptr |
| legalized: true |
| tracksRegLiveness: true |
| registers: |
| - { id: 0, class: _, preferred-register: '' } |
| - { id: 1, class: _, preferred-register: '' } |
| - { id: 2, class: _, preferred-register: '' } |
| - { id: 3, class: _, preferred-register: '' } |
| - { id: 4, class: _, preferred-register: '' } |
| - { id: 5, class: _, preferred-register: '' } |
| body: | |
| ; CHECK-LABEL: name: test_gphi_ptr |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $w2, $x0, $x1 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0 |
| ; CHECK: [[COPY1:%[0-9]+]]:gpr(p0) = COPY $x1 |
| ; CHECK: [[COPY2:%[0-9]+]]:gpr(s32) = COPY $w2 |
| ; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[COPY2]](s32) |
| ; CHECK: G_BRCOND [[TRUNC]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:gpr(p0) = G_PHI [[COPY]](p0), %bb.0, [[COPY1]](p0), %bb.1 |
| ; CHECK: $x0 = COPY [[PHI]](p0) |
| ; CHECK: RET_ReallyLR implicit $x0 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $w2, $x0, $x1 |
| |
| %0(p0) = COPY $x0 |
| %1(p0) = COPY $x1 |
| %4(s32) = COPY $w2 |
| %2(s1) = G_TRUNC %4(s32) |
| G_BRCOND %2(s1), %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| |
| bb.2: |
| %3(p0) = G_PHI %0(p0), %bb.0, %1(p0), %bb.1 |
| $x0 = COPY %3(p0) |
| RET_ReallyLR implicit $x0 |
| |
| ... |
| |
| --- |
| name: test_restricted_tail_call |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x16, $x17 |
| ; CHECK-LABEL: name: test_restricted_tail_call |
| ; CHECK: liveins: $x16, $x17 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x16 |
| ; CHECK: [[COPY1:%[0-9]+]]:gpr(s64) = COPY $x17 |
| ; CHECK: RET_ReallyLR |
| %0:_(s64) = COPY $x16 |
| %1:_(s64) = COPY $x17 |
| RET_ReallyLR |
| ... |