test/CodeGen/X86/GlobalISel/x86_64-select-srem.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s

--- |
  ; ModuleID = 'srem.ll'
  source_filename = "srem.ll"
  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

  define i8 @test_srem_i8(i8 %arg1, i8 %arg2) {
    %res = srem i8 %arg1, %arg2
    ret i8 %res
  }

  define i16 @test_srem_i16(i16 %arg1, i16 %arg2) {
    %res = srem i16 %arg1, %arg2
    ret i16 %res
  }

  define i32 @test_srem_i32(i32 %arg1, i32 %arg2) {
    %res = srem i32 %arg1, %arg2
    ret i32 %res
  }

  define i64 @test_srem_i64(i64 %arg1, i64 %arg2) {
    %res = srem i64 %arg1, %arg2
    ret i64 %res
  }

...
---
name:            test_srem_i8
alignment:       16
exposesReturnsTwice: false
legalized:       true
regBankSelected: true
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr, preferred-register: '' }
  - { id: 1, class: gpr, preferred-register: '' }
  - { id: 2, class: gpr, preferred-register: '' }
  - { id: 3, class: gpr, preferred-register: '' }
  - { id: 4, class: gpr, preferred-register: '' }
liveins:
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    0
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 4294967295
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  bb.1 (%ir-block.0):
    liveins: $edi, $esi

    ; CHECK-LABEL: name: test_srem_i8
    ; CHECK: liveins: $edi, $esi
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY $esi
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY2]].sub_8bit
    ; CHECK-NEXT: $ax = MOVSX16rr8 [[COPY1]]
    ; CHECK-NEXT: IDIV8r [[COPY3]], implicit-def $al, implicit-def $ah, implicit-def $eflags, implicit $ax
    ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr16 = COPY $ax
    ; CHECK-NEXT: [[SHR16ri:%[0-9]+]]:gr16 = SHR16ri [[COPY4]], 8, implicit-def $eflags
    ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr8 = SUBREG_TO_REG 0, [[SHR16ri]], %subreg.sub_8bit
    ; CHECK-NEXT: $al = COPY [[SUBREG_TO_REG]]
    ; CHECK-NEXT: RET 0, implicit $al
    %2:gpr(s32) = COPY $edi
    %0:gpr(s8) = G_TRUNC %2(s32)
    %3:gpr(s32) = COPY $esi
    %1:gpr(s8) = G_TRUNC %3(s32)
    %4:gpr(s8) = G_SREM %0, %1
    $al = COPY %4(s8)
    RET 0, implicit $al

...
---
name:            test_srem_i16
alignment:       16
exposesReturnsTwice: false
legalized:       true
regBankSelected: true
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr, preferred-register: '' }
  - { id: 1, class: gpr, preferred-register: '' }
  - { id: 2, class: gpr, preferred-register: '' }
  - { id: 3, class: gpr, preferred-register: '' }
  - { id: 4, class: gpr, preferred-register: '' }
liveins:
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    0
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 4294967295
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  bb.1 (%ir-block.0):
    liveins: $edi, $esi

    ; CHECK-LABEL: name: test_srem_i16
    ; CHECK: liveins: $edi, $esi
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY $esi
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr16 = COPY [[COPY2]].sub_16bit
    ; CHECK-NEXT: $ax = COPY [[COPY1]]
    ; CHECK-NEXT: CWD implicit-def $ax, implicit-def $dx, implicit $ax
    ; CHECK-NEXT: IDIV16r [[COPY3]], implicit-def $ax, implicit-def $dx, implicit-def $eflags, implicit $ax, implicit $dx
    ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr16 = COPY $dx
    ; CHECK-NEXT: $ax = COPY [[COPY4]]
    ; CHECK-NEXT: RET 0, implicit $ax
    %2:gpr(s32) = COPY $edi
    %0:gpr(s16) = G_TRUNC %2(s32)
    %3:gpr(s32) = COPY $esi
    %1:gpr(s16) = G_TRUNC %3(s32)
    %4:gpr(s16) = G_SREM %0, %1
    $ax = COPY %4(s16)
    RET 0, implicit $ax

...
---
name:            test_srem_i32
alignment:       16
exposesReturnsTwice: false
legalized:       true
regBankSelected: true
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr, preferred-register: '' }
  - { id: 1, class: gpr, preferred-register: '' }
  - { id: 2, class: gpr, preferred-register: '' }
liveins:
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    0
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 4294967295
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  bb.1 (%ir-block.0):
    liveins: $edi, $esi

    ; CHECK-LABEL: name: test_srem_i32
    ; CHECK: liveins: $edi, $esi
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
    ; CHECK-NEXT: $eax = COPY [[COPY]]
    ; CHECK-NEXT: CDQ implicit-def $eax, implicit-def $edx, implicit $eax
    ; CHECK-NEXT: IDIV32r [[COPY1]], implicit-def $eax, implicit-def $edx, implicit-def $eflags, implicit $eax, implicit $edx
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY $edx
    ; CHECK-NEXT: $eax = COPY [[COPY2]]
    ; CHECK-NEXT: RET 0, implicit $eax
    %0:gpr(s32) = COPY $edi
    %1:gpr(s32) = COPY $esi
    %2:gpr(s32) = G_SREM %0, %1
    $eax = COPY %2(s32)
    RET 0, implicit $eax

...
---
name:            test_srem_i64
alignment:       16
exposesReturnsTwice: false
legalized:       true
regBankSelected: true
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr, preferred-register: '' }
  - { id: 1, class: gpr, preferred-register: '' }
  - { id: 2, class: gpr, preferred-register: '' }
liveins:
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    0
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 4294967295
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  bb.1 (%ir-block.0):
    liveins: $rdi, $rsi

    ; CHECK-LABEL: name: test_srem_i64
    ; CHECK: liveins: $rdi, $rsi
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
    ; CHECK-NEXT: $rax = COPY [[COPY]]
    ; CHECK-NEXT: CQO implicit-def $rax, implicit-def $rdx, implicit $rax
    ; CHECK-NEXT: IDIV64r [[COPY1]], implicit-def $rax, implicit-def $rdx, implicit-def $eflags, implicit $rax, implicit $rdx
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr64 = COPY $rdx
    ; CHECK-NEXT: $rax = COPY [[COPY2]]
    ; CHECK-NEXT: RET 0, implicit $rax
    %0:gpr(s64) = COPY $rdi
    %1:gpr(s64) = COPY $rsi
    %2:gpr(s64) = G_SREM %0, %1
    $rax = COPY %2(s64)
    RET 0, implicit $rax

...