test/Transforms/SimplifyCFG/inline-asm-sink.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=mem2reg,simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s

define i32 @test(i32 %x) {
; CHECK-LABEL: @test(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[X:%.*]], 0
; CHECK-NEXT:    br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK:       if.then:
; CHECK-NEXT:    [[TMP1:%.*]] = call i32 asm "mov $0, #1", "=r"() #[[ATTR0:[0-9]+]]
; CHECK-NEXT:    br label [[IF_END:%.*]]
; CHECK:       if.else:
; CHECK-NEXT:    [[TMP2:%.*]] = call i32 asm "mov $0, #2", "=r"() #[[ATTR0]]
; CHECK-NEXT:    br label [[IF_END]]
; CHECK:       if.end:
; CHECK-NEXT:    [[Y_0:%.*]] = phi i32 [ [[TMP1]], [[IF_THEN]] ], [ [[TMP2]], [[IF_ELSE]] ]
; CHECK-NEXT:    ret i32 [[Y_0]]
;
entry:
  %y = alloca i32, align 4
  %tobool = icmp ne i32 %x, 0
  br i1 %tobool, label %if.then, label %if.else

if.then:
  %tmp1 = call i32 asm "mov $0, #1", "=r"() nounwind readnone
  store i32 %tmp1, ptr %y, align 4
  br label %if.end

if.else:
  %tmp2 = call i32 asm "mov $0, #2", "=r"() nounwind readnone
  store i32 %tmp2, ptr %y, align 4
  br label %if.end

if.end:
  %tmp3 = load i32, ptr %y, align 4
  ret i32 %tmp3
}