test/Transforms/PhaseOrdering/reassociate-after-unroll.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; REQUIRES: powerpc-registered-target
; RUN: opt -passes='default<O2>' -S < %s | FileCheck %s

target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"

define dso_local i64 @func(i64 %blah, i64 %limit) #0 {
; CHECK-LABEL: @func(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    ret i64 undef
;
entry:
  %blah.addr = alloca i64, align 8
  %limit.addr = alloca i64, align 8
  %k = alloca i32, align 4
  %g = alloca i64, align 8
  %i = alloca i64, align 8
  store i64 %blah, ptr %blah.addr, align 8
  store i64 %limit, ptr %limit.addr, align 8
  store i32 1, ptr %k, align 4
  store i64 0, ptr %i, align 8
  br label %for.cond

for.cond:
  %0 = load i64, ptr %i, align 8
  %1 = load i64, ptr %limit.addr, align 8
  %cmp = icmp ult i64 %0, %1
  br i1 %cmp, label %for.body, label %for.cond.cleanup

for.cond.cleanup:
  %2 = load i64, ptr %g, align 8
  ret i64 %2

for.body:
  %3 = load i64, ptr %blah.addr, align 8
  %4 = load i32, ptr %k, align 4
  %conv = zext i32 %4 to i64
  %and = and i64 %conv, %3
  %conv1 = trunc i64 %and to i32
  store i32 %conv1, ptr %k, align 4
  %5 = load i32, ptr %k, align 4
  %conv2 = zext i32 %5 to i64
  %6 = load i64, ptr %g, align 8
  %add = add i64 %6, %conv2
  store i64 %add, ptr %g, align 8
  %7 = load i64, ptr %i, align 8
  %inc = add i64 %7, 1
  store i64 %inc, ptr %i, align 8
  br label %for.cond
}

attributes #0 = { "use-soft-float"="false" }