test/CodeGen/RISCV/calling-conv-vector-on-stack.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s 2>&1 | FileCheck %s

; CHECK-NOT: warning: Invalid size request on a scalable vector

define void @bar() nounwind {
; CHECK-LABEL: bar:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    addi sp, sp, -96
; CHECK-NEXT:    sd ra, 88(sp) # 8-byte Folded Spill
; CHECK-NEXT:    sd s0, 80(sp) # 8-byte Folded Spill
; CHECK-NEXT:    sd s1, 72(sp) # 8-byte Folded Spill
; CHECK-NEXT:    addi s0, sp, 96
; CHECK-NEXT:    csrr a0, vlenb
; CHECK-NEXT:    slli a0, a0, 3
; CHECK-NEXT:    sub sp, sp, a0
; CHECK-NEXT:    andi sp, sp, -64
; CHECK-NEXT:    mv s1, sp
; CHECK-NEXT:    addi sp, sp, -16
; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
; CHECK-NEXT:    vmv.v.i v8, 0
; CHECK-NEXT:    addi a0, s1, 64
; CHECK-NEXT:    vs8r.v v8, (a0)
; CHECK-NEXT:    sd a0, 0(sp)
; CHECK-NEXT:    li a0, 0
; CHECK-NEXT:    li a1, 0
; CHECK-NEXT:    li a2, 0
; CHECK-NEXT:    li a3, 0
; CHECK-NEXT:    li a4, 0
; CHECK-NEXT:    li a5, 0
; CHECK-NEXT:    li a6, 0
; CHECK-NEXT:    li a7, 0
; CHECK-NEXT:    vmv.v.i v16, 0
; CHECK-NEXT:    call foo@plt
; CHECK-NEXT:    addi sp, sp, 16
; CHECK-NEXT:    addi sp, s0, -96
; CHECK-NEXT:    ld ra, 88(sp) # 8-byte Folded Reload
; CHECK-NEXT:    ld s0, 80(sp) # 8-byte Folded Reload
; CHECK-NEXT:    ld s1, 72(sp) # 8-byte Folded Reload
; CHECK-NEXT:    addi sp, sp, 96
; CHECK-NEXT:    ret
entry:
  tail call void @foo(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, <vscale x 16 x float> zeroinitializer, <vscale x 16 x float> zeroinitializer, <vscale x 16 x float> zeroinitializer)
  ret void
}

declare void @foo(i32, i32, i32, i32, i32, i32, i32, i32, <vscale x 16 x float>, <vscale x 16 x float>, <vscale x 16 x float>) nounwind