| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| ; RUN: llc -mtriple=mips-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=MIPSEL |
| ; RUN: llc -mtriple=mips64el-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=MIPS64EL |
| |
| define i1 @test_urem_odd(i13 %X) nounwind { |
| ; MIPSEL-LABEL: test_urem_odd: |
| ; MIPSEL: # %bb.0: |
| ; MIPSEL-NEXT: lui $1, 52428 |
| ; MIPSEL-NEXT: ori $1, $1, 52429 |
| ; MIPSEL-NEXT: andi $2, $4, 8191 |
| ; MIPSEL-NEXT: mul $1, $2, $1 |
| ; MIPSEL-NEXT: lui $2, 13107 |
| ; MIPSEL-NEXT: ori $2, $2, 13108 |
| ; MIPSEL-NEXT: jr $ra |
| ; MIPSEL-NEXT: sltu $2, $1, $2 |
| ; |
| ; MIPS64EL-LABEL: test_urem_odd: |
| ; MIPS64EL: # %bb.0: |
| ; MIPS64EL-NEXT: lui $1, 52428 |
| ; MIPS64EL-NEXT: ori $1, $1, 52429 |
| ; MIPS64EL-NEXT: sll $2, $4, 0 |
| ; MIPS64EL-NEXT: andi $2, $2, 8191 |
| ; MIPS64EL-NEXT: mul $1, $2, $1 |
| ; MIPS64EL-NEXT: lui $2, 13107 |
| ; MIPS64EL-NEXT: ori $2, $2, 13108 |
| ; MIPS64EL-NEXT: jr $ra |
| ; MIPS64EL-NEXT: sltu $2, $1, $2 |
| %urem = urem i13 %X, 5 |
| %cmp = icmp eq i13 %urem, 0 |
| ret i1 %cmp |
| } |
| |
| define i1 @test_urem_even(i27 %X) nounwind { |
| ; MIPSEL-LABEL: test_urem_even: |
| ; MIPSEL: # %bb.0: |
| ; MIPSEL-NEXT: lui $1, 2047 |
| ; MIPSEL-NEXT: ori $1, $1, 65535 |
| ; MIPSEL-NEXT: and $1, $4, $1 |
| ; MIPSEL-NEXT: srl $2, $1, 1 |
| ; MIPSEL-NEXT: lui $3, 37449 |
| ; MIPSEL-NEXT: ori $3, $3, 9363 |
| ; MIPSEL-NEXT: multu $2, $3 |
| ; MIPSEL-NEXT: mfhi $2 |
| ; MIPSEL-NEXT: srl $2, $2, 2 |
| ; MIPSEL-NEXT: sll $3, $2, 4 |
| ; MIPSEL-NEXT: sll $2, $2, 1 |
| ; MIPSEL-NEXT: subu $2, $2, $3 |
| ; MIPSEL-NEXT: addu $1, $1, $2 |
| ; MIPSEL-NEXT: jr $ra |
| ; MIPSEL-NEXT: sltiu $2, $1, 1 |
| ; |
| ; MIPS64EL-LABEL: test_urem_even: |
| ; MIPS64EL: # %bb.0: |
| ; MIPS64EL-NEXT: lui $1, 2047 |
| ; MIPS64EL-NEXT: ori $1, $1, 65535 |
| ; MIPS64EL-NEXT: sll $2, $4, 0 |
| ; MIPS64EL-NEXT: and $1, $2, $1 |
| ; MIPS64EL-NEXT: srl $2, $1, 1 |
| ; MIPS64EL-NEXT: lui $3, 37449 |
| ; MIPS64EL-NEXT: ori $3, $3, 9363 |
| ; MIPS64EL-NEXT: multu $2, $3 |
| ; MIPS64EL-NEXT: mfhi $2 |
| ; MIPS64EL-NEXT: srl $2, $2, 2 |
| ; MIPS64EL-NEXT: sll $3, $2, 4 |
| ; MIPS64EL-NEXT: sll $2, $2, 1 |
| ; MIPS64EL-NEXT: subu $2, $2, $3 |
| ; MIPS64EL-NEXT: addu $1, $1, $2 |
| ; MIPS64EL-NEXT: jr $ra |
| ; MIPS64EL-NEXT: sltiu $2, $1, 1 |
| %urem = urem i27 %X, 14 |
| %cmp = icmp eq i27 %urem, 0 |
| ret i1 %cmp |
| } |
| |
| define i1 @test_urem_odd_setne(i4 %X) nounwind { |
| ; MIPSEL-LABEL: test_urem_odd_setne: |
| ; MIPSEL: # %bb.0: |
| ; MIPSEL-NEXT: lui $1, 52428 |
| ; MIPSEL-NEXT: ori $1, $1, 52429 |
| ; MIPSEL-NEXT: andi $2, $4, 15 |
| ; MIPSEL-NEXT: mul $1, $2, $1 |
| ; MIPSEL-NEXT: lui $2, 13107 |
| ; MIPSEL-NEXT: ori $2, $2, 13107 |
| ; MIPSEL-NEXT: jr $ra |
| ; MIPSEL-NEXT: sltu $2, $2, $1 |
| ; |
| ; MIPS64EL-LABEL: test_urem_odd_setne: |
| ; MIPS64EL: # %bb.0: |
| ; MIPS64EL-NEXT: lui $1, 52428 |
| ; MIPS64EL-NEXT: ori $1, $1, 52429 |
| ; MIPS64EL-NEXT: sll $2, $4, 0 |
| ; MIPS64EL-NEXT: andi $2, $2, 15 |
| ; MIPS64EL-NEXT: mul $1, $2, $1 |
| ; MIPS64EL-NEXT: lui $2, 13107 |
| ; MIPS64EL-NEXT: ori $2, $2, 13107 |
| ; MIPS64EL-NEXT: jr $ra |
| ; MIPS64EL-NEXT: sltu $2, $2, $1 |
| %urem = urem i4 %X, 5 |
| %cmp = icmp ne i4 %urem, 0 |
| ret i1 %cmp |
| } |
| |
| define i1 @test_urem_negative_odd(i9 %X) nounwind { |
| ; MIPSEL-LABEL: test_urem_negative_odd: |
| ; MIPSEL: # %bb.0: |
| ; MIPSEL-NEXT: lui $1, 43302 |
| ; MIPSEL-NEXT: ori $1, $1, 57651 |
| ; MIPSEL-NEXT: andi $2, $4, 511 |
| ; MIPSEL-NEXT: mul $1, $2, $1 |
| ; MIPSEL-NEXT: lui $2, 129 |
| ; MIPSEL-NEXT: ori $2, $2, 17191 |
| ; MIPSEL-NEXT: jr $ra |
| ; MIPSEL-NEXT: sltu $2, $2, $1 |
| ; |
| ; MIPS64EL-LABEL: test_urem_negative_odd: |
| ; MIPS64EL: # %bb.0: |
| ; MIPS64EL-NEXT: lui $1, 43302 |
| ; MIPS64EL-NEXT: ori $1, $1, 57651 |
| ; MIPS64EL-NEXT: sll $2, $4, 0 |
| ; MIPS64EL-NEXT: andi $2, $2, 511 |
| ; MIPS64EL-NEXT: mul $1, $2, $1 |
| ; MIPS64EL-NEXT: lui $2, 129 |
| ; MIPS64EL-NEXT: ori $2, $2, 17191 |
| ; MIPS64EL-NEXT: jr $ra |
| ; MIPS64EL-NEXT: sltu $2, $2, $1 |
| %urem = urem i9 %X, -5 |
| %cmp = icmp ne i9 %urem, 0 |
| ret i1 %cmp |
| } |
| |
| ; Asserts today |
| ; define <3 x i1> @test_urem_vec(<3 x i11> %X) nounwind { |
| ; %urem = urem <3 x i11> %X, <i11 6, i11 7, i11 -5> |
| ; %cmp = icmp ne <3 x i11> %urem, <i11 0, i11 1, i11 2> |
| ; ret <3 x i1> %cmp |
| ; } |
| |
| define i1 @test_urem_oversized(i66 %X) nounwind { |
| ; MIPSEL-LABEL: test_urem_oversized: |
| ; MIPSEL: # %bb.0: |
| ; MIPSEL-NEXT: addiu $sp, $sp, -40 |
| ; MIPSEL-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill |
| ; MIPSEL-NEXT: move $7, $6 |
| ; MIPSEL-NEXT: move $6, $5 |
| ; MIPSEL-NEXT: lui $1, 18838 |
| ; MIPSEL-NEXT: ori $1, $1, 722 |
| ; MIPSEL-NEXT: sw $1, 28($sp) |
| ; MIPSEL-NEXT: sw $zero, 24($sp) |
| ; MIPSEL-NEXT: sw $zero, 20($sp) |
| ; MIPSEL-NEXT: sw $zero, 16($sp) |
| ; MIPSEL-NEXT: andi $5, $4, 3 |
| ; MIPSEL-NEXT: jal __umodti3 |
| ; MIPSEL-NEXT: addiu $4, $zero, 0 |
| ; MIPSEL-NEXT: or $1, $4, $2 |
| ; MIPSEL-NEXT: or $2, $5, $3 |
| ; MIPSEL-NEXT: or $1, $2, $1 |
| ; MIPSEL-NEXT: sltiu $2, $1, 1 |
| ; MIPSEL-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload |
| ; MIPSEL-NEXT: jr $ra |
| ; MIPSEL-NEXT: addiu $sp, $sp, 40 |
| ; |
| ; MIPS64EL-LABEL: test_urem_oversized: |
| ; MIPS64EL: # %bb.0: |
| ; MIPS64EL-NEXT: daddiu $sp, $sp, -16 |
| ; MIPS64EL-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill |
| ; MIPS64EL-NEXT: andi $5, $5, 3 |
| ; MIPS64EL-NEXT: lui $1, 18838 |
| ; MIPS64EL-NEXT: ori $6, $1, 722 |
| ; MIPS64EL-NEXT: jal __umodti3 |
| ; MIPS64EL-NEXT: daddiu $7, $zero, 0 |
| ; MIPS64EL-NEXT: or $1, $2, $3 |
| ; MIPS64EL-NEXT: sltiu $2, $1, 1 |
| ; MIPS64EL-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload |
| ; MIPS64EL-NEXT: jr $ra |
| ; MIPS64EL-NEXT: daddiu $sp, $sp, 16 |
| %urem = urem i66 %X, 1234567890 |
| %cmp = icmp eq i66 %urem, 0 |
| ret i1 %cmp |
| } |