blob: a5d0314f21359dfe514ee3dca3420c63027afb74 [file] [log] [blame]
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs
; RUN: opt -S -verify -iroutliner -ir-outlining-no-cost < %s | FileCheck %s
; Show that we do not outline when all of the phi nodes in the end
; block are not included in the region.
define void @function1(i32* %a, i32* %b) {
entry:
%0 = alloca i32, align 4
%c = load i32, i32* %0, align 4
%z = add i32 %c, %c
br i1 true, label %test1, label %first
test1:
%e = load i32, i32* %0, align 4
%1 = add i32 %c, %c
br i1 true, label %first, label %test
test:
%d = load i32, i32* %0, align 4
br i1 true, label %first, label %next
first:
%2 = phi i32 [ %d, %test ], [ %e, %test1 ], [ %c, %entry ]
%3 = phi i32 [ %d, %test ], [ %e, %test1 ], [ %c, %entry ]
ret void
next:
ret void
}
define void @function2(i32* %a, i32* %b) {
entry:
%0 = alloca i32, align 4
%c = load i32, i32* %0, align 4
%z = mul i32 %c, %c
br i1 true, label %test1, label %first
test1:
%e = load i32, i32* %0, align 4
%1 = add i32 %c, %c
br i1 true, label %first, label %test
test:
%d = load i32, i32* %0, align 4
br i1 true, label %first, label %next
first:
%2 = phi i32 [ %d, %test ], [ %e, %test1 ], [ %c, %entry ]
%3 = phi i32 [ %d, %test ], [ %c, %entry ], [ %e, %test1 ]
ret void
next:
ret void
}
; CHECK-LABEL: @function1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[C:%.*]] = load i32, i32* [[TMP0]], align 4
; CHECK-NEXT: [[Z:%.*]] = add i32 [[C]], [[C]]
; CHECK-NEXT: br i1 true, label [[TEST1:%.*]], label [[FIRST:%.*]]
; CHECK: test1:
; CHECK-NEXT: [[E:%.*]] = load i32, i32* [[TMP0]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[C]], [[C]]
; CHECK-NEXT: br i1 true, label [[FIRST]], label [[TEST:%.*]]
; CHECK: test:
; CHECK-NEXT: [[D:%.*]] = load i32, i32* [[TMP0]], align 4
; CHECK-NEXT: br i1 true, label [[FIRST]], label [[NEXT:%.*]]
; CHECK: first:
; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[D]], [[TEST]] ], [ [[E]], [[TEST1]] ], [ [[C]], [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ [[D]], [[TEST]] ], [ [[E]], [[TEST1]] ], [ [[C]], [[ENTRY]] ]
; CHECK-NEXT: ret void
; CHECK: next:
; CHECK-NEXT: ret void
;
;
; CHECK-LABEL: @function2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[C:%.*]] = load i32, i32* [[TMP0]], align 4
; CHECK-NEXT: [[Z:%.*]] = mul i32 [[C]], [[C]]
; CHECK-NEXT: br i1 true, label [[TEST1:%.*]], label [[FIRST:%.*]]
; CHECK: test1:
; CHECK-NEXT: [[E:%.*]] = load i32, i32* [[TMP0]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[C]], [[C]]
; CHECK-NEXT: br i1 true, label [[FIRST]], label [[TEST:%.*]]
; CHECK: test:
; CHECK-NEXT: [[D:%.*]] = load i32, i32* [[TMP0]], align 4
; CHECK-NEXT: br i1 true, label [[FIRST]], label [[NEXT:%.*]]
; CHECK: first:
; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[D]], [[TEST]] ], [ [[E]], [[TEST1]] ], [ [[C]], [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ [[D]], [[TEST]] ], [ [[C]], [[ENTRY]] ], [ [[E]], [[TEST1]] ]
; CHECK-NEXT: ret void
; CHECK: next:
; CHECK-NEXT: ret void
;