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6a4c0551fbd905397666676142d59af81585c2cb
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.
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test
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CodeGen
/
Hexagon
/
vect
/
vect-no-tfrs-1.ll
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; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK-NOT: r1:0 = r1:0
define
<
4
x
i16
>
@t_i4x16
(<
4
x
i16
>
%a
,
<
4
x
i16
>
%b
)
nounwind
{
entry
:
%0
=
mul
<
4
x
i16
>
%a
,
%b
ret
<
4
x
i16
>
%0
}