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llvm / llvm-project / llvm / 6a4c0551fbd905397666676142d59af81585c2cb / . / test / CodeGen / AMDGPU / GlobalISel / combine-fold-binop-into-select.mir
blob: add7816778eb66fc9c0b21ec6770aba5ebb4668d [file] [log] [blame]
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=amdgpu-prelegalizer-combiner -simplify-mir -verify-machineinstrs -o - %s | FileCheck %s
---
name: no_fold_add_into_select_s32_0_multi_use
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: no_fold_add_into_select_s32_0_multi_use
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %ten:_(s32) = G_CONSTANT i32 10
; CHECK-NEXT: %twenty:_(s32) = G_CONSTANT i32 20
; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %ten, %twenty
; CHECK-NEXT: %thirty:_(s32) = G_CONSTANT i32 30
; CHECK-NEXT: %add:_(s32) = G_ADD %select, %thirty
; CHECK-NEXT: S_ENDPGM 0, implicit %add(s32), implicit %select(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%add:_(s32) = G_ADD %select, %thirty
S_ENDPGM 0, implicit %add, implicit %select
...
---
name: no_fold_add_into_select_s32_1_multi_use
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: no_fold_add_into_select_s32_1_multi_use
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %ten:_(s32) = G_CONSTANT i32 10
; CHECK-NEXT: %twenty:_(s32) = G_CONSTANT i32 20
; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %ten, %twenty
; CHECK-NEXT: %thirty:_(s32) = G_CONSTANT i32 30
; CHECK-NEXT: %add:_(s32) = G_ADD %thirty, %select
; CHECK-NEXT: S_ENDPGM 0, implicit %add(s32), implicit %select(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%add:_(s32) = G_ADD %thirty, %select
S_ENDPGM 0, implicit %add, implicit %select
...
---
name: no_fold_sub_into_select_s32_nonconst_rhs
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: no_fold_sub_into_select_s32_nonconst_rhs
; CHECK: liveins: $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %variable:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %ten:_(s32) = G_CONSTANT i32 10
; CHECK-NEXT: %twenty:_(s32) = G_CONSTANT i32 20
; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %ten, %twenty
; CHECK-NEXT: %sub:_(s32) = G_SUB %select, %variable
; CHECK-NEXT: S_ENDPGM 0, implicit %sub(s32)
%reg:_(s32) = COPY $vgpr0
%variable:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%sub:_(s32) = G_SUB %select, %variable
S_ENDPGM 0, implicit %sub
...
---
name: no_fold_sub_into_select_s32_nonconst_lhs
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: no_fold_sub_into_select_s32_nonconst_lhs
; CHECK: liveins: $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %variable:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %ten:_(s32) = G_CONSTANT i32 10
; CHECK-NEXT: %twenty:_(s32) = G_CONSTANT i32 20
; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %ten, %twenty
; CHECK-NEXT: %sub:_(s32) = G_SUB %variable, %select
; CHECK-NEXT: S_ENDPGM 0, implicit %sub(s32)
%reg:_(s32) = COPY $vgpr0
%variable:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%sub:_(s32) = G_SUB %variable, %select
S_ENDPGM 0, implicit %sub
...
---
name: fold_add_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_add_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 40
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 50
; CHECK-NEXT: %add:_(s32) = G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %add(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%add:_(s32) = G_ADD %select, %thirty
S_ENDPGM 0, implicit %add
...
---
name: fold_add_into_select_s32_1
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_add_into_select_s32_1
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 40
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 50
; CHECK-NEXT: %add:_(s32) = G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %add(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%add:_(s32) = G_ADD %thirty, %select
S_ENDPGM 0, implicit %add
...
---
name: fold_add_into_select_v2s32_splat
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; CHECK-LABEL: name: fold_add_into_select_v2s32_splat
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg0:_(<2 x s32>) = COPY $vgpr0_vgpr1
; CHECK-NEXT: %reg1:_(<2 x s32>) = COPY $vgpr2_vgpr3
; CHECK-NEXT: %cond:_(<2 x s1>) = G_ICMP intpred(eq), %reg0(<2 x s32>), %reg1
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 40
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 50
; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32)
; CHECK-NEXT: %add:_(<2 x s32>) = G_SELECT %cond(<2 x s1>), [[BUILD_VECTOR]], [[BUILD_VECTOR1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %add(<2 x s32>)
%reg0:_(<2 x s32>) = COPY $vgpr0_vgpr1
%reg1:_(<2 x s32>) = COPY $vgpr2_vgpr3
%cond:_(<2 x s1>) = G_ICMP intpred(eq), %reg0, %reg1
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%ten_vec:_(<2 x s32>) = G_BUILD_VECTOR %ten, %ten
%twenty_vec:_(<2 x s32>) = G_BUILD_VECTOR %twenty, %twenty
%select:_(<2 x s32>) = G_SELECT %cond, %ten_vec, %twenty_vec
%thirty:_(s32) = G_CONSTANT i32 30
%thirty_vec:_(<2 x s32>) = G_BUILD_VECTOR %thirty, %thirty
%add:_(<2 x s32>) = G_ADD %select, %thirty_vec
S_ENDPGM 0, implicit %add
...
---
name: fold_add_into_select_v2s32_nonsplat
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; CHECK-LABEL: name: fold_add_into_select_v2s32_nonsplat
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg0:_(<2 x s32>) = COPY $vgpr0_vgpr1
; CHECK-NEXT: %reg1:_(<2 x s32>) = COPY $vgpr2_vgpr3
; CHECK-NEXT: %cond:_(<2 x s1>) = G_ICMP intpred(eq), %reg0(<2 x s32>), %reg1
; CHECK-NEXT: %twenty:_(s32) = G_CONSTANT i32 20
; CHECK-NEXT: %thirty:_(s32) = G_CONSTANT i32 30
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 40
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), %thirty(s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 50
; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C1]](s32), %twenty(s32)
; CHECK-NEXT: %add:_(<2 x s32>) = G_SELECT %cond(<2 x s1>), [[BUILD_VECTOR]], [[BUILD_VECTOR1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %add(<2 x s32>)
%reg0:_(<2 x s32>) = COPY $vgpr0_vgpr1
%reg1:_(<2 x s32>) = COPY $vgpr2_vgpr3
%cond:_(<2 x s1>) = G_ICMP intpred(eq), %reg0, %reg1
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%const_vec0:_(<2 x s32>) = G_BUILD_VECTOR %ten, %twenty
%const_vec1:_(<2 x s32>) = G_BUILD_VECTOR %twenty, %ten
%select:_(<2 x s32>) = G_SELECT %cond, %const_vec0, %const_vec1
%thirty:_(s32) = G_CONSTANT i32 30
%const_vec3:_(<2 x s32>) = G_BUILD_VECTOR %thirty, %ten
%add:_(<2 x s32>) = G_ADD %select, %const_vec3
S_ENDPGM 0, implicit %add
...
---
name: fold_add_into_select_v2s32_nonsplat_undef
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; CHECK-LABEL: name: fold_add_into_select_v2s32_nonsplat_undef
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg0:_(<2 x s32>) = COPY $vgpr0_vgpr1
; CHECK-NEXT: %reg1:_(<2 x s32>) = COPY $vgpr2_vgpr3
; CHECK-NEXT: %cond:_(<2 x s1>) = G_ICMP intpred(eq), %reg0(<2 x s32>), %reg1
; CHECK-NEXT: %twenty:_(s32) = G_CONSTANT i32 20
; CHECK-NEXT: %undef:_(s32) = G_IMPLICIT_DEF
; CHECK-NEXT: %const_vec0:_(<2 x s32>) = G_BUILD_VECTOR %undef(s32), %twenty(s32)
; CHECK-NEXT: %const_vec1:_(<2 x s32>) = G_BUILD_VECTOR %twenty(s32), %undef(s32)
; CHECK-NEXT: %thirty:_(s32) = G_CONSTANT i32 30
; CHECK-NEXT: %const_vec3:_(<2 x s32>) = G_BUILD_VECTOR %thirty(s32), %undef(s32)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<2 x s32>) = G_ADD %const_vec0, %const_vec3
; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(<2 x s32>) = G_ADD %const_vec1, %const_vec3
; CHECK-NEXT: %add:_(<2 x s32>) = G_SELECT %cond(<2 x s1>), [[ADD]], [[ADD1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %add(<2 x s32>)
%reg0:_(<2 x s32>) = COPY $vgpr0_vgpr1
%reg1:_(<2 x s32>) = COPY $vgpr2_vgpr3
%cond:_(<2 x s1>) = G_ICMP intpred(eq), %reg0, %reg1
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%undef:_(s32) = G_IMPLICIT_DEF
%const_vec0:_(<2 x s32>) = G_BUILD_VECTOR %undef, %twenty
%const_vec1:_(<2 x s32>) = G_BUILD_VECTOR %twenty, %undef
%select:_(<2 x s32>) = G_SELECT %cond, %const_vec0, %const_vec1
%thirty:_(s32) = G_CONSTANT i32 30
%const_vec3:_(<2 x s32>) = G_BUILD_VECTOR %thirty, %undef
%add:_(<2 x s32>) = G_ADD %select, %const_vec3
S_ENDPGM 0, implicit %add
...
---
name: fold_sub_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_sub_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -20
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -10
; CHECK-NEXT: %sub:_(s32) = G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %sub(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%sub:_(s32) = G_SUB %select, %thirty
S_ENDPGM 0, implicit %sub
...
---
name: fold_sub_into_select_s32_1
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_sub_into_select_s32_1
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %ten:_(s32) = G_CONSTANT i32 10
; CHECK-NEXT: %twenty:_(s32) = G_CONSTANT i32 20
; CHECK-NEXT: %sub:_(s32) = G_SELECT %cond(s1), %twenty, %ten
; CHECK-NEXT: S_ENDPGM 0, implicit %sub(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%sub:_(s32) = G_SUB %thirty, %select
S_ENDPGM 0, implicit %sub
...
---
name: fold_ptr_add_into_select_p3_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_ptr_add_into_select_p3_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 40
; CHECK-NEXT: [[C1:%[0-9]+]]:_(p3) = G_CONSTANT i32 50
; CHECK-NEXT: %ptr_add:_(p3) = G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %ptr_add(p3)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(p3) = G_CONSTANT i32 10
%twenty:_(p3) = G_CONSTANT i32 20
%select:_(p3) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%ptr_add:_(p3) = G_PTR_ADD %select, %thirty
S_ENDPGM 0, implicit %ptr_add
...
---
name: fold_ptr_add_into_select_p3_1
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_ptr_add_into_select_p3_1
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 40
; CHECK-NEXT: [[C1:%[0-9]+]]:_(p3) = G_CONSTANT i32 50
; CHECK-NEXT: %ptr_add:_(p3) = G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %ptr_add(p3)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(p3) = G_CONSTANT i32 30
%ptr_add:_(p3) = G_PTR_ADD %thirty, %select
S_ENDPGM 0, implicit %ptr_add
...
---
name: fold_shl_into_select_s64_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_shl_into_select_s64_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1280
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2560
; CHECK-NEXT: %shl:_(s64) = G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %shl(s64)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s64) = G_CONSTANT i64 10
%twenty:_(s64) = G_CONSTANT i64 20
%select:_(s64) = G_SELECT %cond, %ten, %twenty
%seven:_(s32) = G_CONSTANT i32 7
%shl:_(s64) = G_SHL %select, %seven
S_ENDPGM 0, implicit %shl
...
---
name: fold_shl_into_select_s64_1
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_shl_into_select_s64_1
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8192
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 524288
; CHECK-NEXT: %shl:_(s64) = G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %shl(s64)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%sixteen:_(s32) = G_CONSTANT i32 16
%select:_(s32) = G_SELECT %cond, %ten, %sixteen
%eight:_(s64) = G_CONSTANT i64 8
%shl:_(s64) = G_SHL %eight, %select
S_ENDPGM 0, implicit %shl
...
---
name: fold_and_variable_into_select_zero_neg1_s32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: fold_and_variable_into_select_zero_neg1_s32
; CHECK: liveins: $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %variable:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %and:_(s32) = G_SELECT %cond(s1), %zero, %variable
; CHECK-NEXT: S_ENDPGM 0, implicit %and(s32)
%reg:_(s32) = COPY $vgpr0
%variable:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%neg1:_(s32) = G_CONSTANT i32 -1
%select:_(s32) = G_SELECT %cond, %zero, %neg1
%and:_(s32) = G_AND %select, %variable
S_ENDPGM 0, implicit %and
...
---
name: fold_and_variable_into_select_neg1_zero_s32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: fold_and_variable_into_select_neg1_zero_s32
; CHECK: liveins: $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %variable:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %and:_(s32) = G_SELECT %cond(s1), %variable, %zero
; CHECK-NEXT: S_ENDPGM 0, implicit %and(s32)
%reg:_(s32) = COPY $vgpr0
%variable:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%neg1:_(s32) = G_CONSTANT i32 -1
%select:_(s32) = G_SELECT %cond, %neg1, %zero
%and:_(s32) = G_AND %select, %variable
S_ENDPGM 0, implicit %and
...
---
name: fold_or_variable_into_select_zero_neg1_s32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: fold_or_variable_into_select_zero_neg1_s32
; CHECK: liveins: $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %variable:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %neg1:_(s32) = G_CONSTANT i32 -1
; CHECK-NEXT: %or:_(s32) = G_SELECT %cond(s1), %variable, %neg1
; CHECK-NEXT: S_ENDPGM 0, implicit %or(s32)
%reg:_(s32) = COPY $vgpr0
%variable:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%neg1:_(s32) = G_CONSTANT i32 -1
%select:_(s32) = G_SELECT %cond, %zero, %neg1
%or:_(s32) = G_OR %select, %variable
S_ENDPGM 0, implicit %or
...
---
name: fold_or_variable_into_select_neg1_zero_s32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: fold_or_variable_into_select_neg1_zero_s32
; CHECK: liveins: $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %variable:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %neg1:_(s32) = G_CONSTANT i32 -1
; CHECK-NEXT: %or:_(s32) = G_SELECT %cond(s1), %neg1, %variable
; CHECK-NEXT: S_ENDPGM 0, implicit %or(s32)
%reg:_(s32) = COPY $vgpr0
%variable:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%neg1:_(s32) = G_CONSTANT i32 -1
%select:_(s32) = G_SELECT %cond, %neg1, %zero
%or:_(s32) = G_OR %select, %variable
S_ENDPGM 0, implicit %or
...
---
name: fold_and_variable_into_select_undef_neg1_s32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: fold_and_variable_into_select_undef_neg1_s32
; CHECK: liveins: $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %variable:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %undef:_(s32) = G_IMPLICIT_DEF
; CHECK-NEXT: %neg1:_(s32) = G_CONSTANT i32 -1
; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %undef, %neg1
; CHECK-NEXT: %and:_(s32) = G_AND %select, %variable
; CHECK-NEXT: S_ENDPGM 0, implicit %and(s32)
%reg:_(s32) = COPY $vgpr0
%variable:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%undef:_(s32) = G_IMPLICIT_DEF
%neg1:_(s32) = G_CONSTANT i32 -1
%select:_(s32) = G_SELECT %cond, %undef, %neg1
%and:_(s32) = G_AND %select, %variable
S_ENDPGM 0, implicit %and
...
---
name: fold_and_variable_into_select_undef_zero_s32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: fold_and_variable_into_select_undef_zero_s32
; CHECK: liveins: $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %variable:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %undef:_(s32) = G_IMPLICIT_DEF
; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %undef, %zero
; CHECK-NEXT: %and:_(s32) = G_AND %select, %variable
; CHECK-NEXT: S_ENDPGM 0, implicit %and(s32)
%reg:_(s32) = COPY $vgpr0
%variable:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%undef:_(s32) = G_IMPLICIT_DEF
%select:_(s32) = G_SELECT %cond, %undef, %zero
%and:_(s32) = G_AND %select, %variable
S_ENDPGM 0, implicit %and
...
---
name: fold_or_variable_into_select_neg1_fpzero_s32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: fold_or_variable_into_select_neg1_fpzero_s32
; CHECK: liveins: $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %variable:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %neg1:_(s32) = G_CONSTANT i32 -1
; CHECK-NEXT: %fpzero:_(s32) = G_FCONSTANT float 0.000000e+00
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %fpzero, %variable
; CHECK-NEXT: %or:_(s32) = G_SELECT %cond(s1), %neg1, [[OR]]
; CHECK-NEXT: S_ENDPGM 0, implicit %or(s32)
%reg:_(s32) = COPY $vgpr0
%variable:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%neg1:_(s32) = G_CONSTANT i32 -1
%fpzero:_(s32) = G_FCONSTANT float 0.0
%select:_(s32) = G_SELECT %cond, %neg1, %fpzero
%or:_(s32) = G_OR %select, %variable
S_ENDPGM 0, implicit %or
...
---
name: no_fold_or_variable_into_select_neg1_fpnegzero_s32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: no_fold_or_variable_into_select_neg1_fpnegzero_s32
; CHECK: liveins: $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %variable:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %neg1:_(s32) = G_CONSTANT i32 -1
; CHECK-NEXT: %fpzero:_(s32) = G_FCONSTANT float -0.000000e+00
; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %neg1, %fpzero
; CHECK-NEXT: %or:_(s32) = G_OR %select, %variable
; CHECK-NEXT: S_ENDPGM 0, implicit %or(s32)
%reg:_(s32) = COPY $vgpr0
%variable:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%neg1:_(s32) = G_CONSTANT i32 -1
%fpzero:_(s32) = G_FCONSTANT float -0.0
%select:_(s32) = G_SELECT %cond, %neg1, %fpzero
%or:_(s32) = G_OR %select, %variable
S_ENDPGM 0, implicit %or
...
---
name: no_fold_or_variable_into_select_neg1_other_const_s32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: no_fold_or_variable_into_select_neg1_other_const_s32
; CHECK: liveins: $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %variable:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %neg1:_(s32) = G_CONSTANT i32 -1
; CHECK-NEXT: %otherconst:_(s32) = G_CONSTANT i32 123
; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %neg1, %otherconst
; CHECK-NEXT: %or:_(s32) = G_OR %select, %variable
; CHECK-NEXT: S_ENDPGM 0, implicit %or(s32)
%reg:_(s32) = COPY $vgpr0
%variable:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%neg1:_(s32) = G_CONSTANT i32 -1
%otherconst:_(s32) = G_CONSTANT i32 123
%select:_(s32) = G_SELECT %cond, %neg1, %otherconst
%or:_(s32) = G_OR %select, %variable
S_ENDPGM 0, implicit %or
...
---
name: fold_xor_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_xor_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %ten:_(s32) = G_CONSTANT i32 10
; CHECK-NEXT: %twenty:_(s32) = G_CONSTANT i32 20
; CHECK-NEXT: %xor:_(s32) = G_SELECT %cond(s1), %twenty, %ten
; CHECK-NEXT: S_ENDPGM 0, implicit %xor(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%xor:_(s32) = G_XOR %select, %thirty
S_ENDPGM 0, implicit %xor
...
---
name: fold_sdiv_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_sdiv_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 50
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 21
; CHECK-NEXT: %sdiv:_(s32) = G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %sdiv(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%hundred:_(s32) = G_CONSTANT i32 100
%fortytwo:_(s32) = G_CONSTANT i32 42
%select:_(s32) = G_SELECT %cond, %hundred, %fortytwo
%two:_(s32) = G_CONSTANT i32 2
%sdiv:_(s32) = G_SDIV %select, %two
S_ENDPGM 0, implicit %sdiv
...
---
name: fold_srem_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_srem_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: %srem:_(s32) = G_SELECT %cond(s1), [[C]], %zero
; CHECK-NEXT: S_ENDPGM 0, implicit %srem(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%hundred:_(s32) = G_CONSTANT i32 100
%fortytwo:_(s32) = G_CONSTANT i32 42
%select:_(s32) = G_SELECT %cond, %hundred, %fortytwo
%three:_(s32) = G_CONSTANT i32 3
%srem:_(s32) = G_SREM %select, %three
S_ENDPGM 0, implicit %srem
...
---
name: fold_udiv_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_udiv_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 50
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 21
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit [[SELECT]](s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%hundred:_(s32) = G_CONSTANT i32 100
%fortytwo:_(s32) = G_CONSTANT i32 42
%select:_(s32) = G_SELECT %cond, %hundred, %fortytwo
%two:_(s32) = G_CONSTANT i32 2
%udiv:_(s32) = G_UDIV %select, %two
S_ENDPGM 0, implicit %udiv
...
---
name: fold_urem_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_urem_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: %udiv:_(s32) = G_SELECT %cond(s1), [[C]], %zero
; CHECK-NEXT: S_ENDPGM 0, implicit %udiv(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%hundred:_(s32) = G_CONSTANT i32 100
%fortytwo:_(s32) = G_CONSTANT i32 42
%select:_(s32) = G_SELECT %cond, %hundred, %fortytwo
%three:_(s32) = G_CONSTANT i32 3
%udiv:_(s32) = G_UREM %select, %three
S_ENDPGM 0, implicit %udiv
...
---
name: fold_lshr_into_select_s64_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_lshr_into_select_s64_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 5
; CHECK-NEXT: %lshr:_(s64) = G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %lshr(s64)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s64) = G_CONSTANT i64 10
%twenty:_(s64) = G_CONSTANT i64 20
%select:_(s64) = G_SELECT %cond, %ten, %twenty
%two:_(s32) = G_CONSTANT i32 2
%lshr:_(s64) = G_LSHR %select, %two
S_ENDPGM 0, implicit %lshr
...
---
name: fold_lshr_into_select_s64_1
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_lshr_into_select_s64_1
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1012
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 253
; CHECK-NEXT: %lshr:_(s64) = G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %lshr(s64)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%three:_(s32) = G_CONSTANT i32 3
%five:_(s32) = G_CONSTANT i32 5
%select:_(s32) = G_SELECT %cond, %three, %five
%val:_(s64) = G_CONSTANT i64 8096
%lshr:_(s64) = G_LSHR %val, %select
S_ENDPGM 0, implicit %lshr
...
---
name: fold_ashr_into_select_s64_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_ashr_into_select_s64_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 5
; CHECK-NEXT: %ashr:_(s64) = G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %ashr(s64)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s64) = G_CONSTANT i64 10
%twenty:_(s64) = G_CONSTANT i64 20
%select:_(s64) = G_SELECT %cond, %ten, %twenty
%two:_(s32) = G_CONSTANT i32 2
%ashr:_(s64) = G_ASHR %select, %two
S_ENDPGM 0, implicit %ashr
...
---
name: fold_ashr_into_select_s64_1
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_ashr_into_select_s64_1
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1012
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -253
; CHECK-NEXT: %ashr:_(s64) = G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %ashr(s64)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%three:_(s32) = G_CONSTANT i32 3
%five:_(s32) = G_CONSTANT i32 5
%select:_(s32) = G_SELECT %cond, %three, %five
%val:_(s64) = G_CONSTANT i64 -8096
%ashr:_(s64) = G_ASHR %val, %select
S_ENDPGM 0, implicit %ashr
...
---
name: fold_smin_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_smin_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %ten:_(s32) = G_CONSTANT i32 10
; CHECK-NEXT: %twenty:_(s32) = G_CONSTANT i32 20
; CHECK-NEXT: %smin:_(s32) = G_SELECT %cond(s1), %ten, %twenty
; CHECK-NEXT: S_ENDPGM 0, implicit %smin(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%smin:_(s32) = G_SMIN %select, %thirty
S_ENDPGM 0, implicit %smin
...
---
name: fold_smax_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_smax_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %thirty:_(s32) = G_CONSTANT i32 30
; CHECK-NEXT: S_ENDPGM 0, implicit %thirty(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%smax:_(s32) = G_SMAX %select, %thirty
S_ENDPGM 0, implicit %smax
...
---
name: fold_umin_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_umin_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %ten:_(s32) = G_CONSTANT i32 10
; CHECK-NEXT: %twenty:_(s32) = G_CONSTANT i32 20
; CHECK-NEXT: %umin:_(s32) = G_SELECT %cond(s1), %ten, %twenty
; CHECK-NEXT: S_ENDPGM 0, implicit %umin(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%umin:_(s32) = G_UMIN %select, %thirty
S_ENDPGM 0, implicit %umin
...
---
name: fold_umax_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_umax_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %thirty:_(s32) = G_CONSTANT i32 30
; CHECK-NEXT: S_ENDPGM 0, implicit %thirty(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%umax:_(s32) = G_UMAX %select, %thirty
S_ENDPGM 0, implicit %umax
...
---
name: fold_fadd_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_fadd_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.800000e+01
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 2.000000e+01
; CHECK-NEXT: %fadd:_(s32) = nnan G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %fadd(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s32) = G_FCONSTANT float 2.0
%four:_(s32) = G_FCONSTANT float 4.0
%select:_(s32) = G_SELECT %cond, %two, %four
%sixteen:_(s32) = G_FCONSTANT float 16.0
%fadd:_(s32) = nnan G_FADD %select, %sixteen
S_ENDPGM 0, implicit %fadd
...
---
name: fold_fadd_into_select_s32_1
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_fadd_into_select_s32_1
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.800000e+01
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 2.000000e+01
; CHECK-NEXT: %fadd:_(s32) = nnan G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %fadd(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s32) = G_FCONSTANT float 2.0
%four:_(s32) = G_FCONSTANT float 4.0
%select:_(s32) = G_SELECT %cond, %two, %four
%sixteen:_(s32) = G_FCONSTANT float 16.0
%fadd:_(s32) = nnan G_FADD %sixteen, %select
S_ENDPGM 0, implicit %fadd
...
---
name: fold_fsub_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_fsub_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float -1.400000e+01
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float -1.200000e+01
; CHECK-NEXT: %fsub:_(s32) = nnan G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %fsub(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s32) = G_FCONSTANT float 2.0
%four:_(s32) = G_FCONSTANT float 4.0
%select:_(s32) = G_SELECT %cond, %two, %four
%sixteen:_(s32) = G_FCONSTANT float 16.0
%fsub:_(s32) = nnan G_FSUB %select, %sixteen
S_ENDPGM 0, implicit %fsub
...
---
name: fold_fmul_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_fmul_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 3.200000e+01
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 6.400000e+01
; CHECK-NEXT: %fmul:_(s32) = nnan G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %fmul(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s32) = G_FCONSTANT float 2.0
%four:_(s32) = G_FCONSTANT float 4.0
%select:_(s32) = G_SELECT %cond, %two, %four
%sixteen:_(s32) = G_FCONSTANT float 16.0
%fmul:_(s32) = nnan G_FMUL %select, %sixteen
S_ENDPGM 0, implicit %fmul
...
---
name: fold_fdiv_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_fdiv_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.250000e-01
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 2.500000e-01
; CHECK-NEXT: %fdiv:_(s32) = nnan G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %fdiv(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s32) = G_FCONSTANT float 2.0
%four:_(s32) = G_FCONSTANT float 4.0
%select:_(s32) = G_SELECT %cond, %two, %four
%sixteen:_(s32) = G_FCONSTANT float 16.0
%fdiv:_(s32) = nnan G_FDIV %select, %sixteen
S_ENDPGM 0, implicit %fdiv
...
---
name: fold_frem_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_frem_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %two:_(s32) = G_FCONSTANT float 2.000000e+00
; CHECK-NEXT: %four:_(s32) = G_FCONSTANT float 4.000000e+00
; CHECK-NEXT: %frem:_(s32) = nnan G_SELECT %cond(s1), %two, %four
; CHECK-NEXT: S_ENDPGM 0, implicit %frem(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s32) = G_FCONSTANT float 2.0
%four:_(s32) = G_FCONSTANT float 4.0
%select:_(s32) = G_SELECT %cond, %two, %four
%sixteen:_(s32) = G_FCONSTANT float 16.0
%frem:_(s32) = nnan G_FREM %select, %sixteen
S_ENDPGM 0, implicit %frem
...
---
name: fold_fpow_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_fpow_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %two:_(s32) = G_FCONSTANT float 2.000000e+00
; CHECK-NEXT: %four:_(s32) = G_FCONSTANT float 4.000000e+00
; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %two, %four
; CHECK-NEXT: %sixteen:_(s32) = G_FCONSTANT float 1.600000e+01
; CHECK-NEXT: %fpow:_(s32) = nnan G_FPOW %select, %sixteen
; CHECK-NEXT: S_ENDPGM 0, implicit %fpow(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s32) = G_FCONSTANT float 2.0
%four:_(s32) = G_FCONSTANT float 4.0
%select:_(s32) = G_SELECT %cond, %two, %four
%sixteen:_(s32) = G_FCONSTANT float 16.0
%fpow:_(s32) = nnan G_FPOW %select, %sixteen
S_ENDPGM 0, implicit %fpow
...
---
name: fold_fminnum_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_fminnum_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %two:_(s32) = G_FCONSTANT float 2.000000e+00
; CHECK-NEXT: %four:_(s32) = G_FCONSTANT float 4.000000e+00
; CHECK-NEXT: %fminnum:_(s32) = nnan G_SELECT %cond(s1), %two, %four
; CHECK-NEXT: S_ENDPGM 0, implicit %fminnum(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s32) = G_FCONSTANT float 2.0
%four:_(s32) = G_FCONSTANT float 4.0
%select:_(s32) = G_SELECT %cond, %two, %four
%sixteen:_(s32) = G_FCONSTANT float 16.0
%fminnum:_(s32) = nnan G_FMINNUM %select, %sixteen
S_ENDPGM 0, implicit %fminnum
...
---
name: fold_fminnum_ieee_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_fminnum_ieee_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %two:_(s32) = G_FCONSTANT float 2.000000e+00
; CHECK-NEXT: %four:_(s32) = G_FCONSTANT float 4.000000e+00
; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %two, %four
; CHECK-NEXT: %sixteen:_(s32) = G_FCONSTANT float 1.600000e+01
; CHECK-NEXT: %fminnum_ieee:_(s32) = nnan G_FMINNUM_IEEE %select, %sixteen
; CHECK-NEXT: S_ENDPGM 0, implicit %fminnum_ieee(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s32) = G_FCONSTANT float 2.0
%four:_(s32) = G_FCONSTANT float 4.0
%select:_(s32) = G_SELECT %cond, %two, %four
%sixteen:_(s32) = G_FCONSTANT float 16.0
%fminnum_ieee:_(s32) = nnan G_FMINNUM_IEEE %select, %sixteen
S_ENDPGM 0, implicit %fminnum_ieee
...
---
name: fold_fmaxnum_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_fmaxnum_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %four:_(s32) = G_FCONSTANT float 4.000000e+00
; CHECK-NEXT: %three:_(s32) = G_FCONSTANT float 3.000000e+00
; CHECK-NEXT: %fmaxnum:_(s32) = nnan G_SELECT %cond(s1), %three, %four
; CHECK-NEXT: S_ENDPGM 0, implicit %fmaxnum(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s32) = G_FCONSTANT float 2.0
%four:_(s32) = G_FCONSTANT float 4.0
%select:_(s32) = G_SELECT %cond, %two, %four
%three:_(s32) = G_FCONSTANT float 3.0
%fmaxnum:_(s32) = nnan G_FMAXNUM %select, %three
S_ENDPGM 0, implicit %fmaxnum
...
---
name: fold_fmaxnum_ieee_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_fmaxnum_ieee_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %two:_(s32) = G_FCONSTANT float 2.000000e+00
; CHECK-NEXT: %four:_(s32) = G_FCONSTANT float 4.000000e+00
; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %two, %four
; CHECK-NEXT: %three:_(s32) = G_FCONSTANT float 3.000000e+00
; CHECK-NEXT: %fmaxnum_ieee:_(s32) = nnan G_FMAXNUM_IEEE %select, %three
; CHECK-NEXT: S_ENDPGM 0, implicit %fmaxnum_ieee(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s32) = G_FCONSTANT float 2.0
%four:_(s32) = G_FCONSTANT float 4.0
%select:_(s32) = G_SELECT %cond, %two, %four
%three:_(s32) = G_FCONSTANT float 3.0
%fmaxnum_ieee:_(s32) = nnan G_FMAXNUM_IEEE %select, %three
S_ENDPGM 0, implicit %fmaxnum_ieee
...
---
name: fold_fminimum_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_fminimum_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %two:_(s32) = G_FCONSTANT float 2.000000e+00
; CHECK-NEXT: %four:_(s32) = G_FCONSTANT float 4.000000e+00
; CHECK-NEXT: %fminimum:_(s32) = nnan G_SELECT %cond(s1), %two, %four
; CHECK-NEXT: S_ENDPGM 0, implicit %fminimum(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s32) = G_FCONSTANT float 2.0
%four:_(s32) = G_FCONSTANT float 4.0
%select:_(s32) = G_SELECT %cond, %two, %four
%sixteen:_(s32) = G_FCONSTANT float 16.0
%fminimum:_(s32) = nnan G_FMINIMUM %select, %sixteen
S_ENDPGM 0, implicit %fminimum
...
---
name: fold_fmaximum_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_fmaximum_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %four:_(s32) = G_FCONSTANT float 4.000000e+00
; CHECK-NEXT: %three:_(s32) = G_FCONSTANT float 3.000000e+00
; CHECK-NEXT: %fmaximum:_(s32) = nnan G_SELECT %cond(s1), %three, %four
; CHECK-NEXT: S_ENDPGM 0, implicit %fmaximum(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s32) = G_FCONSTANT float 2.0
%four:_(s32) = G_FCONSTANT float 4.0
%select:_(s32) = G_SELECT %cond, %two, %four
%three:_(s32) = G_FCONSTANT float 3.0
%fmaximum:_(s32) = nnan G_FMAXIMUM %select, %three
S_ENDPGM 0, implicit %fmaximum
...
---
name: fold_fcopysign_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_fcopysign_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %two:_(s32) = G_FCONSTANT float 2.000000e+00
; CHECK-NEXT: %four:_(s32) = G_FCONSTANT float 4.000000e+00
; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %two, %four
; CHECK-NEXT: %sixteen:_(s32) = G_FCONSTANT float 1.600000e+01
; CHECK-NEXT: %fcopysign:_(s32) = nnan G_FCOPYSIGN %select, %sixteen(s32)
; CHECK-NEXT: S_ENDPGM 0, implicit %fcopysign(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s32) = G_FCONSTANT float 2.0
%four:_(s32) = G_FCONSTANT float 4.0
%select:_(s32) = G_SELECT %cond, %two, %four
%sixteen:_(s32) = G_FCONSTANT float 16.0
%fcopysign:_(s32) = nnan G_FCOPYSIGN %select, %sixteen
S_ENDPGM 0, implicit %fcopysign
...
---
name: fold_fcopysign_into_select_s32_s64_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_fcopysign_into_select_s32_s64_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %two:_(s32) = G_FCONSTANT float 2.000000e+00
; CHECK-NEXT: %four:_(s32) = G_FCONSTANT float 4.000000e+00
; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %two, %four
; CHECK-NEXT: %sixteen:_(s64) = G_FCONSTANT double 1.600000e+01
; CHECK-NEXT: %fcopysign:_(s32) = nnan G_FCOPYSIGN %select, %sixteen(s64)
; CHECK-NEXT: S_ENDPGM 0, implicit %fcopysign(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s32) = G_FCONSTANT float 2.0
%four:_(s32) = G_FCONSTANT float 4.0
%select:_(s32) = G_SELECT %cond, %two, %four
%sixteen:_(s64) = G_FCONSTANT double 16.0
%fcopysign:_(s32) = nnan G_FCOPYSIGN %select, %sixteen
S_ENDPGM 0, implicit %fcopysign
...
---
name: fold_fcopysign_into_select_s64_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_fcopysign_into_select_s64_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: %two:_(s64) = G_FCONSTANT double 2.000000e+00
; CHECK-NEXT: %four:_(s64) = G_FCONSTANT double 4.000000e+00
; CHECK-NEXT: %select:_(s64) = G_SELECT %cond(s1), %two, %four
; CHECK-NEXT: %sixteen:_(s32) = G_FCONSTANT float 1.600000e+01
; CHECK-NEXT: %fcopysign:_(s64) = nnan G_FCOPYSIGN %select, %sixteen(s32)
; CHECK-NEXT: S_ENDPGM 0, implicit %fcopysign(s64)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%two:_(s64) = G_FCONSTANT double 2.0
%four:_(s64) = G_FCONSTANT double 4.0
%select:_(s64) = G_SELECT %cond, %two, %four
%sixteen:_(s32) = G_FCONSTANT float 16.0
%fcopysign:_(s64) = nnan G_FCOPYSIGN %select, %sixteen
S_ENDPGM 0, implicit %fcopysign
...
# Test handling of intermediate copy between add and select.
---
name: fold_add_copy_into_select_s32_0
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_add_copy_into_select_s32_0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 40
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 50
; CHECK-NEXT: %add:_(s32) = G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %add(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%copy_select:_(s32) = COPY %select
%add:_(s32) = G_ADD %copy_select, %thirty
S_ENDPGM 0, implicit %add
...
---
name: fold_add_copy_into_select_s32_1
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fold_add_copy_into_select_s32_1
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg:_(s32) = COPY $vgpr0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 40
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 50
; CHECK-NEXT: %add:_(s32) = G_SELECT %cond(s1), [[C]], [[C1]]
; CHECK-NEXT: S_ENDPGM 0, implicit %add(s32)
%reg:_(s32) = COPY $vgpr0
%zero:_(s32) = G_CONSTANT i32 0
%cond:_(s1) = G_ICMP intpred(eq), %reg, %zero
%ten:_(s32) = G_CONSTANT i32 10
%twenty:_(s32) = G_CONSTANT i32 20
%select:_(s32) = G_SELECT %cond, %ten, %twenty
%thirty:_(s32) = G_CONSTANT i32 30
%copy_select:_(s32) = COPY %select
%add:_(s32) = G_ADD %thirty, %copy_select
S_ENDPGM 0, implicit %add
...