test/CodeGen/AArch64/sve-stN.mir

# RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -run-pass=prologepilog -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
# RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -start-before=prologepilog -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK-OFFSET

--- |
  define void @testcase_valid_offset() nounwind { entry: unreachable }
  define void @testcase_offset_out_of_range() nounwind { entry: unreachable }
...
---
name:            testcase_valid_offset
tracksRegLiveness: true
stack:
  - { id: 0, name: '', type: default, offset: 0, size: 512, alignment: 16, stack-id: scalable-vector }
body:             |
  bb.0:
    liveins: $p0, $z0

    ; CHECK-LABEL: name: testcase_valid_offset
    ; CHECK: liveins: $p0, $z0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -16 :: (store (s64) into %stack.1)
    ; CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -32
    ; CHECK-NEXT: ST2B_IMM renamable $z0_z1, renamable $p0, $sp, -8
    ; CHECK-NEXT: ST2B_IMM renamable $z0_z1, renamable $p0, $sp, 7
    ; CHECK-NEXT: ST2H_IMM renamable $z0_z1, renamable $p0, $sp, -8
    ; CHECK-NEXT: ST2H_IMM renamable $z0_z1, renamable $p0, $sp, 7
    ; CHECK-NEXT: ST2W_IMM renamable $z0_z1, renamable $p0, $sp, -8
    ; CHECK-NEXT: ST2W_IMM renamable $z0_z1, renamable $p0, $sp, 7
    ; CHECK-NEXT: ST2D_IMM renamable $z0_z1, renamable $p0, $sp, -8
    ; CHECK-NEXT: ST2D_IMM renamable $z0_z1, renamable $p0, $sp, 7
    ; CHECK-NEXT: ST3B_IMM renamable $z0_z1_z2, renamable $p0, $sp, -8
    ; CHECK-NEXT: ST3B_IMM renamable $z0_z1_z2, renamable $p0, $sp, 7
    ; CHECK-NEXT: ST3H_IMM renamable $z0_z1_z2, renamable $p0, $sp, -8
    ; CHECK-NEXT: ST3H_IMM renamable $z0_z1_z2, renamable $p0, $sp, 7
    ; CHECK-NEXT: ST3W_IMM renamable $z0_z1_z2, renamable $p0, $sp, -8
    ; CHECK-NEXT: ST3W_IMM renamable $z0_z1_z2, renamable $p0, $sp, 7
    ; CHECK-NEXT: ST3D_IMM renamable $z0_z1_z2, renamable $p0, $sp, -8
    ; CHECK-NEXT: ST3D_IMM renamable $z0_z1_z2, renamable $p0, $sp, 7
    ; CHECK-NEXT: ST4B_IMM renamable $z0_z1_z2_z3, renamable $p0, $sp, -8
    ; CHECK-NEXT: ST4B_IMM renamable $z0_z1_z2_z3, renamable $p0, $sp, 7
    ; CHECK-NEXT: ST4H_IMM renamable $z0_z1_z2_z3, renamable $p0, $sp, -8
    ; CHECK-NEXT: ST4H_IMM renamable $z0_z1_z2_z3, renamable $p0, $sp, 7
    ; CHECK-NEXT: ST4W_IMM renamable $z0_z1_z2_z3, renamable $p0, $sp, -8
    ; CHECK-NEXT: ST4W_IMM renamable $z0_z1_z2_z3, renamable $p0, $sp, 7
    ; CHECK-NEXT: ST4D_IMM renamable $z0_z1_z2_z3, renamable $p0, $sp, -8
    ; CHECK-NEXT: ST4D_IMM renamable $z0_z1_z2_z3, renamable $p0, $sp, 7
    ; CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 31
    ; CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 1
    ; CHECK-NEXT: early-clobber $sp, $fp = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.1)
    ; CHECK-NEXT: RET_ReallyLR

    ; CHECK-OFFSET-LABEL: testcase_valid_offset:
    ; CHECK-OFFSET: str x29, [sp, #-16]!
    ; CHECK-OFFSET-NEXT: addvl sp, sp, #-32
    ; CHECK-OFFSET-NEXT: st2b { z0.b, z1.b }, p0, [sp, #-16, mul vl]
    ; CHECK-OFFSET-NEXT: st2b { z0.b, z1.b }, p0, [sp, #14, mul vl]
    ; CHECK-OFFSET-NEXT: st2h { z0.h, z1.h }, p0, [sp, #-16, mul vl]
    ; CHECK-OFFSET-NEXT: st2h { z0.h, z1.h }, p0, [sp, #14, mul vl]
    ; CHECK-OFFSET-NEXT: st2w { z0.s, z1.s }, p0, [sp, #-16, mul vl]
    ; CHECK-OFFSET-NEXT: st2w { z0.s, z1.s }, p0, [sp, #14, mul vl]
    ; CHECK-OFFSET-NEXT: st2d { z0.d, z1.d }, p0, [sp, #-16, mul vl]
    ; CHECK-OFFSET-NEXT: st2d { z0.d, z1.d }, p0, [sp, #14, mul vl]
    ; CHECK-OFFSET-NEXT: st3b { z0.b, z1.b, z2.b }, p0, [sp, #-24, mul vl]
    ; CHECK-OFFSET-NEXT: st3b { z0.b, z1.b, z2.b }, p0, [sp, #21, mul vl]
    ; CHECK-OFFSET-NEXT: st3h { z0.h, z1.h, z2.h }, p0, [sp, #-24, mul vl]
    ; CHECK-OFFSET-NEXT: st3h { z0.h, z1.h, z2.h }, p0, [sp, #21, mul vl]
    ; CHECK-OFFSET-NEXT: st3w { z0.s, z1.s, z2.s }, p0, [sp, #-24, mul vl]
    ; CHECK-OFFSET-NEXT: st3w { z0.s, z1.s, z2.s }, p0, [sp, #21, mul vl]
    ; CHECK-OFFSET-NEXT: st3d { z0.d, z1.d, z2.d }, p0, [sp, #-24, mul vl]
    ; CHECK-OFFSET-NEXT: st3d { z0.d, z1.d, z2.d }, p0, [sp, #21, mul vl]
    ; CHECK-OFFSET-NEXT: st4b { z0.b, z1.b, z2.b, z3.b }, p0, [sp, #-32, mul vl]
    ; CHECK-OFFSET-NEXT: st4b { z0.b, z1.b, z2.b, z3.b }, p0, [sp, #28, mul vl]
    ; CHECK-OFFSET-NEXT: st4h { z0.h, z1.h, z2.h, z3.h }, p0, [sp, #-32, mul vl]
    ; CHECK-OFFSET-NEXT: st4h { z0.h, z1.h, z2.h, z3.h }, p0, [sp, #28, mul vl]
    ; CHECK-OFFSET-NEXT: st4w { z0.s, z1.s, z2.s, z3.s }, p0, [sp, #-32, mul vl]
    ; CHECK-OFFSET-NEXT: st4w { z0.s, z1.s, z2.s, z3.s }, p0, [sp, #28, mul vl]
    ; CHECK-OFFSET-NEXT: st4d { z0.d, z1.d, z2.d, z3.d }, p0, [sp, #-32, mul vl]
    ; CHECK-OFFSET-NEXT: st4d { z0.d, z1.d, z2.d, z3.d }, p0, [sp, #28, mul vl]
    ; CHECK-OFFSET-NEXT: addvl sp, sp, #31
    ; CHECK-OFFSET-NEXT: addvl sp, sp, #1
    ; CHECK-OFFSET-NEXT: ldr x29, [sp], #16
    ; CHECK-OFFSET-NEXT: ret

    ST2B_IMM renamable $z0_z1, renamable $p0, %stack.0, -8
    ST2B_IMM renamable $z0_z1, renamable $p0, %stack.0, 7
    ST2H_IMM renamable $z0_z1, renamable $p0, %stack.0, -8
    ST2H_IMM renamable $z0_z1, renamable $p0, %stack.0, 7
    ST2W_IMM renamable $z0_z1, renamable $p0, %stack.0, -8
    ST2W_IMM renamable $z0_z1, renamable $p0, %stack.0, 7
    ST2D_IMM renamable $z0_z1, renamable $p0, %stack.0, -8
    ST2D_IMM renamable $z0_z1, renamable $p0, %stack.0, 7

    ST3B_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, -8
    ST3B_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, 7
    ST3H_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, -8
    ST3H_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, 7
    ST3W_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, -8
    ST3W_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, 7
    ST3D_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, -8
    ST3D_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, 7

    ST4B_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, -8
    ST4B_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, 7
    ST4H_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, -8
    ST4H_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, 7
    ST4W_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, -8
    ST4W_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, 7
    ST4D_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, -8
    ST4D_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, 7
    RET_ReallyLR
...
---
name:            testcase_offset_out_of_range
tracksRegLiveness: true
stack:
  - { id: 0, name: '', type: default, offset: 0, size: 512, alignment: 16, stack-id: scalable-vector }
body:             |
  bb.0:
    liveins: $p0, $z0

    ; CHECK-LABEL: name: testcase_offset_out_of_range
    ; CHECK: liveins: $p0, $z0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -16 :: (store (s64) into %stack.1)
    ; CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -32
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2
    ; CHECK-NEXT: ST2B_IMM renamable $z0_z1, renamable $p0, killed $x8, -8
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2
    ; CHECK-NEXT: ST2B_IMM renamable $z0_z1, renamable $p0, killed $x8, 7
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2
    ; CHECK-NEXT: ST2H_IMM renamable $z0_z1, renamable $p0, killed $x8, -8
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2
    ; CHECK-NEXT: ST2H_IMM renamable $z0_z1, renamable $p0, killed $x8, 7
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2
    ; CHECK-NEXT: ST2W_IMM renamable $z0_z1, renamable $p0, killed $x8, -8
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2
    ; CHECK-NEXT: ST2W_IMM renamable $z0_z1, renamable $p0, killed $x8, 7
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2
    ; CHECK-NEXT: ST2D_IMM renamable $z0_z1, renamable $p0, killed $x8, -8
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2
    ; CHECK-NEXT: ST2D_IMM renamable $z0_z1, renamable $p0, killed $x8, 7
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -3
    ; CHECK-NEXT: ST3B_IMM renamable $z0_z1_z2, renamable $p0, killed $x8, -8
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 3
    ; CHECK-NEXT: ST3B_IMM renamable $z0_z1_z2, renamable $p0, killed $x8, 7
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -3
    ; CHECK-NEXT: ST3H_IMM renamable $z0_z1_z2, renamable $p0, killed $x8, -8
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 3
    ; CHECK-NEXT: ST3H_IMM renamable $z0_z1_z2, renamable $p0, killed $x8, 7
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -3
    ; CHECK-NEXT: ST3W_IMM renamable $z0_z1_z2, renamable $p0, killed $x8, -8
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 3
    ; CHECK-NEXT: ST3W_IMM renamable $z0_z1_z2, renamable $p0, killed $x8, 7
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -3
    ; CHECK-NEXT: ST3D_IMM renamable $z0_z1_z2, renamable $p0, killed $x8, -8
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 3
    ; CHECK-NEXT: ST3D_IMM renamable $z0_z1_z2, renamable $p0, killed $x8, 7
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4
    ; CHECK-NEXT: ST4B_IMM renamable $z0_z1_z2_z3, renamable $p0, killed $x8, -8
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4
    ; CHECK-NEXT: ST4B_IMM renamable $z0_z1_z2_z3, renamable $p0, killed $x8, 7
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4
    ; CHECK-NEXT: ST4H_IMM renamable $z0_z1_z2_z3, renamable $p0, killed $x8, -8
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4
    ; CHECK-NEXT: ST4H_IMM renamable $z0_z1_z2_z3, renamable $p0, killed $x8, 7
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4
    ; CHECK-NEXT: ST4W_IMM renamable $z0_z1_z2_z3, renamable $p0, killed $x8, -8
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4
    ; CHECK-NEXT: ST4W_IMM renamable $z0_z1_z2_z3, renamable $p0, killed $x8, 7
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4
    ; CHECK-NEXT: ST4D_IMM renamable $z0_z1_z2_z3, renamable $p0, killed $x8, -8
    ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4
    ; CHECK-NEXT: ST4D_IMM renamable $z0_z1_z2_z3, renamable $p0, killed $x8, 7
    ; CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 31
    ; CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 1
    ; CHECK-NEXT: early-clobber $sp, $fp = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.1)
    ; CHECK-NEXT: RET_ReallyLR

    ; CHECK-OFFSET-LABEL: testcase_offset_out_of_range
    ; CHECK-OFFSET: str x29, [sp, #-16]!
    ; CHECK-OFFSET-NEXT: addvl sp, sp, #-32
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2
    ; CHECK-OFFSET-NEXT: st2b { z0.b, z1.b }, p0, [x8, #-16, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #2
    ; CHECK-OFFSET-NEXT: st2b { z0.b, z1.b }, p0, [x8, #14, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2
    ; CHECK-OFFSET-NEXT: st2h { z0.h, z1.h }, p0, [x8, #-16, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #2
    ; CHECK-OFFSET-NEXT: st2h { z0.h, z1.h }, p0, [x8, #14, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2
    ; CHECK-OFFSET-NEXT: st2w { z0.s, z1.s }, p0, [x8, #-16, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #2
    ; CHECK-OFFSET-NEXT: st2w { z0.s, z1.s }, p0, [x8, #14, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2
    ; CHECK-OFFSET-NEXT: st2d { z0.d, z1.d }, p0, [x8, #-16, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #2
    ; CHECK-OFFSET-NEXT: st2d { z0.d, z1.d }, p0, [x8, #14, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #-3
    ; CHECK-OFFSET-NEXT: st3b { z0.b, z1.b, z2.b }, p0, [x8, #-24, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #3
    ; CHECK-OFFSET-NEXT: st3b { z0.b, z1.b, z2.b }, p0, [x8, #21, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #-3
    ; CHECK-OFFSET-NEXT: st3h { z0.h, z1.h, z2.h }, p0, [x8, #-24, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #3
    ; CHECK-OFFSET-NEXT: st3h { z0.h, z1.h, z2.h }, p0, [x8, #21, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #-3
    ; CHECK-OFFSET-NEXT: st3w { z0.s, z1.s, z2.s }, p0, [x8, #-24, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #3
    ; CHECK-OFFSET-NEXT: st3w { z0.s, z1.s, z2.s }, p0, [x8, #21, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #-3
    ; CHECK-OFFSET-NEXT: st3d { z0.d, z1.d, z2.d }, p0, [x8, #-24, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #3
    ; CHECK-OFFSET-NEXT: st3d { z0.d, z1.d, z2.d }, p0, [x8, #21, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4
    ; CHECK-OFFSET-NEXT: st4b { z0.b, z1.b, z2.b, z3.b }, p0, [x8, #-32, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #4
    ; CHECK-OFFSET-NEXT: st4b { z0.b, z1.b, z2.b, z3.b }, p0, [x8, #28, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4
    ; CHECK-OFFSET-NEXT: st4h { z0.h, z1.h, z2.h, z3.h }, p0, [x8, #-32, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #4
    ; CHECK-OFFSET-NEXT: st4h { z0.h, z1.h, z2.h, z3.h }, p0, [x8, #28, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4
    ; CHECK-OFFSET-NEXT: st4w { z0.s, z1.s, z2.s, z3.s }, p0, [x8, #-32, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #4
    ; CHECK-OFFSET-NEXT: st4w { z0.s, z1.s, z2.s, z3.s }, p0, [x8, #28, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4
    ; CHECK-OFFSET-NEXT: st4d { z0.d, z1.d, z2.d, z3.d }, p0, [x8, #-32, mul vl]
    ; CHECK-OFFSET-NEXT: addvl x8, sp, #4
    ; CHECK-OFFSET-NEXT: st4d { z0.d, z1.d, z2.d, z3.d }, p0, [x8, #28, mul vl]
    ; CHECK-OFFSET-NEXT: addvl sp, sp, #31
    ; CHECK-OFFSET-NEXT: addvl sp, sp, #1
    ; CHECK-OFFSET-NEXT: ldr x29, [sp], #16
    ; CHECK-OFFSET-NEXT: ret

    ST2B_IMM renamable $z0_z1, renamable $p0, %stack.0, -9
    ST2B_IMM renamable $z0_z1, renamable $p0, %stack.0, 8
    ST2H_IMM renamable $z0_z1, renamable $p0, %stack.0, -9
    ST2H_IMM renamable $z0_z1, renamable $p0, %stack.0, 8
    ST2W_IMM renamable $z0_z1, renamable $p0, %stack.0, -9
    ST2W_IMM renamable $z0_z1, renamable $p0, %stack.0, 8
    ST2D_IMM renamable $z0_z1, renamable $p0, %stack.0, -9
    ST2D_IMM renamable $z0_z1, renamable $p0, %stack.0, 8

    ST3B_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, -9
    ST3B_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, 8
    ST3H_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, -9
    ST3H_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, 8
    ST3W_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, -9
    ST3W_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, 8
    ST3D_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, -9
    ST3D_IMM renamable $z0_z1_z2, renamable $p0, %stack.0, 8

    ST4B_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, -9
    ST4B_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, 8
    ST4H_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, -9
    ST4H_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, 8
    ST4W_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, -9
    ST4W_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, 8
    ST4D_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, -9
    ST4D_IMM renamable $z0_z1_z2_z3, renamable $p0, %stack.0, 8
    RET_ReallyLR
...