| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| ; RUN: llc --mtriple=loongarch32 --filetype=obj --verify-machineinstrs < %s \ |
| ; RUN: -o /dev/null 2>&1 |
| ; RUN: llc --mtriple=loongarch32 --verify-machineinstrs < %s | FileCheck %s |
| |
| define void @relax_b28_spill() { |
| ; CHECK-LABEL: relax_b28_spill: |
| ; CHECK: # %bb.0: |
| ; CHECK-NEXT: addi.w $sp, $sp, -48 |
| ; CHECK-NEXT: .cfi_def_cfa_offset 48 |
| ; CHECK-NEXT: st.w $ra, $sp, 44 # 4-byte Folded Spill |
| ; CHECK-NEXT: st.w $fp, $sp, 40 # 4-byte Folded Spill |
| ; CHECK-NEXT: st.w $s0, $sp, 36 # 4-byte Folded Spill |
| ; CHECK-NEXT: st.w $s1, $sp, 32 # 4-byte Folded Spill |
| ; CHECK-NEXT: st.w $s2, $sp, 28 # 4-byte Folded Spill |
| ; CHECK-NEXT: st.w $s3, $sp, 24 # 4-byte Folded Spill |
| ; CHECK-NEXT: st.w $s4, $sp, 20 # 4-byte Folded Spill |
| ; CHECK-NEXT: st.w $s5, $sp, 16 # 4-byte Folded Spill |
| ; CHECK-NEXT: st.w $s6, $sp, 12 # 4-byte Folded Spill |
| ; CHECK-NEXT: st.w $s7, $sp, 8 # 4-byte Folded Spill |
| ; CHECK-NEXT: st.w $s8, $sp, 4 # 4-byte Folded Spill |
| ; CHECK-NEXT: .cfi_offset 1, -4 |
| ; CHECK-NEXT: .cfi_offset 22, -8 |
| ; CHECK-NEXT: .cfi_offset 23, -12 |
| ; CHECK-NEXT: .cfi_offset 24, -16 |
| ; CHECK-NEXT: .cfi_offset 25, -20 |
| ; CHECK-NEXT: .cfi_offset 26, -24 |
| ; CHECK-NEXT: .cfi_offset 27, -28 |
| ; CHECK-NEXT: .cfi_offset 28, -32 |
| ; CHECK-NEXT: .cfi_offset 29, -36 |
| ; CHECK-NEXT: .cfi_offset 30, -40 |
| ; CHECK-NEXT: .cfi_offset 31, -44 |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $zero, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $ra, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $tp, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $a0, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $a1, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $a2, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $a3, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $a4, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $a5, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $a6, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $a7, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $t0, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $t1, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $t2, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $t3, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $t4, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $t5, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $t6, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $t7, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $t8, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $fp, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $s0, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $s1, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $s2, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $s3, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $s4, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $s5, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $s6, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $s7, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: addi.w $s8, $zero, 1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: beq $s7, $s8, .LBB0_1 |
| ; CHECK-NEXT: # %bb.4: |
| ; CHECK-NEXT: st.w $t8, $sp, 0 |
| ; CHECK-NEXT: pcalau12i $t8, %pc_hi20(.LBB0_5) |
| ; CHECK-NEXT: addi.w $t8, $t8, %pc_lo12(.LBB0_5) |
| ; CHECK-NEXT: jr $t8 |
| ; CHECK-NEXT: .LBB0_1: # %iftrue |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: .space 536870912 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: b .LBB0_3 |
| ; CHECK-NEXT: .LBB0_5: # %iffalse |
| ; CHECK-NEXT: ld.w $t8, $sp, 0 |
| ; CHECK-NEXT: # %bb.2: # %iffalse |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $zero |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $ra |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $tp |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $a0 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $a1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $a2 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $a3 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $a4 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $a5 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $a6 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $a7 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $t0 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $t1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $t2 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $t3 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $t4 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $t5 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $t6 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $t7 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $t8 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $fp |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $s0 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $s1 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $s2 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $s3 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $s4 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $s5 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $s6 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $s7 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: #APP |
| ; CHECK-NEXT: # reg use $s8 |
| ; CHECK-NEXT: #NO_APP |
| ; CHECK-NEXT: .LBB0_3: # %iftrue |
| ; CHECK-NEXT: ld.w $s8, $sp, 4 # 4-byte Folded Reload |
| ; CHECK-NEXT: ld.w $s7, $sp, 8 # 4-byte Folded Reload |
| ; CHECK-NEXT: ld.w $s6, $sp, 12 # 4-byte Folded Reload |
| ; CHECK-NEXT: ld.w $s5, $sp, 16 # 4-byte Folded Reload |
| ; CHECK-NEXT: ld.w $s4, $sp, 20 # 4-byte Folded Reload |
| ; CHECK-NEXT: ld.w $s3, $sp, 24 # 4-byte Folded Reload |
| ; CHECK-NEXT: ld.w $s2, $sp, 28 # 4-byte Folded Reload |
| ; CHECK-NEXT: ld.w $s1, $sp, 32 # 4-byte Folded Reload |
| ; CHECK-NEXT: ld.w $s0, $sp, 36 # 4-byte Folded Reload |
| ; CHECK-NEXT: ld.w $fp, $sp, 40 # 4-byte Folded Reload |
| ; CHECK-NEXT: ld.w $ra, $sp, 44 # 4-byte Folded Reload |
| ; CHECK-NEXT: addi.w $sp, $sp, 48 |
| ; CHECK-NEXT: ret |
| %zero = call i32 asm sideeffect "addi.w $$zero, $$zero, 1", "={r0}"() |
| %ra = call i32 asm sideeffect "addi.w $$ra, $$zero, 1", "={r1}"() |
| %tp = call i32 asm sideeffect "addi.w $$tp, $$zero, 1", "={r2}"() |
| %a0 = call i32 asm sideeffect "addi.w $$a0, $$zero, 1", "={r4}"() |
| %a1 = call i32 asm sideeffect "addi.w $$a1, $$zero, 1", "={r5}"() |
| %a2 = call i32 asm sideeffect "addi.w $$a2, $$zero, 1", "={r6}"() |
| %a3 = call i32 asm sideeffect "addi.w $$a3, $$zero, 1", "={r7}"() |
| %a4 = call i32 asm sideeffect "addi.w $$a4, $$zero, 1", "={r8}"() |
| %a5 = call i32 asm sideeffect "addi.w $$a5, $$zero, 1", "={r9}"() |
| %a6 = call i32 asm sideeffect "addi.w $$a6, $$zero, 1", "={r10}"() |
| %a7 = call i32 asm sideeffect "addi.w $$a7, $$zero, 1", "={r11}"() |
| %t0 = call i32 asm sideeffect "addi.w $$t0, $$zero, 1", "={r12}"() |
| %t1 = call i32 asm sideeffect "addi.w $$t1, $$zero, 1", "={r13}"() |
| %t2 = call i32 asm sideeffect "addi.w $$t2, $$zero, 1", "={r14}"() |
| %t3 = call i32 asm sideeffect "addi.w $$t3, $$zero, 1", "={r15}"() |
| %t4 = call i32 asm sideeffect "addi.w $$t4, $$zero, 1", "={r16}"() |
| %t5 = call i32 asm sideeffect "addi.w $$t5, $$zero, 1", "={r17}"() |
| %t6 = call i32 asm sideeffect "addi.w $$t6, $$zero, 1", "={r18}"() |
| %t7 = call i32 asm sideeffect "addi.w $$t7, $$zero, 1", "={r19}"() |
| %t8 = call i32 asm sideeffect "addi.w $$t8, $$zero, 1", "={r20}"() |
| ;; r21 Reserved (Non-allocatable) |
| %s9 = call i32 asm sideeffect "addi.w $$s9, $$zero, 1", "={r22}"() |
| %s0 = call i32 asm sideeffect "addi.w $$s0, $$zero, 1", "={r23}"() |
| %s1 = call i32 asm sideeffect "addi.w $$s1, $$zero, 1", "={r24}"() |
| %s2 = call i32 asm sideeffect "addi.w $$s2, $$zero, 1", "={r25}"() |
| %s3 = call i32 asm sideeffect "addi.w $$s3, $$zero, 1", "={r26}"() |
| %s4 = call i32 asm sideeffect "addi.w $$s4, $$zero, 1", "={r27}"() |
| %s5 = call i32 asm sideeffect "addi.w $$s5, $$zero, 1", "={r28}"() |
| %s6 = call i32 asm sideeffect "addi.w $$s6, $$zero, 1", "={r29}"() |
| %s7 = call i32 asm sideeffect "addi.w $$s7, $$zero, 1", "={r30}"() |
| %s8 = call i32 asm sideeffect "addi.w $$s8, $$zero, 1", "={r31}"() |
| |
| %cmp = icmp eq i32 %s7, %s8 |
| br i1 %cmp, label %iftrue, label %iffalse |
| |
| iftrue: |
| call void asm sideeffect ".space 536870912", ""() |
| ret void |
| |
| iffalse: |
| call void asm sideeffect "# reg use $0", "{r0}"(i32 %zero) |
| call void asm sideeffect "# reg use $0", "{r1}"(i32 %ra) |
| call void asm sideeffect "# reg use $0", "{r2}"(i32 %tp) |
| call void asm sideeffect "# reg use $0", "{r4}"(i32 %a0) |
| call void asm sideeffect "# reg use $0", "{r5}"(i32 %a1) |
| call void asm sideeffect "# reg use $0", "{r6}"(i32 %a2) |
| call void asm sideeffect "# reg use $0", "{r7}"(i32 %a3) |
| call void asm sideeffect "# reg use $0", "{r8}"(i32 %a4) |
| call void asm sideeffect "# reg use $0", "{r9}"(i32 %a5) |
| call void asm sideeffect "# reg use $0", "{r10}"(i32 %a6) |
| call void asm sideeffect "# reg use $0", "{r11}"(i32 %a7) |
| call void asm sideeffect "# reg use $0", "{r12}"(i32 %t0) |
| call void asm sideeffect "# reg use $0", "{r13}"(i32 %t1) |
| call void asm sideeffect "# reg use $0", "{r14}"(i32 %t2) |
| call void asm sideeffect "# reg use $0", "{r15}"(i32 %t3) |
| call void asm sideeffect "# reg use $0", "{r16}"(i32 %t4) |
| call void asm sideeffect "# reg use $0", "{r17}"(i32 %t5) |
| call void asm sideeffect "# reg use $0", "{r18}"(i32 %t6) |
| call void asm sideeffect "# reg use $0", "{r19}"(i32 %t7) |
| call void asm sideeffect "# reg use $0", "{r20}"(i32 %t8) |
| ;; r21 Reserved (Non-allocatable) |
| call void asm sideeffect "# reg use $0", "{r22}"(i32 %s9) |
| call void asm sideeffect "# reg use $0", "{r23}"(i32 %s0) |
| call void asm sideeffect "# reg use $0", "{r24}"(i32 %s1) |
| call void asm sideeffect "# reg use $0", "{r25}"(i32 %s2) |
| call void asm sideeffect "# reg use $0", "{r26}"(i32 %s3) |
| call void asm sideeffect "# reg use $0", "{r27}"(i32 %s4) |
| call void asm sideeffect "# reg use $0", "{r28}"(i32 %s5) |
| call void asm sideeffect "# reg use $0", "{r29}"(i32 %s6) |
| call void asm sideeffect "# reg use $0", "{r30}"(i32 %s7) |
| call void asm sideeffect "# reg use $0", "{r31}"(i32 %s8) |
| ret void |
| } |