| # RUN: llvm-mc -triple=aarch64 -mattr=+mte -disassemble < %s | FileCheck %s |
| # RUN: not llvm-mc -triple=aarch64 -mattr=+v8.5a -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOMTE |
| # RUN: not llvm-mc -triple=aarch64 -mattr=-mte -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOMTE |
| |
| [0x20,0x10,0xdf,0x9a] |
| [0x3f,0x10,0xdf,0x9a] |
| [0xe0,0x13,0xdf,0x9a] |
| [0x20,0x10,0xc2,0x9a] |
| [0x3f,0x10,0xc2,0x9a] |
| |
| # CHECK: irg x0, x1 |
| # CHECK: irg sp, x1 |
| # CHECK: irg x0, sp |
| # CHECK: irg x0, x1, x2 |
| # CHECK: irg sp, x1, x2 |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x10,0xdf,0x9a] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x3f,0x10,0xdf,0x9a] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe0,0x13,0xdf,0x9a] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x10,0xc2,0x9a] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x3f,0x10,0xc2,0x9a] |
| |
| [0x20,0x04,0x80,0x91] |
| [0x5f,0x0c,0x82,0x91] |
| [0xe0,0x17,0x84,0x91] |
| [0x83,0x18,0xbf,0x91] |
| [0xc5,0x3c,0x87,0x91] |
| |
| [0x20,0x04,0x80,0xd1] |
| [0x5f,0x0c,0x82,0xd1] |
| [0xe0,0x17,0x84,0xd1] |
| [0x83,0x18,0xbf,0xd1] |
| [0xc5,0x3c,0x87,0xd1] |
| |
| # CHECK: addg x0, x1, #0, #1 |
| # CHECK: addg sp, x2, #32, #3 |
| # CHECK: addg x0, sp, #64, #5 |
| # CHECK: addg x3, x4, #1008, #6 |
| # CHECK: addg x5, x6, #112, #15 |
| |
| # CHECK: subg x0, x1, #0, #1 |
| # CHECK: subg sp, x2, #32, #3 |
| # CHECK: subg x0, sp, #64, #5 |
| # CHECK: subg x3, x4, #1008, #6 |
| # CHECK: subg x5, x6, #112, #15 |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x04,0x80,0x91] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x5f,0x0c,0x82,0x91] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe0,0x17,0x84,0x91] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x83,0x18,0xbf,0x91] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xc5,0x3c,0x87,0x91] |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x04,0x80,0xd1] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x5f,0x0c,0x82,0xd1] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe0,0x17,0x84,0xd1] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x83,0x18,0xbf,0xd1] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xc5,0x3c,0x87,0xd1] |
| |
| [0x20,0x14,0xc2,0x9a] |
| [0xe3,0x17,0xc4,0x9a] |
| [0x1f,0x14,0xde,0x9a] |
| [0x1e,0x14,0xdf,0x9a] |
| |
| # CHECK: gmi x0, x1, x2 |
| # CHECK: gmi x3, sp, x4 |
| # CHECK: gmi xzr, x0, x30 |
| # CHECK: gmi x30, x0, xzr |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x14,0xc2,0x9a] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe3,0x17,0xc4,0x9a] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x1f,0x14,0xde,0x9a] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x1e,0x14,0xdf,0x9a] |
| |
| [0x20,0x00,0xc2,0x9a] |
| [0x20,0x00,0xc2,0xba] |
| [0xe0,0x03,0xdf,0x9a] |
| [0xe0,0x03,0xdf,0xba] |
| [0x1f,0x00,0xc1,0xba] |
| [0xff,0x03,0xdf,0xba] |
| |
| # CHECK: subp x0, x1, x2 |
| # CHECK: subps x0, x1, x2 |
| # CHECK: subp x0, sp, sp |
| # CHECK: subps x0, sp, sp |
| # CHECK: subps xzr, x0, x1 |
| # CHECK: subps xzr, sp, sp |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x00,0xc2,0x9a] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x00,0xc2,0xba] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe0,0x03,0xdf,0x9a] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe0,0x03,0xdf,0xba] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x1f,0x00,0xc1,0xba] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xff,0x03,0xdf,0xba] |
| |
| [0x20,0x08,0x30,0xd9] |
| [0x41,0xf8,0x2f,0xd9] |
| [0xe2,0x1b,0x20,0xd9] |
| [0x23,0x08,0x20,0xd9] |
| [0x3f,0x08,0x20,0xd9] |
| |
| # CHECK: stg x0, [x1, #-4096] |
| # CHECK: stg x1, [x2, #4080] |
| # CHECK: stg x2, [sp, #16] |
| # CHECK: stg x3, [x1] |
| # CHECK: stg sp, [x1] |
| |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x08,0x30,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x41,0xf8,0x2f,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe2,0x1b,0x20,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x23,0x08,0x20,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x3f,0x08,0x20,0xd9] |
| |
| [0x20,0x08,0x70,0xd9] |
| [0x41,0xf8,0x6f,0xd9] |
| [0xe2,0x1b,0x60,0xd9] |
| [0x23,0x08,0x60,0xd9] |
| [0x3f,0x08,0x60,0xd9] |
| |
| # CHECK: stzg x0, [x1, #-4096] |
| # CHECK: stzg x1, [x2, #4080] |
| # CHECK: stzg x2, [sp, #16] |
| # CHECK: stzg x3, [x1] |
| # CHECK: stzg sp, [x1] |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x08,0x70,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x41,0xf8,0x6f,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe2,0x1b,0x60,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x23,0x08,0x60,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x3f,0x08,0x60,0xd9] |
| |
| [0x20,0x0c,0x30,0xd9] |
| [0x41,0xfc,0x2f,0xd9] |
| [0xe2,0x1f,0x20,0xd9] |
| [0xff,0x1f,0x20,0xd9] |
| |
| # CHECK: stg x0, [x1, #-4096]! |
| # CHECK: stg x1, [x2, #4080]! |
| # CHECK: stg x2, [sp, #16]! |
| # CHECK: stg sp, [sp, #16]! |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x0c,0x30,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x41,0xfc,0x2f,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe2,0x1f,0x20,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xff,0x1f,0x20,0xd9] |
| |
| [0x20,0x0c,0x70,0xd9] |
| [0x41,0xfc,0x6f,0xd9] |
| [0xe2,0x1f,0x60,0xd9] |
| [0xff,0x1f,0x60,0xd9] |
| |
| # CHECK: stzg x0, [x1, #-4096]! |
| # CHECK: stzg x1, [x2, #4080]! |
| # CHECK: stzg x2, [sp, #16]! |
| # CHECK: stzg sp, [sp, #16]! |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x0c,0x70,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x41,0xfc,0x6f,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe2,0x1f,0x60,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xff,0x1f,0x60,0xd9] |
| |
| [0x20,0x04,0x30,0xd9] |
| [0x41,0xf4,0x2f,0xd9] |
| [0xe2,0x17,0x20,0xd9] |
| [0xff,0x17,0x20,0xd9] |
| |
| # CHECK: stg x0, [x1], #-4096 |
| # CHECK: stg x1, [x2], #4080 |
| # CHECK: stg x2, [sp], #16 |
| # CHECK: stg sp, [sp], #16 |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x04,0x30,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x41,0xf4,0x2f,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe2,0x17,0x20,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xff,0x17,0x20,0xd9] |
| |
| [0x20,0x04,0x70,0xd9] |
| [0x41,0xf4,0x6f,0xd9] |
| [0xe2,0x17,0x60,0xd9] |
| [0xff,0x17,0x60,0xd9] |
| |
| # CHECK: stzg x0, [x1], #-4096 |
| # CHECK: stzg x1, [x2], #4080 |
| # CHECK: stzg x2, [sp], #16 |
| # CHECK: stzg sp, [sp], #16 |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x04,0x70,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x41,0xf4,0x6f,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe2,0x17,0x60,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xff,0x17,0x60,0xd9] |
| |
| [0x20,0x08,0xb0,0xd9] |
| [0x41,0xf8,0xaf,0xd9] |
| [0xe2,0x1b,0xa0,0xd9] |
| [0x23,0x08,0xa0,0xd9] |
| [0x3f,0x08,0xa0,0xd9] |
| |
| # CHECK: st2g x0, [x1, #-4096] |
| # CHECK: st2g x1, [x2, #4080] |
| # CHECK: st2g x2, [sp, #16] |
| # CHECK: st2g x3, [x1] |
| # CHECK: st2g sp, [x1] |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x08,0xb0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x41,0xf8,0xaf,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe2,0x1b,0xa0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x23,0x08,0xa0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x3f,0x08,0xa0,0xd9] |
| |
| [0x20,0x08,0xf0,0xd9] |
| [0x41,0xf8,0xef,0xd9] |
| [0xe2,0x1b,0xe0,0xd9] |
| [0x23,0x08,0xe0,0xd9] |
| [0x3f,0x08,0xe0,0xd9] |
| |
| # CHECK: stz2g x0, [x1, #-4096] |
| # CHECK: stz2g x1, [x2, #4080] |
| # CHECK: stz2g x2, [sp, #16] |
| # CHECK: stz2g x3, [x1] |
| # CHECK: stz2g sp, [x1] |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x08,0xf0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x41,0xf8,0xef,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe2,0x1b,0xe0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x23,0x08,0xe0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x3f,0x08,0xe0,0xd9] |
| |
| [0x20,0x0c,0xb0,0xd9] |
| [0x41,0xfc,0xaf,0xd9] |
| [0xe2,0x1f,0xa0,0xd9] |
| [0xff,0x1f,0xa0,0xd9] |
| |
| # CHECK: st2g x0, [x1, #-4096]! |
| # CHECK: st2g x1, [x2, #4080]! |
| # CHECK: st2g x2, [sp, #16]! |
| # CHECK: st2g sp, [sp, #16]! |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x0c,0xb0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x41,0xfc,0xaf,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe2,0x1f,0xa0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xff,0x1f,0xa0,0xd9] |
| |
| [0x20,0x0c,0xf0,0xd9] |
| [0x41,0xfc,0xef,0xd9] |
| [0xe2,0x1f,0xe0,0xd9] |
| [0xff,0x1f,0xe0,0xd9] |
| |
| # CHECK: stz2g x0, [x1, #-4096]! |
| # CHECK: stz2g x1, [x2, #4080]! |
| # CHECK: stz2g x2, [sp, #16]! |
| # CHECK: stz2g sp, [sp, #16]! |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x0c,0xf0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x41,0xfc,0xef,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe2,0x1f,0xe0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xff,0x1f,0xe0,0xd9] |
| |
| [0x20,0x04,0xb0,0xd9] |
| [0x41,0xf4,0xaf,0xd9] |
| [0xe2,0x17,0xa0,0xd9] |
| [0xff,0x17,0xa0,0xd9] |
| |
| # CHECK: st2g x0, [x1], #-4096 |
| # CHECK: st2g x1, [x2], #4080 |
| # CHECK: st2g x2, [sp], #16 |
| # CHECK: st2g sp, [sp], #16 |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x04,0xb0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x41,0xf4,0xaf,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe2,0x17,0xa0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xff,0x17,0xa0,0xd9] |
| |
| [0x20,0x04,0xf0,0xd9] |
| [0x41,0xf4,0xef,0xd9] |
| [0xe2,0x17,0xe0,0xd9] |
| [0xff,0x17,0xe0,0xd9] |
| |
| # CHECK: stz2g x0, [x1], #-4096 |
| # CHECK: stz2g x1, [x2], #4080 |
| # CHECK: stz2g x2, [sp], #16 |
| # CHECK: stz2g sp, [sp], #16 |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x04,0xf0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x41,0xf4,0xef,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe2,0x17,0xe0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xff,0x17,0xe0,0xd9] |
| |
| [0x40,0x04,0x20,0x69] |
| [0x40,0x84,0x1f,0x69] |
| [0xe0,0x87,0x00,0x69] |
| [0x5f,0x84,0x00,0x69] |
| [0x40,0xfc,0x00,0x69] |
| [0x40,0x7c,0x00,0x69] |
| |
| # CHECK: stgp x0, x1, [x2, #-1024] |
| # CHECK: stgp x0, x1, [x2, #1008] |
| # CHECK: stgp x0, x1, [sp, #16] |
| # CHECK: stgp xzr, x1, [x2, #16] |
| # CHECK: stgp x0, xzr, [x2, #16] |
| # CHECK: stgp x0, xzr, [x2] |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x40,0x04,0x20,0x69] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x40,0x84,0x1f,0x69] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe0,0x87,0x00,0x69] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x5f,0x84,0x00,0x69] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x40,0xfc,0x00,0x69] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x40,0x7c,0x00,0x69] |
| |
| [0x40,0x04,0xa0,0x69] |
| [0x40,0x84,0x9f,0x69] |
| [0xe0,0x87,0x80,0x69] |
| [0x5f,0x84,0x80,0x69] |
| [0x40,0xfc,0x80,0x69] |
| |
| # CHECK: stgp x0, x1, [x2, #-1024]! |
| # CHECK: stgp x0, x1, [x2, #1008]! |
| # CHECK: stgp x0, x1, [sp, #16]! |
| # CHECK: stgp xzr, x1, [x2, #16]! |
| # CHECK: stgp x0, xzr, [x2, #16]! |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x40,0x04,0xa0,0x69] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x40,0x84,0x9f,0x69] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe0,0x87,0x80,0x69] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x5f,0x84,0x80,0x69] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x40,0xfc,0x80,0x69] |
| |
| [0x40,0x04,0xa0,0x68] |
| [0x40,0x84,0x9f,0x68] |
| [0xe0,0x87,0x80,0x68] |
| [0x5f,0x84,0x80,0x68] |
| [0x40,0xfc,0x80,0x68] |
| |
| # CHECK: stgp x0, x1, [x2], #-1024 |
| # CHECK: stgp x0, x1, [x2], #1008 |
| # CHECK: stgp x0, x1, [sp], #16 |
| # CHECK: stgp xzr, x1, [x2], #16 |
| # CHECK: stgp x0, xzr, [x2], #16 |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x40,0x04,0xa0,0x68] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x40,0x84,0x9f,0x68] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe0,0x87,0x80,0x68] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x5f,0x84,0x80,0x68] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x40,0xfc,0x80,0x68] |
| |
| [0x20,0x00,0x60,0xd9] |
| [0xe2,0x03,0x70,0xd9] |
| [0x83,0xf0,0x6f,0xd9] |
| |
| # CHECK: ldg x0, [x1] |
| # CHECK: ldg x2, [sp, #-4096] |
| # CHECK: ldg x3, [x4, #4080] |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x00,0x60,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe2,0x03,0x70,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x83,0xf0,0x6f,0xd9] |
| |
| [0x20,0x00,0xe0,0xd9] |
| [0xe1,0x03,0xe0,0xd9] |
| [0x5f,0x00,0xe0,0xd9] |
| [0x20,0x00,0xa0,0xd9] |
| [0xe1,0x03,0xa0,0xd9] |
| [0x5f,0x00,0xa0,0xd9] |
| [0x20,0x00,0x20,0xd9] |
| [0xe1,0x03,0x20,0xd9] |
| [0x5f,0x00,0x20,0xd9] |
| |
| # CHECK: ldgm x0, [x1] |
| # CHECK: ldgm x1, [sp] |
| # CHECK: ldgm xzr, [x2] |
| # CHECK: stgm x0, [x1] |
| # CHECK: stgm x1, [sp] |
| # CHECK: stgm xzr, [x2] |
| # CHECK: stzgm x0, [x1] |
| # CHECK: stzgm x1, [sp] |
| # CHECK: stzgm xzr, [x2] |
| |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x00,0xe0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe1,0x03,0xe0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x5f,0x00,0xe0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x00,0xa0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe1,0x03,0xa0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x5f,0x00,0xa0,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x20,0x00,0x20,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0xe1,0x03,0x20,0xd9] |
| # NOMTE: warning: invalid instruction encoding |
| # NOMTE-NEXT: [0x5f,0x00,0x20,0xd9] |
| |
| [0x60,0x76,0x08,0xd5] |
| [0x81,0x76,0x08,0xd5] |
| [0x82,0x7a,0x08,0xd5] |
| [0x83,0x7e,0x08,0xd5] |
| [0x64,0x7a,0x0b,0xd5] |
| [0x65,0x7c,0x0b,0xd5] |
| [0x66,0x7d,0x0b,0xd5] |
| [0x67,0x7e,0x0b,0xd5] |
| [0x68,0x74,0x0b,0xd5] |
| [0xa9,0x76,0x08,0xd5] |
| [0xca,0x76,0x08,0xd5] |
| [0xcb,0x7a,0x08,0xd5] |
| [0xcc,0x7e,0x08,0xd5] |
| [0xad,0x7a,0x0b,0xd5] |
| [0xae,0x7c,0x0b,0xd5] |
| [0xaf,0x7d,0x0b,0xd5] |
| [0xb0,0x7e,0x0b,0xd5] |
| [0x91,0x74,0x0b,0xd5] |
| |
| # CHECK: dc igvac, x0 |
| # CHECK: dc igsw, x1 |
| # CHECK: dc cgsw, x2 |
| # CHECK: dc cigsw, x3 |
| # CHECK: dc cgvac, x4 |
| # CHECK: dc cgvap, x5 |
| # CHECK: dc cgvadp, x6 |
| # CHECK: dc cigvac, x7 |
| # CHECK: dc gva, x8 |
| # CHECK: dc igdvac, x9 |
| # CHECK: dc igdsw, x10 |
| # CHECK: dc cgdsw, x11 |
| # CHECK: dc cigdsw, x12 |
| # CHECK: dc cgdvac, x13 |
| # CHECK: dc cgdvap, x14 |
| # CHECK: dc cgdvadp, x15 |
| # CHECK: dc cigdvac, x16 |
| # CHECK: dc gzva, x17 |
| |
| # NOMTE: sys #0, c7, c6, #3, x0 |
| # NOMTE: sys #0, c7, c6, #4, x1 |
| # NOMTE: sys #0, c7, c10, #4, x2 |
| # NOMTE: sys #0, c7, c14, #4, x3 |
| # NOMTE: sys #3, c7, c10, #3, x4 |
| # NOMTE: sys #3, c7, c12, #3, x5 |
| # NOMTE: sys #3, c7, c13, #3, x6 |
| # NOMTE: sys #3, c7, c14, #3, x7 |
| # NOMTE: sys #3, c7, c4, #3, x8 |
| # NOMTE: sys #0, c7, c6, #5, x9 |
| # NOMTE: sys #0, c7, c6, #6, x10 |
| # NOMTE: sys #0, c7, c10, #6, x11 |
| # NOMTE: sys #0, c7, c14, #6, x12 |
| # NOMTE: sys #3, c7, c10, #5, x13 |
| # NOMTE: sys #3, c7, c12, #5, x14 |
| # NOMTE: sys #3, c7, c13, #5, x15 |
| # NOMTE: sys #3, c7, c14, #5, x16 |
| # NOMTE: sys #3, c7, c4, #4, x17 |
| |
| [0xe0,0x42,0x3b,0xd5] |
| [0xc1,0x10,0x38,0xd5] |
| [0xa2,0x10,0x38,0xd5] |
| [0x03,0x56,0x38,0xd5] |
| [0x04,0x56,0x3c,0xd5] |
| [0x05,0x56,0x3e,0xd5] |
| [0x06,0x56,0x3d,0xd5] |
| [0x27,0x56,0x38,0xd5] |
| [0x88,0x00,0x39,0xd5] |
| |
| # CHECK: mrs x0, TCO |
| # CHECK: mrs x1, GCR_EL1 |
| # CHECK: mrs x2, RGSR_EL1 |
| # CHECK: mrs x3, TFSR_EL1 |
| # CHECK: mrs x4, TFSR_EL2 |
| # CHECK: mrs x5, TFSR_EL3 |
| # CHECK: mrs x6, TFSR_EL12 |
| # CHECK: mrs x7, TFSRE0_EL1 |
| # CHECK: mrs x8, GMID_EL1 |
| |
| # NOMTE: mrs x0, S3_3_C4_C2_7 |
| # NOMTE: mrs x1, S3_0_C1_C0_6 |
| # NOMTE: mrs x2, S3_0_C1_C0_5 |
| # NOMTE: mrs x3, S3_0_C5_C6_0 |
| # NOMTE: mrs x4, S3_4_C5_C6_0 |
| # NOMTE: mrs x5, S3_6_C5_C6_0 |
| # NOMTE: mrs x6, S3_5_C5_C6_0 |
| # NOMTE: mrs x7, S3_0_C5_C6_1 |
| # NOMTE: mrs x8, S3_1_C0_C0_4 |
| |
| [0x9f,0x40,0x03,0xd5] |
| |
| # CHECK: msr TCO, #0 |
| # NOMTE: msr S0_3_C4_C0_4, xzr |
| |
| [0xe0,0x42,0x1b,0xd5] |
| [0xc1,0x10,0x18,0xd5] |
| [0xa2,0x10,0x18,0xd5] |
| [0x03,0x56,0x18,0xd5] |
| [0x04,0x56,0x1c,0xd5] |
| [0x05,0x56,0x1e,0xd5] |
| [0x06,0x56,0x1d,0xd5] |
| [0x27,0x56,0x18,0xd5] |
| [0x88,0x00,0x19,0xd5] |
| |
| # CHECK: msr TCO, x0 |
| # CHECK: msr GCR_EL1, x1 |
| # CHECK: msr RGSR_EL1, x2 |
| # CHECK: msr TFSR_EL1, x3 |
| # CHECK: msr TFSR_EL2, x4 |
| # CHECK: msr TFSR_EL3, x5 |
| # CHECK: msr TFSR_EL12, x6 |
| # CHECK: msr TFSRE0_EL1, x7 |
| # GMID_EL1 is read only |
| # CHECK: msr S3_1_C0_C0_4, x8 |
| |
| # NOMTE: msr S3_3_C4_C2_7, x0 |
| # NOMTE: msr S3_0_C1_C0_6, x1 |
| # NOMTE: msr S3_0_C1_C0_5, x2 |
| # NOMTE: msr S3_0_C5_C6_0, x3 |
| # NOMTE: msr S3_4_C5_C6_0, x4 |
| # NOMTE: msr S3_6_C5_C6_0, x5 |
| # NOMTE: msr S3_5_C5_C6_0, x6 |
| # NOMTE: msr S3_0_C5_C6_1, x7 |
| # NOMTE: msr S3_1_C0_C0_4, x8 |
