test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=MOVREL %s
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=MOVREL %s
# RUN: llc -march=amdgcn -mcpu=fiji -amdgpu-vgpr-index-mode  -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GPRIDX %s
# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GPRIDX %s
# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=MOVREL %s

---
name: extract_vector_elt_s_s32_v2s32
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1, $sgpr2

    ; MOVREL-LABEL: name: extract_vector_elt_s_s32_v2s32
    ; MOVREL: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s32_v2s32
    ; GPRIDX: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
    ; GPRIDX: $m0 = COPY [[COPY1]]
    ; GPRIDX: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    %0:sgpr(<2 x s32>) = COPY $sgpr0_sgpr1
    %1:sgpr(s32) = COPY $sgpr2
    %2:sgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_s_s32_v3s32
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2, $sgpr3

    ; MOVREL-LABEL: name: extract_vector_elt_s_s32_v3s32
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_96 = COPY $sgpr0_sgpr1_sgpr2
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s32_v3s32
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_96 = COPY $sgpr0_sgpr1_sgpr2
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
    ; GPRIDX: $m0 = COPY [[COPY1]]
    ; GPRIDX: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    %0:sgpr(<3 x s32>) = COPY $sgpr0_sgpr1_sgpr2
    %1:sgpr(s32) = COPY $sgpr2
    %2:sgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_s_s32_v4s32
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4

    ; MOVREL-LABEL: name: extract_vector_elt_s_s32_v4s32
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr4
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s32_v4s32
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr4
    ; GPRIDX: $m0 = COPY [[COPY1]]
    ; GPRIDX: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    %0:sgpr(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    %1:sgpr(s32) = COPY $sgpr4
    %2:sgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_s_s32_v8s32
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8

    ; MOVREL-LABEL: name: extract_vector_elt_s_s32_v8s32
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s32_v8s32
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: $m0 = COPY [[COPY1]]
    ; GPRIDX: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    %0:sgpr(<8 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    %1:sgpr(s32) = COPY $sgpr8
    %2:sgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_s_s32_v16s32
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15

    ; MOVREL-LABEL: name: extract_vector_elt_s_s32_v16s32
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_512 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s32_v16s32
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_512 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: $m0 = COPY [[COPY1]]
    ; GPRIDX: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    %0:sgpr(<16 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
    %1:sgpr(s32) = COPY $sgpr8
    %2:sgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_s_s32_v32s32
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31, $sgpr40

    ; MOVREL-LABEL: name: extract_vector_elt_s_s32_v32s32
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_1024 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr40
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s32_v32s32
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_1024 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr40
    ; GPRIDX: $m0 = COPY [[COPY1]]
    ; GPRIDX: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    %0:sgpr(<32 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31
    %1:sgpr(s32) = COPY $sgpr40
    %2:sgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_s_s64_v2s64
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4

    ; MOVREL-LABEL: name: extract_vector_elt_s_s64_v2s64
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr4
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[S_MOVRELS_B64_:%[0-9]+]]:sreg_64 = S_MOVRELS_B64 [[COPY]].sub0_sub1, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B64_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s64_v2s64
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr4
    ; GPRIDX: $m0 = COPY [[COPY1]]
    ; GPRIDX: [[S_MOVRELS_B64_:%[0-9]+]]:sreg_64 = S_MOVRELS_B64 [[COPY]].sub0_sub1, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B64_]]
    %0:sgpr(<2 x s64>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    %1:sgpr(s32) = COPY $sgpr4
    %2:sgpr(s64) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_s_s64_v4s64
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8

    ; MOVREL-LABEL: name: extract_vector_elt_s_s64_v4s64
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[S_MOVRELS_B64_:%[0-9]+]]:sreg_64 = S_MOVRELS_B64 [[COPY]].sub0_sub1, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B64_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s64_v4s64
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: $m0 = COPY [[COPY1]]
    ; GPRIDX: [[S_MOVRELS_B64_:%[0-9]+]]:sreg_64 = S_MOVRELS_B64 [[COPY]].sub0_sub1, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B64_]]
    %0:sgpr(<4 x s64>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    %1:sgpr(s32) = COPY $sgpr8
    %2:sgpr(s64) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_s_s64_v8s64
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15

    ; MOVREL-LABEL: name: extract_vector_elt_s_s64_v8s64
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_512 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[S_MOVRELS_B64_:%[0-9]+]]:sreg_64 = S_MOVRELS_B64 [[COPY]].sub0_sub1, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B64_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s64_v8s64
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_512 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: $m0 = COPY [[COPY1]]
    ; GPRIDX: [[S_MOVRELS_B64_:%[0-9]+]]:sreg_64 = S_MOVRELS_B64 [[COPY]].sub0_sub1, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B64_]]
    %0:sgpr(<8 x s64>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
    %1:sgpr(s32) = COPY $sgpr8
    %2:sgpr(s64) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_s_s64_v16s64
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31, $sgpr40

    ; MOVREL-LABEL: name: extract_vector_elt_s_s64_v16s64
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_1024 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr40
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[S_MOVRELS_B64_:%[0-9]+]]:sreg_64 = S_MOVRELS_B64 [[COPY]].sub0_sub1, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B64_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s64_v16s64
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_1024 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr40
    ; GPRIDX: $m0 = COPY [[COPY1]]
    ; GPRIDX: [[S_MOVRELS_B64_:%[0-9]+]]:sreg_64 = S_MOVRELS_B64 [[COPY]].sub0_sub1, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B64_]]
    %0:sgpr(<16 x s64>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31
    %1:sgpr(s32) = COPY $sgpr40
    %2:sgpr(s64) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_s_s32_v8s32_idx_offset_1
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8

    ; MOVREL-LABEL: name: extract_vector_elt_s_s32_v8s32_idx_offset_1
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub1, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s32_v8s32_idx_offset_1
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: $m0 = COPY [[COPY1]]
    ; GPRIDX: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub1, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    %0:sgpr(<8 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    %1:sgpr(s32) = COPY $sgpr8
    %2:sgpr(s32) = G_CONSTANT i32 1
    %3:sgpr(s32) = G_ADD %1, %2
    %4:sgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %3
    S_ENDPGM 0, implicit %4
...

---
name: extract_vector_elt_s_s32_v8s32_idx_offset_m1
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8

    ; MOVREL-LABEL: name: extract_vector_elt_s_s32_v8s32_idx_offset_m1
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
    ; MOVREL: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], [[S_MOV_B32_]], implicit-def $scc
    ; MOVREL: $m0 = COPY [[S_ADD_I32_]]
    ; MOVREL: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s32_v8s32_idx_offset_m1
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
    ; GPRIDX: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], [[S_MOV_B32_]], implicit-def $scc
    ; GPRIDX: $m0 = COPY [[S_ADD_I32_]]
    ; GPRIDX: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    %0:sgpr(<8 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    %1:sgpr(s32) = COPY $sgpr8
    %2:sgpr(s32) = G_CONSTANT i32 -1
    %3:sgpr(s32) = G_ADD %1, %2
    %4:sgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %3
    S_ENDPGM 0, implicit %4
...

---
name: extract_vector_elt_s_s32_v8s32_idx_offset_7
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8

    ; MOVREL-LABEL: name: extract_vector_elt_s_s32_v8s32_idx_offset_7
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub7, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s32_v8s32_idx_offset_7
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: $m0 = COPY [[COPY1]]
    ; GPRIDX: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub7, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    %0:sgpr(<8 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    %1:sgpr(s32) = COPY $sgpr8
    %2:sgpr(s32) = G_CONSTANT i32 7
    %3:sgpr(s32) = G_ADD %1, %2
    %4:sgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %3
    S_ENDPGM 0, implicit %4
...

---
name: extract_vector_elt_s_s32_v8s32_idx_offset_8
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8

    ; MOVREL-LABEL: name: extract_vector_elt_s_s32_v8s32_idx_offset_8
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 8
    ; MOVREL: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], [[S_MOV_B32_]], implicit-def $scc
    ; MOVREL: $m0 = COPY [[S_ADD_I32_]]
    ; MOVREL: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s32_v8s32_idx_offset_8
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 8
    ; GPRIDX: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], [[S_MOV_B32_]], implicit-def $scc
    ; GPRIDX: $m0 = COPY [[S_ADD_I32_]]
    ; GPRIDX: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    %0:sgpr(<8 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
    %1:sgpr(s32) = COPY $sgpr8
    %2:sgpr(s32) = G_CONSTANT i32 8
    %3:sgpr(s32) = G_ADD %1, %2
    %4:sgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %3
    S_ENDPGM 0, implicit %4
...

---
name: extract_vector_elt_s_s64_v8s64_idx_offset_1
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15

    ; MOVREL-LABEL: name: extract_vector_elt_s_s64_v8s64_idx_offset_1
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_512 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[S_MOVRELS_B64_:%[0-9]+]]:sreg_64 = S_MOVRELS_B64 [[COPY]].sub2_sub3, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B64_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s64_v8s64_idx_offset_1
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_512 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: $m0 = COPY [[COPY1]]
    ; GPRIDX: [[S_MOVRELS_B64_:%[0-9]+]]:sreg_64 = S_MOVRELS_B64 [[COPY]].sub2_sub3, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B64_]]
    %0:sgpr(<8 x s64>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
    %1:sgpr(s32) = COPY $sgpr8
    %2:sgpr(s32) = G_CONSTANT i32 1
    %3:sgpr(s32) = G_ADD %1, %2
    %4:sgpr(s64) = G_EXTRACT_VECTOR_ELT %0, %3
    S_ENDPGM 0, implicit %4
...

---
name: extract_vector_elt_s_s64_v8s64_idx_offset_2
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15

    ; MOVREL-LABEL: name: extract_vector_elt_s_s64_v8s64_idx_offset_2
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_512 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[S_MOVRELS_B64_:%[0-9]+]]:sreg_64 = S_MOVRELS_B64 [[COPY]].sub4_sub5, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B64_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s64_v8s64_idx_offset_2
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_512 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: $m0 = COPY [[COPY1]]
    ; GPRIDX: [[S_MOVRELS_B64_:%[0-9]+]]:sreg_64 = S_MOVRELS_B64 [[COPY]].sub4_sub5, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B64_]]
    %0:sgpr(<8 x s64>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
    %1:sgpr(s32) = COPY $sgpr8
    %2:sgpr(s32) = G_CONSTANT i32 2
    %3:sgpr(s32) = G_ADD %1, %2
    %4:sgpr(s64) = G_EXTRACT_VECTOR_ELT %0, %3
    S_ENDPGM 0, implicit %4
...

---
name: extract_vector_elt_s_s64_v8s64_idx_offset_m1
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15

    ; MOVREL-LABEL: name: extract_vector_elt_s_s64_v8s64_idx_offset_m1
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_512 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
    ; MOVREL: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], [[S_MOV_B32_]], implicit-def $scc
    ; MOVREL: $m0 = COPY [[S_ADD_I32_]]
    ; MOVREL: [[S_MOVRELS_B64_:%[0-9]+]]:sreg_64 = S_MOVRELS_B64 [[COPY]].sub0_sub1, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B64_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s64_v8s64_idx_offset_m1
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_512 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
    ; GPRIDX: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], [[S_MOV_B32_]], implicit-def $scc
    ; GPRIDX: $m0 = COPY [[S_ADD_I32_]]
    ; GPRIDX: [[S_MOVRELS_B64_:%[0-9]+]]:sreg_64 = S_MOVRELS_B64 [[COPY]].sub0_sub1, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B64_]]
    %0:sgpr(<8 x s64>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
    %1:sgpr(s32) = COPY $sgpr8
    %2:sgpr(s32) = G_CONSTANT i32 -1
    %3:sgpr(s32) = G_ADD %1, %2
    %4:sgpr(s64) = G_EXTRACT_VECTOR_ELT %0, %3
    S_ENDPGM 0, implicit %4
...

---
name: extract_vector_elt_v_s32_v2s32
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1, $sgpr2

    ; MOVREL-LABEL: name: extract_vector_elt_v_s32_v2s32
    ; MOVREL: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[V_MOVRELS_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOVRELS_B32_e32 [[COPY]].sub0, implicit $m0, implicit $exec, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[V_MOVRELS_B32_e32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_v_s32_v2s32
    ; GPRIDX: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
    ; GPRIDX: [[V_INDIRECT_REG_READ_GPR_IDX_B32_V2_:%[0-9]+]]:vgpr_32 = V_INDIRECT_REG_READ_GPR_IDX_B32_V2 [[COPY]], [[COPY1]], 3, implicit-def $m0, implicit $m0, implicit $exec
    ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_READ_GPR_IDX_B32_V2_]]
    %0:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1
    %1:sgpr(s32) = COPY $sgpr2
    %2:vgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_v_s32_v3s32
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2, $sgpr3

    ; MOVREL-LABEL: name: extract_vector_elt_v_s32_v3s32
    ; MOVREL: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[V_MOVRELS_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOVRELS_B32_e32 [[COPY]].sub0, implicit $m0, implicit $exec, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[V_MOVRELS_B32_e32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_v_s32_v3s32
    ; GPRIDX: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
    ; GPRIDX: [[V_INDIRECT_REG_READ_GPR_IDX_B32_V3_:%[0-9]+]]:vgpr_32 = V_INDIRECT_REG_READ_GPR_IDX_B32_V3 [[COPY]], [[COPY1]], 3, implicit-def $m0, implicit $m0, implicit $exec
    ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_READ_GPR_IDX_B32_V3_]]
    %0:vgpr(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
    %1:sgpr(s32) = COPY $sgpr2
    %2:vgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_v_s32_v4s32
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr4

    ; MOVREL-LABEL: name: extract_vector_elt_v_s32_v4s32
    ; MOVREL: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr4
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[V_MOVRELS_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOVRELS_B32_e32 [[COPY]].sub0, implicit $m0, implicit $exec, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[V_MOVRELS_B32_e32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_v_s32_v4s32
    ; GPRIDX: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr4
    ; GPRIDX: [[V_INDIRECT_REG_READ_GPR_IDX_B32_V4_:%[0-9]+]]:vgpr_32 = V_INDIRECT_REG_READ_GPR_IDX_B32_V4 [[COPY]], [[COPY1]], 3, implicit-def $m0, implicit $m0, implicit $exec
    ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_READ_GPR_IDX_B32_V4_]]
    %0:vgpr(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    %1:sgpr(s32) = COPY $sgpr4
    %2:vgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_v_s32_v8s32
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8

    ; MOVREL-LABEL: name: extract_vector_elt_v_s32_v8s32
    ; MOVREL: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[V_MOVRELS_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOVRELS_B32_e32 [[COPY]].sub0, implicit $m0, implicit $exec, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[V_MOVRELS_B32_e32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_v_s32_v8s32
    ; GPRIDX: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: [[V_INDIRECT_REG_READ_GPR_IDX_B32_V8_:%[0-9]+]]:vgpr_32 = V_INDIRECT_REG_READ_GPR_IDX_B32_V8 [[COPY]], [[COPY1]], 3, implicit-def $m0, implicit $m0, implicit $exec
    ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_READ_GPR_IDX_B32_V8_]]
    %0:vgpr(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
    %1:sgpr(s32) = COPY $sgpr8
    %2:vgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_v_s32_v16s32
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15

    ; MOVREL-LABEL: name: extract_vector_elt_v_s32_v16s32
    ; MOVREL: [[COPY:%[0-9]+]]:vreg_512 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[V_MOVRELS_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOVRELS_B32_e32 [[COPY]].sub0, implicit $m0, implicit $exec, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[V_MOVRELS_B32_e32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_v_s32_v16s32
    ; GPRIDX: [[COPY:%[0-9]+]]:vreg_512 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: [[V_INDIRECT_REG_READ_GPR_IDX_B32_V16_:%[0-9]+]]:vgpr_32 = V_INDIRECT_REG_READ_GPR_IDX_B32_V16 [[COPY]], [[COPY1]], 3, implicit-def $m0, implicit $m0, implicit $exec
    ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_READ_GPR_IDX_B32_V16_]]
    %0:vgpr(<16 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
    %1:sgpr(s32) = COPY $sgpr8
    %2:vgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_v_s32_v32s32
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $sgpr40

    ; MOVREL-LABEL: name: extract_vector_elt_v_s32_v32s32
    ; MOVREL: [[COPY:%[0-9]+]]:vreg_1024 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr40
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[V_MOVRELS_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOVRELS_B32_e32 [[COPY]].sub0, implicit $m0, implicit $exec, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[V_MOVRELS_B32_e32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_v_s32_v32s32
    ; GPRIDX: [[COPY:%[0-9]+]]:vreg_1024 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr40
    ; GPRIDX: [[V_INDIRECT_REG_READ_GPR_IDX_B32_V32_:%[0-9]+]]:vgpr_32 = V_INDIRECT_REG_READ_GPR_IDX_B32_V32 [[COPY]], [[COPY1]], 3, implicit-def $m0, implicit $m0, implicit $exec
    ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_READ_GPR_IDX_B32_V32_]]
    %0:vgpr(<32 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
    %1:sgpr(s32) = COPY $sgpr40
    %2:vgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_v_s32_v8s32_idx_offset_1
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $sgpr8

    ; MOVREL-LABEL: name: extract_vector_elt_v_s32_v8s32_idx_offset_1
    ; MOVREL: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[V_MOVRELS_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOVRELS_B32_e32 [[COPY]].sub1, implicit $m0, implicit $exec, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[V_MOVRELS_B32_e32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_v_s32_v8s32_idx_offset_1
    ; GPRIDX: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: [[V_INDIRECT_REG_READ_GPR_IDX_B32_V8_:%[0-9]+]]:vgpr_32 = V_INDIRECT_REG_READ_GPR_IDX_B32_V8 [[COPY]], [[COPY1]], 11, implicit-def $m0, implicit $m0, implicit $exec
    ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_READ_GPR_IDX_B32_V8_]]
    %0:vgpr(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
    %1:sgpr(s32) = COPY $sgpr8
    %2:sgpr(s32) = G_CONSTANT i32 1
    %3:sgpr(s32) = G_ADD %1, %2
    %4:vgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %3
    S_ENDPGM 0, implicit %4
...

---
name: extract_vector_elt_v_s32_v8s32_idx_offset_m1
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $sgpr8

    ; MOVREL-LABEL: name: extract_vector_elt_v_s32_v8s32_idx_offset_m1
    ; MOVREL: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
    ; MOVREL: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], [[S_MOV_B32_]], implicit-def $scc
    ; MOVREL: $m0 = COPY [[S_ADD_I32_]]
    ; MOVREL: [[V_MOVRELS_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOVRELS_B32_e32 [[COPY]].sub0, implicit $m0, implicit $exec, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[V_MOVRELS_B32_e32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_v_s32_v8s32_idx_offset_m1
    ; GPRIDX: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
    ; GPRIDX: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], [[S_MOV_B32_]], implicit-def $scc
    ; GPRIDX: [[V_INDIRECT_REG_READ_GPR_IDX_B32_V8_:%[0-9]+]]:vgpr_32 = V_INDIRECT_REG_READ_GPR_IDX_B32_V8 [[COPY]], [[S_ADD_I32_]], 3, implicit-def $m0, implicit $m0, implicit $exec
    ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_READ_GPR_IDX_B32_V8_]]
    %0:vgpr(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
    %1:sgpr(s32) = COPY $sgpr8
    %2:sgpr(s32) = G_CONSTANT i32 -1
    %3:sgpr(s32) = G_ADD %1, %2
    %4:vgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %3
    S_ENDPGM 0, implicit %4
...

---
name: extract_vector_elt_v_s32_v8s32_idx_offset_7
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $sgpr8

    ; MOVREL-LABEL: name: extract_vector_elt_v_s32_v8s32_idx_offset_7
    ; MOVREL: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: $m0 = COPY [[COPY1]]
    ; MOVREL: [[V_MOVRELS_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOVRELS_B32_e32 [[COPY]].sub7, implicit $m0, implicit $exec, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[V_MOVRELS_B32_e32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_v_s32_v8s32_idx_offset_7
    ; GPRIDX: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: [[V_INDIRECT_REG_READ_GPR_IDX_B32_V8_:%[0-9]+]]:vgpr_32 = V_INDIRECT_REG_READ_GPR_IDX_B32_V8 [[COPY]], [[COPY1]], 71, implicit-def $m0, implicit $m0, implicit $exec
    ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_READ_GPR_IDX_B32_V8_]]
    %0:vgpr(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
    %1:sgpr(s32) = COPY $sgpr8
    %2:sgpr(s32) = G_CONSTANT i32 7
    %3:sgpr(s32) = G_ADD %1, %2
    %4:vgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %3
    S_ENDPGM 0, implicit %4
...

---
name: extract_vector_elt_v_s32_v8s32_idx_offset_8
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $sgpr8

    ; MOVREL-LABEL: name: extract_vector_elt_v_s32_v8s32_idx_offset_8
    ; MOVREL: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
    ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; MOVREL: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 8
    ; MOVREL: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], [[S_MOV_B32_]], implicit-def $scc
    ; MOVREL: $m0 = COPY [[S_ADD_I32_]]
    ; MOVREL: [[V_MOVRELS_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOVRELS_B32_e32 [[COPY]].sub0, implicit $m0, implicit $exec, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[V_MOVRELS_B32_e32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_v_s32_v8s32_idx_offset_8
    ; GPRIDX: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
    ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
    ; GPRIDX: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 8
    ; GPRIDX: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], [[S_MOV_B32_]], implicit-def $scc
    ; GPRIDX: [[V_INDIRECT_REG_READ_GPR_IDX_B32_V8_:%[0-9]+]]:vgpr_32 = V_INDIRECT_REG_READ_GPR_IDX_B32_V8 [[COPY]], [[S_ADD_I32_]], 3, implicit-def $m0, implicit $m0, implicit $exec
    ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_READ_GPR_IDX_B32_V8_]]
    %0:vgpr(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
    %1:sgpr(s32) = COPY $sgpr8
    %2:sgpr(s32) = G_CONSTANT i32 8
    %3:sgpr(s32) = G_ADD %1, %2
    %4:vgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %3
    S_ENDPGM 0, implicit %4
...

---
name: extract_vector_elt_s_s32_v4s32_const_idx
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3

    ; MOVREL-LABEL: name: extract_vector_elt_s_s32_v4s32_const_idx
    ; MOVREL: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    ; MOVREL: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
    ; MOVREL: $m0 = COPY [[S_MOV_B32_]]
    ; MOVREL: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_s_s32_v4s32_const_idx
    ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    ; GPRIDX: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
    ; GPRIDX: $m0 = COPY [[S_MOV_B32_]]
    ; GPRIDX: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
    ; GPRIDX: S_ENDPGM 0, implicit [[S_MOVRELS_B32_]]
    %0:sgpr(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    %1:sgpr(s32) = G_CONSTANT i32 0
    %2:sgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: extract_vector_elt_v_s32_v4s32_const_idx
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3

    ; MOVREL-LABEL: name: extract_vector_elt_v_s32_v4s32_const_idx
    ; MOVREL: [[COPY:%[0-9]+]]:vreg_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    ; MOVREL: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
    ; MOVREL: $m0 = COPY [[S_MOV_B32_]]
    ; MOVREL: [[V_MOVRELS_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOVRELS_B32_e32 [[COPY]].sub0, implicit $m0, implicit $exec, implicit [[COPY]]
    ; MOVREL: S_ENDPGM 0, implicit [[V_MOVRELS_B32_e32_]]
    ; GPRIDX-LABEL: name: extract_vector_elt_v_s32_v4s32_const_idx
    ; GPRIDX: [[COPY:%[0-9]+]]:vreg_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    ; GPRIDX: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
    ; GPRIDX: [[V_INDIRECT_REG_READ_GPR_IDX_B32_V4_:%[0-9]+]]:vgpr_32 = V_INDIRECT_REG_READ_GPR_IDX_B32_V4 [[COPY]], [[S_MOV_B32_]], 3, implicit-def $m0, implicit $m0, implicit $exec
    ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_READ_GPR_IDX_B32_V4_]]
    %0:vgpr(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    %1:sgpr(s32) = G_CONSTANT i32 0
    %2:vgpr(s32) = G_EXTRACT_VECTOR_ELT %0, %1
    S_ENDPGM 0, implicit %2
...