test/CodeGen/AArch64/GlobalISel/select-sbfx.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s

...
---
name:            sbfx_s32
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $w0
    ; CHECK-LABEL: name: sbfx_s32
    ; CHECK: liveins: $w0
    ; CHECK: %copy:gpr32 = COPY $w0
    ; CHECK: %sbfx:gpr32 = SBFMWri %copy, 0, 10
    ; CHECK: $w0 = COPY %sbfx
    ; CHECK: RET_ReallyLR implicit $w0
    %copy:gpr(s32) = COPY $w0
    %cst1:gpr(s32) = G_CONSTANT i32 0
    %cst2:gpr(s32) = G_CONSTANT i32 10
    %sbfx:gpr(s32) = G_SBFX %copy, %cst1, %cst2
    $w0 = COPY %sbfx
    RET_ReallyLR implicit $w0

...
---
name:            sbfx_s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x0
    ; CHECK-LABEL: name: sbfx_s64
    ; CHECK: liveins: $x0
    ; CHECK: %copy:gpr64 = COPY $x0
    ; CHECK: %sbfx:gpr64 = SBFMXri %copy, 0, 10
    ; CHECK: $x0 = COPY %sbfx
    ; CHECK: RET_ReallyLR implicit $x0
    %copy:gpr(s64) = COPY $x0
    %cst1:gpr(s64) = G_CONSTANT i64 0
    %cst2:gpr(s64) = G_CONSTANT i64 10
    %sbfx:gpr(s64) = G_SBFX %copy, %cst1, %cst2
    $x0 = COPY %sbfx
    RET_ReallyLR implicit $x0

...
---
name:            sbfx_s32_31_31
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $w0
    ; This is just an asr, so it's okay.

    ; CHECK-LABEL: name: sbfx_s32_31_31
    ; CHECK: liveins: $w0
    ; CHECK: %copy:gpr32 = COPY $w0
    ; CHECK: %sbfx:gpr32 = SBFMWri %copy, 31, 31
    ; CHECK: $w0 = COPY %sbfx
    ; CHECK: RET_ReallyLR implicit $w0
    %copy:gpr(s32) = COPY $w0
    %cst1:gpr(s32) = G_CONSTANT i32 31
    %cst2:gpr(s32) = G_CONSTANT i32 31
    %sbfx:gpr(s32) = G_SBFX %copy, %cst1, %cst2
    $w0 = COPY %sbfx
    RET_ReallyLR implicit $w0